Band Tuner with On-chip Description CXA3252N monolithic tuner whi
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CXA3252N
Band Tuner with On-chip
Description CXA3252N monolithic tuner which integrates local oscillator mixer circuits band, local oscillator mixer circuits band, amplifier tuning onto single chip, enabling further miniaturization tuner. Features Superior cross modulation Supports both double-tuned filter adjacent channel trap. Balanced oscillator pins) with excellent oscillation stability Supports both 3-wire modes Automatic identification 27-bit control (during 3-wire mode) On-chip high voltage drive transistor charge pump Reference frequency selectable from 31.25, 62.5 (when using crystal) Low-phase noise synthesizer On-chip 4-output band switch (supports output voltages from SSOP Applications tuners tuners CATV tuners Structure Bipolar silicon monolithic SSOP (Plastic)
Absolute Maximum Ratings (Ta=25 Supply voltage VCC1, VCC2 -0.3 VCC3 -0.3 +10.0 Storage temperature Tstg Allowable power dissipation Operating Conditions Supply voltage VCC3 4.75 9.45 Operating temperature Topr (when mounted printed circuit board) VCC1, VCC2 4.75 5.30
This pins whose electrostatic discharge strength weak operating frequency high high-frequency process used this Take care handling Sony reserves right change products specifications without prior notice. This information does convey license implication otherwise under patents other right. Application circuits shown, any, typical examples illustrating operation devices. Sony cannot assume responsibility problems arising these circuits.
E00301-TE
CXA3252N
Block Diagram Configuration
Interface
ADSW VCC3 Shift Register
Divider 1/64,
REFOSC
IFIN1 IFIN2 Band Driver Programable Divider 14/15bit VCC1
Phase Detector
Charge Pump
LOCK
IFOUT
V.REG GND2 Select Buffer
VCC2
MIXout1 MIXout2 GND1 BYP/MS VHFin Buffer UOSCB2 UOSCE2 UOSCE1 UOSCB1 VOSC2 Buffer UHFin1 UHFin2 VOSC1
CXA3252N
Description Symbol IFIN1 IFIN2 VCC1 MIXOUT1 MIXOUT2 GND1 BYP/MS VHFIN UHFIN1 UHFIN2 VOSC1 VOSC2 UOSCB1 UOSCE1 UOSCE2 UOSCB2 VCC2 GND2 IFOUT REFOSC VCC3 ADSW/CE CLOCK/SCL bus) DATA/SDA (I2C bus) Band switch output Band switch output (VHF band) amplifier input amplifier input Band switch output (VHF high band) Band switch output Analog circuit output (open collector) output (open collector) Analog circuit input control switching input input input oscillator (base input) oscillator (collector output) oscillator (base pin) oscillator (emitter pin) oscillator (emitter pin) oscillator (base pin) circuit circuit amplifier output OPEN Tuning voltage output (open collector) Charge pump output (loop filter connection) Crystal connection Band switch power supply Enable/address selection (I2C bus)
Description
CXA3252N
Description Equivalent Circuit Symbol Voltage
Equivalent circuit
Description
Clock input.
DATA input.
2.5p
Band switch outputs. corresponding selected band goes High.
IFIN1
1.2k
IFIN2
VCC1
Analog circuit power supply.
CXA3252N
Symbol
Voltage
Equivalent circuit
Description
MIXOUT1
Mixer output. These pins output signal with open collector, they must connected power supply load.
MIXOUT2
GND1
during
reception
Analog circuit GND.
BYP/MS
during
reception
input grounding control switching. input. Input format unbalanced input.
during
reception
VHFin
during
reception
during
reception
UHFin1
during
reception
during
reception
inputs. Input signal Pins symmetrically ground either with capacitor input signal rest.
UHFin2
during
reception
during
reception
VOSC1
during
reception
during
reception
External resonance circuit connection oscillator.
VOSC2 during
reception
separating analog systems.
CXA3252N
Symbol UOSCB1 UOSCE1 UOSCE2
Voltage
during reception during reception during reception during reception during reception during reception
Equivalent circuit
Description
External resonance circuit connection oscillator.
UOSCB2 VCC2 GND2
during reception during reception
circuit power supply circuit GND.
IFOUT
output.
Varicap drive voltage output. This outputs signal with open collector, this must connected tuning power supply load. Charge pump output. Connects loop filter.
REFOSC
Crystal connection reference oscillator.
VCC3
150k
Power supply external supply.
ADSW/CE
1.25 (when open)
setting Address selection. Bits address byte controlled. 3-wire setting Enable input.
CXA3252N
Electrical Characteristics Circuit Current Item Circuit current AICCU Circuit current DICC Symbol AICCV Measurement conditions VCC1 current, band switch output open during operation VCC1 current, band switch output open during operation VCC2 current Min. Typ. (VCC=5 Ta=25°C) Max. Unit
OSC/MIX/IF Amplifier Block Item Symbol Conversion gain Noise figure Maximum output power Pomax fsw1 fsw2 Switch drift
Measurement conditions operation fRF=55 operation fRF=360 operation fRF=360 operation fRF=800 operation fRF=55 operation fRF=360 operation fRF=360 operation fRF=800 operation fD=55 MHz, fUD=±12 operation fD=360 MHz, fUD=±12 operation fD=360 MHz, fUD=±12 operation fD=800 MHz, fUD=±12 load saturation output operation fOSC=100 from after switch operation fOSC=405 from after switch operation fOSC=405 from after switch operation fOSC=845 from after switch
Min.
Typ.
Max.
Unit
cross modulation
*1,*3
fsw3 fsw4
CXA3252N
Item
Symbol fst1 fst2
Measurement conditions operation fOSC=100 when changes operation fOSC=405 when changes operation fOSC=405 when changes operation fOSC=845 when changes offset offset Phase comparison frequency 62.5 kHz,
Min.
Typ.
Max.
Unit dBc/Hz dBc/Hz msec msec
Supply voltage drift
fst3 fst4
Oscillator phase noise Reference leak Lock-up time
REFL
Value measured with untuned input. meter direct-reading value (DSB measurement). Value with desired reception signal input level dBm, interference signal kHz/30 interference signal level where S/I=46 measuered with spectrum analyzer. Value when operating.
CXA3252N
Block Item pins level input voltage level input voltage level input current level input current input level input voltage level input voltage level input current level input current output output leak current output voltage (charge pump) Output current Leak current Output current Leak current voltage output) Maximum output voltage Minimum output voltage LOCK output voltage output voltage REFOSC Oscillation frequency range Input capacitance Negative resistance Band Output current Saturation voltage Leak current VSAT LeakBS When When Source current=20 When FXTOSC CXTOSC RNEG Crystal source impedance VLOCKH VLOCKL When locked When unlocked VCC-0.5 ICPO1 LeakCP1 ICPO2 LeakCP2 Byte4/Bit6=0 Byte4/Bit6=0 Byte4/Bit6=1 Byte4/Bit6=1 ±140 ±200 ±300 Vin=5.5 Iout=-3 VIH=VCC VIL=GND -100 -200 VIH=VCC VIL=GND -0.3 -0.1 Symbol Measurement conditions Min. Typ. Max. Unit
CXA3252N
Item timing bus) clock frequency Start waiting time Start hold time hold time hold time Start setup time Data hold time Data setup time Rise time Fall time Stop setup time timing (3-wire bus) Data setup time Data hold time Enable waiting time Enable setup time Enable hold time
Symbol fSCL tWSTA tHSTA tLOW tHIGH tSSTA taHDAT tSDAT tSSTO
Measurement conditions
Min. 1300 1300 1300
Typ.
Max.
Unit
-10-
CXA3252N
Electrical Characteristics Measurement Circuit (I2C control)
+30V
8200p 1.2k 6.8k 0.047µ 100p 3.3µ 2.5t 0.5p 0.5p 1T363 XTAL 4MHz 100p 1T362 1T363 150p 1T363 2.5t 0.75p 5.5t
IFOUT
ADSW/CE
VCC3
REFOSC
IFOUT
VCC2
VOSC2
UOSCB2
UOSCE2
UOSCE1
UOSCB1
CXA3252N
BYP/MS
MIXout1
MIXout2
UHFin1
IFIN1
IFIN2
UHFin2
4.5t
4.5t
2.2µ ADSW
Unmarked coils with wire diameter
-11-
VHFin
GND1
VCC1
VOSC1
GND2
CXA3252N
Electrical Characteristics Measurement Circuit (3-wire control)
+30V
8200p 1.2k 6.8k 0.047µ 100p 3.3µ 2.5t 0.5p 0.5p 1T363 XTAL 4MHz 100p
ADSW/CE
5.5t 2.5t
0.75p
IFOUT
1T363
150p
1T363
UOSCE2
UOSCE1
1T362
REFOSC
VCC3
IFOUT
GND2
VCC2
UOSCB2
UOSCB1
VOSC2
UHFin1
VOSC1
CXA3252N
BYP/MS
MIXout1
MIXout2
IFIN1
IFIN2
4.5t 4.5t
UHFin2
GND1
VHFin
VCC1
2.2µ ADSW
Unmarked coils with wire diameter
-12-
CXA3252N
Application Circuit (I2C control)
+30V
4.7n 100p 2.2n
5.5t
1.2k
1.2k
1.5t IFOUT 0.5p XTAL 4MHz
ADSW/CE
150p 2.5t 0.5p
330p 1T363 1T363 100p
VCC3
ADSW
3.3µ
100p
UOSCE1
1T362
100p
REFOSC
IFOUT
GND2
VCC2
UOSCB2
UOSCE2
UOSCB1
VOSC2
UHFin1
VOSC1
CXA3252N
BYP/MS
MIXout1
MIXout2
IFIN1
IFIN2
7.5t
150p
VCC1
1000p
9.5t 1000p
3.3µ
Application circuits shown typical examples illustrating operation devices. Sony cannot assume responsibility problems arising these circuits infringement third party patent other right same.
-13-
UHFin2
VHFin
GND1
CXA3252N
Application Circuit (3-wire control)
+30V
4.7n 100p 2.2n
5.5t
1.2k
1.2k
1.5t IFOUT 0.5p XTAL 4MHz
ADSW/CE
150p 2.5t 0.5p
330p 1T363 1T363 100p
VCC3
ADSW
3.3µ
100p
UOSCE1
1T362
100p
REFOSC
IFOUT
GND2
VCC2
UOSCB2
UOSCE2
UOSCB1
VOSC2
UHFin1
VOSC1
CXA3252N
BYP/MS
MIXout1
MIXout2
IFIN1
IFIN2
7.5t
150p
VCC1
1000p
9.5t 1000p
3.3µ
Application circuits shown typical examples illustrating operation devices. Sony cannot assume responsibility problems arising these circuits infringement third party patent other right same.
-14-
UHFin2
VHFin
GND1
CXA3252N
Description Functions CXA3252N ground wave broadcast tuner which converts frequencies order tune detect only desired reception frequency VHF, CATV band signals. addition mixer, local oscillation amplifier circuits required frequency conversion this also integrates circuit local oscillation frequency control onto single chip. functions various circuits described below. Mixer circuit This circuit outputs frequency difference between signal input VHFIN UHFIN local oscillation signal. Local oscillation circuit formed externally connecting resonance circuit composed varicap diode inductance. amplifier circuit This circuit amplifies mixer output, consists amplifier stage impedance output stage. circuit This circuit fixes local oscillation frequency desired frequency. consists programmable divider, reference divider, phase detector, charge pump reference oscillator. control format supports both 3-wire formats. During control, frequency steps 31.25, 62.5 selected frequency division setting value data-based referencedivider. During 3-wire control, these frequency steps selected combination data length bits) voltage applied BYP/MS pin. Band switch circuit CXA3252N four sets built-in transistors switching between bands switching trap, etc. These transistors controlled data. emitters these transistors connected independent power supply (VCC3) from oscillator, mixer circuits, support either amplifier power supply.
-15-
CXA3252N
Description Analog Block Operation (See Electrical Characteristics Measurement Circuit.) oscillator circuit This circuit differential amplifier type oscillator circuit. output input. Oscillation performed connecting resonance circuit including varicap coupled capacitance, inputting with feedback capacitance, applying positive feedback. amplifier between Pins extremely high gain. Therefore, care should taken avoid creating parasitic capacitance, resistance other feedback loops this produce abnormal oscillation. mixer circuit mixer circuit employs double balanced mixer with little local oscillation signal leakage. input format base input type, with grounded capacitor signal input (Pin also used switch mode according applied voltage value.) signal converted frequency oscillator signal output from Pins Pins open collectors, external power supply necessary. addition, single-tuned filters connected Pins oscillator circuit This oscillator circuit designed that collector ground type Colpitts oscillators perform differential oscillation operation resonance circuit including varicap. Resonance capacitance connected between Pins Pins Pins resonance circuit including varicap connected between Pins mixer circuit This circuit employs double balanced mixer like mixer circuit. input format base input type, with Pins input pins. input method selected from balanced input consisting differential input Pins unbalanced input consisting grounding capacitor input Pins mixer outputs. Pins open collectors, external power supply necessary. addition, single-tuned filters connected Pins amplifier circuit Pins amplifier inputs with input impedance approximately signals frequency converted mixer output from Pins Pins connected Pins capacitors. neighboring channel trap circuit formed connecting parallel circuit instead capacitors.) signal amplified amplifier output from output impedance approximately
-16-
CXA3252N
Description Block This supports both 3-wire control. conforms standard format, bidirectional control possible consisting write mode which various data received read mode which various data sent. 3-wire equipped with 19-bit auto identify function, frequency step switched according voltage applied BYP/MS pin. this does have fixed frequency division circuit performs high-speed phase comparison, providing reference leak quick lock-up time characteristics. Function Table Symbol ADSW/CE input Address selection 3-wire CLOCK input DATA input ENABLE input
Mode Setting Method selected control according BYP/MS (Pin voltage. BYP/MS OPEN Control 3-wire 3-wire
During 3-wire control, transferred length (18, bits) automatically identified. During 19-bit transfer, frequency steps table below according combination BYP/MS voltage length. This does have fixed frequency division circuit, phase comparison frequency becomes frequency step. BYP/MS voltage OPEN OPEN Reference Divider Selectable from Phase comparison frequency 62.5 31.25 62.5 kHz/ 50.0 kHz/ 31.25 50.0 50.0 Frequency Step* 62.5 31.25 62.5 kHz/ 50.0 kHz/ 31.25 50.0 50.0
Transfer length
Phase comparison frequency frequency step when crystal oscillation=4 MHz.
-17-
CXA3252N
Programming lock frequency obtained according following formula. fosc fref fosc local oscillator frequency fref phase comparison frequency main divider frequency division ratio swallow counter frequency division ratio variable frequency division ranges follows, binary. 1023 during 18-bit transfer)
Control This conforms standard format, bidirectional control possible consisting write mode which various data received read mode which various data sent. Write read modes recognized according setting final (R/W bit) address byte. Write mode when read mode when "1".
-18-
CXA3252N
3-1) Address settings four addresses selected hardware settings, that multiple exist within system. responding address according ADSW/CE voltage. Address "CE" voltage OPEN Hardware bits 3-2) Write mode Write mode used receive various data. this mode, byte contains address data, bytes contain frequency data, byte contains control data, byte contains band switch data. These data latch transferred manner byte byte byte byte byte When correct address received acknowledged, data recognized frequency data first next byte "0", control data band switch data this "1". Also, when data transmission stopped part-way, previously programmed data valid. Therefore, once control band switch data have been programmed, 3-byte commands consisting address frequency data possible. Further, even stop conditions met, data input sending start conditions address.
-19-
CXA3252N
control format shown table below. Write-mode Slave Receiver MODE Address byte Divider byte Divider byte Control byte Band byte Don't care bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
MA0,
Acknowledge address setting main divider frequency division ratio setting swallow counter frequency division ratio setting charge pump (when "1") varicap output (when "1") charge pump current switching (200 when "1", when "0") band switch control (output transistor when "1") reference divider frequency division ratio setting. (see Reference Divider Frequency Division Ratio Table)
Reference Divider Frequency Division Ratio Table Don't care Reference divider
-20-
CXA3252N
3-3) Read mode read mode, power- reset operation status phase comparator locked/unlocked status 5-level converter input voltage status transmitted output master. read data format shown table below. Read mode Slave Transmitter MODE Address byte Status byte bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Acknowledge MA0, address setting lock detection signal locked, unlocked)
-21-
CXA3252N
Example Representative Characteristics
Circuit current Supply voltage Circuit current Supply voltage
DICC-Circuit current [mA]
AICC-Circuit current [mA]
VCC1-Supply voltage Band output voltage Output current (BS1, BS2, BS3, BS4) Output current [mA] characteristics (Untuned input)
VCC2-Supply voltage Band output voltage Output current Output current [mA] VCC3=5V VCC3=9V
VCC3=9V
Output voltage
VCC3=5V
output level [dBm]
fRF=145MHz (VHF) fRF=495MHz (UHF) both f=45MHz
level [dBm]
-22-
Output voltage
CXA3252N
Conversion gain Reception frequency (Untuned input) fIF=45MHz
Noise figure Reception frequency (Untuned input, DSB) fIF=45MHz
CG-Conversion gain [dB]
NF-Noise figure [dB]
(Low) (High)
(Low) (High)
Reception frequency [MHz]
Reception frequency [MHz]
CM-Cross modulation [dBµ]
Next adjacent cross modulation Reception frequency (Untuned input) (Low) (High) Reception frequency [MHz] fIF=45MHz fUD=fD+12MHz fUD=fD-12MHz (100kHz, 30%AM)
Oscillation frequency power supply fluctuation (PLL off) Vcc-5% Vcc+5% (Vcc=5V) (Low) (High)
drift [kHz]
-100 -200 -300 -400 Oscillation frequency [MHz]
beat characteristics
output level [dBm]
fBeat (Low) fLocal=95MHz fP=49.25MHz fC=52.83MHz (fP-12dB) fS=53.75MHz (fP-1.7dB) fIF=45.75MHz fBeat=fIF±920kHz
output level [dBm] level)
-23-
CXA3252N
Tuning Response Time
(Low) 95MHz (High) 395MHz (CP=1)
T=27.2msec 5.0V/div Offset 10.0V -40,0000ms 10,0000ms 10.0ms/div 60,0000ms real time
(Low) 95MHz (High) 395MHz (CP=0)
T=75.6msec 5.0V/div Offset 10.0V -130,000ms 20,0000ms 30.0ms/div 170,000ms real time
-24-
CXA3252N
Tuning Response Time
413MHz 847MHz (CP=1)
T=34.2msec 5.0V/div Offset 10.0V -40,0000ms 10,0000ms 10.0ms/div 60,0000ms real time
413MHz 847MHz (CP=0)
T=86.0msec 5.0V/div Offset 10.0V -70,0000ms 30,0000ms 20.0ms/div 130,000ms real time
-25-
CXA3252N
Tuning Response Time
(High) 395MHz (Low) 95MHz (CP=1) T=12.6msec
5.0V/div Offset 10.0V -40,0000ms 10,0000ms 10.0ms/div 60,0000ms real time
(High) 395MHz (Low) 95MHz (CP=0) T=39.2msec
5.0V/div Offset 10.0V -100,000ms 0,00000ms 20.0ms/div 100,000ms real time
-26-
CXA3252N
Tuning Response Time
847MHz 413MHz (CP=1)
T=15.0msec 5.0V/div Offset 10.0V -40,0000ms 10,0000ms 20.0ms/div 600,000ms real time
847MHz 413MHz (CP=0)
T=50.0msec 5.0V/div Offset 10.0V -100,000ms 0,00000ms 20.0ms/div 100,000ms real time
-27-
CXA3252N
output spectrum 10dB/div
(Low) fRF=55MHz fL0=100MHz input level -40dBm
CENTER 45.0MHz #RES 1.0kHz
#VBW 10Hz
SPAN 100.0kHz 30.0
output spectrum 10dB/div
(High) fRF=350MHz fL.0=395MHz input level -40dBm
CENTER 45.0MHz #RES 1.0kHz
#VBW 10Hz
SPAN 100.0kHz 30.0
-28-
CXA3252N
output spectrum 10dB/div
fRF=800MHz fL0=845MHz input level -40dBm
CENTER 45.0 270MHz #RES 1.0kHz
#VBW 10Hz
SPAN 100.0kHz 30.0
-29-
CXA3252N
Input Impedance
j100
BYP/MS
50MHz 1000p
VHFin
350MHz
-j25
-j100
-j50
Input Impedance
j100
UHFin1
1000p
UHFin2
350MHz
800MHz -j25 -j100
-j50
-30-
CXA3252N
Output Impedance
j100
45MHz 38MHz
-j25
-j100
-j50
-31-
CXA3252N
Package Outline
Unit
32PIN SSOP(PLASTIC)
11.0
1.45MAX
0.65 0.13 0.25 0.05
0.15
0.22 0.06 (0.22)
DETAIL
(0.5)
DETAIL
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-32P-L01 SSOP032-P-0056 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUMA PLATING COPPER ALLOY 0.1g
(0.15) 0.05 0.15 0.02
Sony Corporation
-32-
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