NA53 CMOS NA53 5-input NAND gate with drive strength. Truth
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Austria Mikro Systeme International
NA53
CMOS
NA53 5-input NAND gate with drive strength. Truth Table
Capacitance
(pF)
NA53
0.050 0.050 0.053 0.056 0.056
Area
1.22 mils
Power
14.31 with Input Slope [ns] Output Load [pF] with Output Load [pF] Typical Process
Delay [ns] tpd. f(SL, Output Slope [ns] op_sl. f(L) Characteristics 25°C
Characteristics
Characteristics Symbol tpdar tpdaf tpdbr tpdbf tpdcr tpdcf tpddr tpddf tpder tpdef op_slar op_slaf op_slbr op_slbf op_slcr op_slcf op_sldr op_sldf op_sler op_slef
Delay Delay Delay Delay Delay Output Slope Output Slope Output Slope Output Slope Output Slope
0.57 0.51 0.65 0.56 0.72 0.59 0.78 0.61 0.84 0.61 0.67 0.55 0.67 0.52 0.67 0.52 0.67 0.53 0.68 0.52
1.56 1.38 1.64 1.44 1.71 1.45 1.78 1.48 1.83 1.50 3.93 2.87 3.93 2.90 3.95 2.85 3.90 2.86 3.88 2.91
2.09 1.82 2.16 1.86 2.24 1.90 2.30 1.95 2.35 1.92 5.46 4.03 5.48 4.05 5.46 4.01 5.57 4.12 5.53 4.05
0.91 0.49 1.02 0.52 1.10 0.51 1.19 0.49 1.26 0.44 0.65 0.53 0.67 0.53 0.68 0.53 0.68 0.53 0.67 0.53
1.88 1.35 2.01 1.38 2.11 1.38 2.19 1.35 2.25 1.30 3.90 2.87 3.91 2.91 3.92 2.90 3.93 2.88 3.93 2.87
2.37 1.80 2.53 1.82 2.58 1.82 2.67 1.79 2.74 1.73 5.57 3.92 5.55 4.07 5.58 4.08 5.52 4.07 5.57 4.07
Sept. 1996
Rev.
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