56F803 Evaluation Module Hardware User's Manual Motorola, Inc., 2

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Order this document DSP56F803EVMUM/D Rev. 06/03/2003
56F803 Evaluation Module Hardware User's Manual
Motorola, Inc., 2003. rights reserved.
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Table Contents
Preface Audience Organization. Suggested Reading Notation Conventions viii Definitions, Acronyms, Abbreviations viii References Chapter Introduction 56F803EVM Architecture 56F803EVM Configuration Jumpers. 56F803EVM Connections Chapter Technical Summary 56F803 Program Data Memory RS-232 Serial Communications. Clock Source Operating Mode Debug Debug Support 2.7.1 JTAG Connector. 2.7.2 Parallel JTAG Interface Connector External Interrupts 2-10 Reset. 2-10 2.10 Power Supply 2-11 2.11 UNI-3 Interface 2-12 2.12 Run/Stop Switch 2-13 2.13 Motor Control Signals LEDs 2-14 2.14 Motor Protection Logic 2-14 2.14.1 UNI-3 Motor Protection Logic 2-15 2.15 Back-EMF Motor Phase Current Sensing 2-16
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2.16 Quadrature Encoder/Hall-Effect Interface. 2.17 Zero-Crossing Detection 2.18 Interface 2.19 Peripheral Connectors 2.19.1 External Memory Control Signal Expansion Connector 2.19.2 Encoder/Timer Channel Expansion Connector 2.19.3 Timer Channel Expansion Connector 2.19.4 Address Expansion Connector 2.19.5 Data Expansion Connector 2.19.6 Port Expansion Connector 2.19.7 Serial Communications Port Expansion Connector. 2.19.8 Serial Peripheral Interface Expansion Connector 2.19.9 Expansion Connector 2.19.10 Port Expansion Connector 2.20 Test Points Appendix 56F803EVM Schematics Appendix 56F803EVM Bill Material
2-17 2-17 2-18 2-19 2-19 2-20 2-20 2-21 2-22 2-23 2-23 2-24 2-24 2-25 2-25
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List Figures
Block Diagram 56F803EVM 56F803EVM Jumper Reference Connecting 56F803EVM Cables Schematic Diagram External Memory Interface Schematic Diagram RS-232 Interface Schematic Diagram Clock Interface Schematic Diagram Debug Interface Block Diagram Parallel JTAG Interface. Schematic Diagram User Interrupt Interface 2-10 Schematic Diagram RESET Interface 2-10 Schematic Diagram Power Supply 2-11 Run/Stop Switch 2-13 Group Interface LEDs 2-14 Over-Voltage Over-Current Detection Schematic Diagram 2-15 Primary Back-EMF Motor Phase Current Sense Signals 2-16 Zero-Crossing Encoder Interface 2-17 Interface 2-18 56F803 Processor Reset, Mode, Clock IRQsL. Program Data SRAM Memory RS-232 Connectors 56F803 LEDs User UNI-3 Over-Voltage Current Sense. Zero-Crossing/ Encoder Hall-Effect Selection. High Speed Interface Port Timer Address, Data, Control Line Connectors A-10 UNI-3 Interface General Purpose Switches A-11
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2-10 2-11 2-12 2-13 2-14 A-10
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A-11 A-12 A-13 A-14
Back-EMF Phase Current Sense Analog Input Selectors A-12 Parallel JTAG Host/Target Interface JTAG Connector. A-13 Power Supplies 3.3V 5.0V. A-14 Bypass Capacitors Spare Gates A-15
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List Tables
56F803EVM Default Jumper Options RS-232 Serial Connector Description. Operating Mode Selection JTAG Connector Description Parallel JTAG Interface Disable Jumper Selection. Parallel JTAG Interface Connector Description On-Board Host Target Interface Power Source Jumper Selection UNI-3 Connector Description. 2-12 Header Description 2-18 External Memory Control Signal Connector Description 2-19 Timer Connector Description 2-20 Timer Connector Description 2-20 External Memory Address Connector Description 2-21 External Memory Address Connector Description 2-22 Connector Description 2-23 Connector Description 2-23 Connector Description 2-24 Connector Description. 2-24 Port Connector Description 2-25
2-10 2-11 2-12 2-13 2-14 2-15 2-16 2-17 2-18
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Preface
This reference manual describes detail hardware 56F803 Evaluation Module.
Audience
This document intended application developers creating software devices using Motorola 56F803 part.
Organization
This manual organized into chapters appendixes. Chapter Introduction provides overview 56F803EVM features. Chapter Technical Summary describes detail 56F803EVM hardware. Appendix 56F803EVM Schematics contains schematics 56F803EVM. Appendix 56F803EVM Bill Material provides list materials used 56F803EVM board.
Suggested Reading
More documentation 56F803 56F803EVM found URL:
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Preface More Information This Product, www.freescale.com
Notation Conventions
This document uses following conventions:
Term Value Active High Signals (Logic One) Active Signals (Logic Zero) Symbol special symbol attached signal name Noted with overbar text most figures Begin with symbol special symbol attached number Begin with letter attached number Considered positive unless specifically noted negative value Reference sources, paths, emphasis CLKO schematic drawings, Active Signals noted backslash: Examples Exceptions
Hexadecimal Values Decimal Values
$0FF0 b1010 b0011 Voltage often shown positive: +3.3V
Binary Values
Numbers
Bold
.see:
http://www.motorola.com.
Definitions, Acronyms, Abbreviations
Definitions, acronyms abbreviations terms used this document defined below reference. GPIO JTAG LQFP Analog-to-Digital Controller Area Network; serial communications peripheral method Automation, international user's group that coordinates standards communications protocols Digital Signal Processor Digital Signal Processing Evaluation Module General Purpose Input Output Port Integrated Circuit Joint Test Action Group, protocol/interface used test debug Low-profile Quad Flat Pack
viii
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MPIO OnCE
SRAM
UART
Multi Purpose Input Output Port; shares package pins with other peripherals chip function GPIO On-Chip Emulation, debug port created Motorola enable designers create low-cost hardware interface professional quality debug environment Printed Circuit Board Phase Locked Loop Pulse Width Modulation Random Access Memory Read Only Memory Serial Communications Interface Serial Peripheral Interface Port Static Random Access Memory Universal Asynchronous Receiver/Transmitter
References
following sources were referenced produce this manual:
DSP56800 Family Manual, Motorola, DSP56800FM/D DSP56F801/803/805/807 User's Manual, Motorola, DSP56F801-7UM/D 56F803 Technical Data, Motorola, DSP56F803/D Draft Recommendation DR-303-1, Cabling Connector Assignment, Version 1.0, Automation Specification 2.0B, BOSCH Automation
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Preface More Information This Product, www.freescale.com
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Chapter Introduction
56F803EVM used demonstrate abilities 56F803 provide hardware tool allowing development applications that 56F803.
56F803EVM evaluation module board that includes 56F803 part, peripheral expansion connectors, external memory, RS-232 interface interface. expansion connectors signal monitoring user feature expandability. 56F803EVM designed following purposes: Allowing users become familiar with features 56800 architecture. tools examples provided with 56F803EVM facilitate evaluation feature benefits family. Serving platform real-time software development. tool suite enables user develop simulate routines, download software on-chip on-board RAM, debug using debugger JTAG/OnCEport. breakpoint features OnCE port enable user easily specify complex break conditions execute user-developed software full-speed, until break conditions satisfied. ability examine modify user accessible registers, memory peripherals through OnCE port greatly facilitates task developer. Serving platform hardware development. hardware platform enables user connect external hardware peripherals. on-board peripherals disabled, providing user with ability reassign hybrid controller's peripherals. OnCE port's unobtrusive design means that memory board chip available user.
56F803EVM Architecture
56F803EVM facilitates evaluation various features present 56F803 part. 56F803EVM used develop real-time software hardware products based 56F803. 56F803EVM provides features necessary user write debug software, demonstrate functionality that software interface with
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customer's application-specific device(s). 56F803EVM flexible enough allow user fully exploit 56F803's features optimize performance their product, shown Figure 1-1.
56F803
RESET LOGIC RESET XTAL/EXTAL Freq Crystal
MODE/IRQ LOGIC
MODE/IRQ
RS-232 Interface
DSub 9-Pin
Program Memory 64Kx16-bit
Address, Data Control
Interface TIMER GPIO Peripheral Expansion Connector(s) Debug LEDs LEDs Over Sense Over Sense Zero Crossing Detect
Data Memory 64Kx16-bit Memory Expansion Connector(s) JTAG Connector
JTAG/OnCE
UNI-3
DSub 25-Pin
Parallel JTAG Interface
Power Supply 3.3V, 3.3VA
Figure 1-1. Block Diagram 56F803EVM
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56F803EVM Configuration Jumpers
56F803EVM Configuration Jumpers
jumper groups, (JG1-JG10), shown Figure 1-2, used configure various features 56F803EVM board. Table describes default jumper group settings.
JG10
JG10
DSP56F803EVM
LEDs
USER
JTAG
LED3
RUN/STOP RESET
IRQA
IRQB
Figure 1-2. 56F803EVM Jumper Reference
Table 1-1. 56F803EVM Default Jumper Options
Jumper Group JG10 UNI-3 serial selected Enable on-board Parallel JTAG Command Converter Interface on-board crystal oscillator input Selects device's Mode BOOT From FLASH, operation upon exit from reset Enable external SRAM UNI-3 3-Phase Current Source Selected Encoder Input Selected On-board Parallel JTAG Command Converter powered Host System on-board crystal oscillator input Leave un-terminated Comment Jumpers Connections 1-2, 3-4, 2-3, 2-3,
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56F803EVM Connections
interconnection diagram shown Figure connecting external +12V power supply 56F803EVM board.
Parallel Extension Cable 56F803EVM PC-compatible Computer
Connect cable Parallel/Printer port External with 2.1mm, +12V receptacle Power connector
Figure 1-3. Connecting 56F803EVM Cables
Perform following steps connect 56F803EVM cables: Connect parallel extension cable Parallel port host computer. Connect other parallel extension cable shown Figure 1-3, 56F803EVM board. This provides connection which allows host computer control board. Make sure that external +12V 4.0A power supply plugged into +120V power source. Connect 2.1mm output power plug from external power supply into shown Figure 1-3, 56F803EVM board. Apply power external power supply. green Power-On will illuminate when power correctly applied.
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Chapter Technical Summary
56F803EVM designed versatile hybrid controller development card developing real-time software hardware products support generation applications digital wireless messaging, servo motor control, digital answering machines, feature phones, modems, digital cameras. power 16-bit 56F803 controller, combined with on-board 16-bit external program Static (SRAM), 16-bit external data SRAM, interface, Hall-Effect/Quadrature Encoder interface, motor zero crossing logic, motor over-current logic, motor over-voltage logic parallel JTAG interface, makes 56F803EVM ideal developing implementing many motor controlling algorithms, well learning architecture instruction 56F803 processor. main features 56F803EVM include: 56F803 16-bit +3.3V hybrid controller operating 80MHz [U1] External fast Static (FSRAM) memory [U2], configured Program memory with wait states 70MHz Data memory with wait states 70MHz 8.00MHz crystal oscillator device frequency generation [Y1] Optional external oscillator frequency input connector [JG3 JG9] Joint Test Action Group (JTAG) port interface connector external debug Host Target Interface [J1] On-board Parallel JTAG Host Target Interface, with connector printer port cable [P2] RS-232 interface easy connection host processor interface high speed, 1.0Mbps, communications [U15 bypass termination [J13 JG10] Connector allow user connect GPIO-compatible peripheral [J12]
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Connector allow user connect MPIO-compatible peripheral [J6] Connector allow user connect GPIO-compatible peripheral [J4] Connector allow user connect physical layer peripheral [J5] Connector allow user connect Timer MPIO-compatible peripheral [J10] Connector allow user connect device's Port [J9] 56F803's external memory expansion connectors [J7, J11] On-board power regulation from external +12V DC-supplied power input [P3] Light Emitting Diode (LED) power indicator [LED1] on-board monitoring LEDs [LED2-LED7] On-board real-time user debugging [LED8] UNI-3 Motor interface [P1] Encoder/Hall-Effect interface Over-Voltage sensing [U14] Over-Current sensing [U14] Voltage sensing [U13] Current sensing [U13] Back-EMF sensing Temperature sensing Zero Crossing detection Pulse Width Modulation Power Factor Correction (PFC) sensing
Manual RESET push-button [S4] Manual interrupt push-button IRQA [S2] Manual interrupt push-button IRQB [S3] General purpose toggle switch RUN/STOP control(AN7) [S1]
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56F803
56F803
56F803EVM uses Motorola DSP56F803BU80 part, designated board schematics. This part will operate maximum speed 80MHz. full description 56F803, including functionality user information, provided following documents: 56F803 Technical Data, (DSP56F803/D): Provides features list specifications including signal descriptions, power requirements, timing requirements available packaging. DSP56F801/803/805/807 User's Manual, (DSP56F801-7UM/D): Provides overview description hybrid controller detailed information about on-chip components including memory maps, peripheral functionality, control/status register descriptions each subsystem. DSP56800 Family Manual, (DSP56800FM/D): Provides detailed description core processor including internal status control registers detailed description family instruction set.
These manuals contain detailed information about chip functionality operation found this URL:
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Program Data Memory
56F803EVM uses bank Fast Static (GSI GS72116, labeled external memory expansion; FSRAM schematic diagram Figure 2-1. This physical memory bank split into logical memory banks 64Kx16-bits: Program memory other Data memory. using device's program strobe, signal line along with memory chip's signal line, half memory chip selected when Program memory accesses requested other half memory chip selected when Data memory accesses requested. This memory bank will operate with zero wait-state accesses while 56F803 running 70MHz. However, when running 80MHz, memory bank operates with four wait-state accesses. This memory bank disabled removing jumper JG5.
56F803 A0-A15 D0-D15
+3.3V
GS72116 A1-A16 D0-D15
Connect 1-2: Enable SRAM Jumper Removed: Disable SRAM
Figure 2-1. Schematic Diagram External Memory Interface
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RS-232 Serial Communications
RS-232 Serial Communications
56F803EVM provides RS-232 interface RS-232 level converter, (Analog Devices ADM3311EARS, designated U3); refer RS-232 schematic diagram Figure 2-2. RS-232 level converter transitions UART's +3.3V signal levels RS-232 compatible signal levels connects host's serial port connector Flow control provided, could implemented using uncommitted GPIO signals. pin-out connector listed Table 2-1.
56F803
RS-232 Level Interface RS-232
TXD0 RXD0
T1in R1out
T1out R1in
Figure 2-2. Schematic Diagram RS-232 Interface
Table 2-1. RS-232 Serial Connector Description
Signal Jumper Jumper Signal Jumper Jumper Jumper
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Clock Source
56F803EVM uses 8.00MHz crystal, connected External Crystal Inputs, EXTAL XTAL. 56F803 uses internal multiply input frequency achieve 80MHz maximum operating frequency. external oscillator source connected hybrid controller using oscillator bypass connectors, JG9; Figure 2-3.
EXTERNAL OSCILLATOR HEADERS
56F803
EXTAL
8.00MHz
XTAL
Figure 2-3. Schematic Diagram Clock Interface
Operating Mode
56F803EVM provides boot-up MODE selection jumper, JG4. This jumper used select operating mode controller exits RESET. Refer DSP56F801-7 User's Manual complete description chip's operating modes. Table shows operation modes available 56F803.
Table 2-2. Operating Mode Selection
Operating Mode Jumper Comment Bootstrap from internal memory (GND) Bootstrap from external memory (+3.3V)
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Debug Support
Debug
on-board Light-Emitting Diode, (LED), provided allow real-time debugging user programs. This allows programmer monitor program execution without having stop program during debugging; refer Figure 2-4. LED8 controlled MOSI signal line. Setting MOSI Logic value will turn LED.
56F803
+3.3V
MOSI
BUFFER
GREEN
Figure 2-4. Schematic Diagram Debug Interface
Debug Support
56F803EVM provides on-board Parallel JTAG Host Target Interface JTAG interface connector external Host Target Interface support. interface connectors provided support each these debugging approaches. These connectors designated JTAG connector Host Parallel Interface Connector.
2.7.1 JTAG Connector
JTAG connector 56F803EVM allows connection external Host Target Interface downloading programs working with 56F803's registers. This connector used communicate with external Host Target Interface which passes information data back forth with host processor running debugger program. Table shows pin-out this connector.
Table 2-3. JTAG Connector Description
Signal RESET Signal
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Table 2-3. JTAG Connector Description
Signal +3.3V Signal TRST
When this connector used with external Host Target Interface, parallel JTAG interface should disabled placing jumper jumper block JG2. Reference Table this jumper's selection options.
Table 2-4. Parallel JTAG Interface Disable Jumper Selection
jumper Comment On-board Parallel JTAG Interface Enabled Disable on-board Parallel JTAG Interface
2.7.2 Parallel JTAG Interface Connector
Parallel JTAG Interface Connector, allows 56F803 communicate with Parallel Printer Port Windows Figure 2-5. using this connector, user download programs work with 56F803's registers. Table shows pin-out this connector. When using parallel JTAG interface, jumper should removed; refer Table 2-4. jumper, JG8, provided allow on-board Host Target Interface powered Target board instead Host system, shown Table 2-6.
PARALLEL JTAG INTERFACE LOGIC TRST
DB-25 PORT_TDI PORT_TDO PORT_TRST PORT_TMS PORT_TCK PORT_RESET
56F803
RESET
Figure 2-5. Block Diagram Parallel JTAG Interface
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Debug Support
Table 2-5. Parallel JTAG Interface Connector Description
Signal PORT_RESET PORT_TMS PORT_TCK PORT_TDI PORT_TRST PORT_IDENT PORT_VCC PORT_TDO PORT_CONNECT Signal PORT_IDENT
Table 2-6. On-Board Host Target Interface Power Source Jumper Selection
Comment Host supplied power Target supplied power
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External Interrupts
on-board push-button switches provided external interrupt generation, shown Figure 2-6. allows user generate hardware interrupt signal line IRQA.; allows user generate hardware interrupt signal line IRQB. These switches allow user generate interrupts user-specific programs.
+3.3V
56F803
IRQA
IRQA
+3.3V
IRQB IRQB
Figure 2-6. Schematic Diagram User Interrupt Interface
Reset
Logic provided 56F803 generate clean power-on RESET signal. Additional, reset logic provided support RESET signals from JTAG connector, Parallel JTAG Interface user RESET push-button; Figure 2-7.
+3.3V
RESET PUSHBUTTON MANUAL RESET
RESET
P_RESET
Figure 2-7. Schematic Diagram RESET Interface
2-10
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Power Supply
2.10 Power Supply
main power input, +12V 4.0A, 56F803EVM through 2.1mm coax power jack. 4.0A power supply provided with 56F803EVM; however, less than 500mA required EVM. remaining current available user motor control applications. 56F803EVM provides +3.3V voltage regulation device, memory, RS-232, CAN, parallel JTAG interface supporting logic; refer Figure 2-8. Power applied 56F803EVM indicated with Power-On LED, referenced LED1.
+12V
+5.0V Regulator
+5.0V
+3.3V Regulator
+3.3V
56F803
56F803EVM PARTS
Figure 2-8. Schematic Diagram Power Supply
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2-11
2.11 UNI-3 Interface
Motor control signals from family motor driver boards connected board UNI-3 connector/interface. UNI-3 connector/interface contains signals needed drive control motor drive boards. These signals connected differing groups device's input output ports: A/D, TIMER PWM. Refer Table UNI-3 connector.
Table 2-7. UNI-3 Connector Description
Signal PWM_AT PWM_AB PWM_BT PWM_BB PWM_CT PWM_CB +5.0V Analog Analog +15V Motor Voltage Sense Motor Phase Current Sense Motor Phase Current Sense Motor Drive Brake Control Zero Cross Zero Cross Shield Back-EMF Phase Sense
Signal Shield Shield Shield Shield Shield +5.0V Analog +3.3V Analog Analog -15V Motor Current Sense Motor Phase Current Sense Motor Drive Temperature Sense Shield Serial Inhibit Zero Cross Zero Cross Back-EMF Phase Sense Back-EMF Phase Sense
2-12
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Run/Stop Switch
2.12 Run/Stop Switch
Run/Stop toggle switch connected GPIO signal AN7, shown Figure 2-9. optional series resistor provided which, when removed, allows user utilize signal other purposes.
56F803
+3.3V
RUN/STOP SWITCH
Figure 2-9. Run/Stop Switch
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2-13
2.13 Motor Control Signals LEDs
56F803 dedicated unit. unit contains PWM, three Phase Current sense four Fault input lines. lines connected UNI-3 interface connector LEDs inverting buffers. buffers used isolate drive controller's outputs LEDs. LEDs indicate status group signals, refer Figure 2-10. group signals routed headers available user.
56F803
PWMA0 PWMA1 PWMA2 PWMA3 PWMA4 PWMA5
UNI-3
PWMA0 PWMA1 PWMA2 PWMA3 PWMA4 PWMA5
+3.3V YELLOW
PWM_AT
GREEN
PWM_AB PWM_BT
YELLOW
GREEN
PWM_BB PWM_CT
BUFFER
YELLOW
GREEN
PWM_CB
Figure 2-10. Group Interface LEDs
2.14 Motor Protection Logic
56F803EVM contains UNI-3 connector that interfaces with various motor drive boards. hybrid controller sense error conditions generated motor power stage boards signals UNI-3 connector. motor driver board's Motor Supply Voltage, Current Motor Phase Currents sensed power stage board. conditioned signals transferred device board UNI-3 connector. These analog input signals compared limits trimpots. input analog signals greater than limit trimpot, digital-compatible, +3.3V fault signal generated.
2-14
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Motor Protection Logic
2.14.1 UNI-3 Motor Protection Logic
UNI-3 Over-Voltage signal connected controller's group's fault input, FAULT0. UNI-3 Over-Current signal connected device's group's fault input, FAULT1. Additionally, UNI-3 Over-Voltage Over-Current analog signals connected inputs, AN1, respectively. Figure 2-11 contains diagram Over-Voltage Over-Current circuit UNI-3 interface.
VOLTAGE SENSE
V_sense_DCB
+3.3V +5.0V +5.0V
FAULT0
LM393
CURRENT SENSE
I_sense_DCB
+3.3V +5.0V +5.0V
FAULT1
LM393
Figure 2-11. Over-Voltage Over-Current Detection Schematic Diagram
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2-15
2.15 Back-EMF Motor Phase Current Sensing
UNI-3 connector supplies Back-EMF Motor Phase Current signals from three phases motor attached motor drive unit. Back-EMF signals UNI-3 connectors derived from resistor divider network contained motor drive unit. These resistors divide down attached motor's Back-EMF voltages +3.3V level. certain instances, Back-EMF signals exceed this maximum range. Motor Phase Current signals derived from current sense resistors. Both these signal groups then routed group header pins that allow user select which signal group device's will monitor. Refer Figure 2-12 design single channel.
BACK_EMF_A PHASE_A_I_SENSE
Figure 2-12. Primary Back-EMF Motor Phase Current Sense Signals
2-16
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Zero-Crossing Detection
2.16 Quadrature Encoder/Hall-Effect Interface
56F803EVM board contains Quadrature Encoder/Hall-Effect interface connected device's Quad Encoder input port. circuit designed accept +3.0V +5.0V encoder Hall-Effect sensor inputs. Input noise filtering supplied input path Quadrature Encoder/Hall-Effect interface, along with additional noise rejection circuitry inside hybrid controller. Figure 2-13 shows encoder interface.
2.17 Zero-Crossing Detection
attached UNI-3 motor drive board contains logic that send pulses when phase voltage attached 3-phase motor drops zero. motor drive board circuits generate +3.3V pulse voltage comparators. resulting pulse signals sent jumper blocks shared with Encoder/Hall-Effect interface. jumper blocks allow selection Zero-Crossing signals Quadrature Encoder/Hall-Effect signals. When operation, hybrid controller will only monitor signals, either Encoder/Hall-Effect Zero-Crossing. Figure 2-13 shows Zero-Crossing Encoder/Hall circuits.
ZERO_X_A ZERO_X_B ZERO_X_C 56F803
PHASEA
+5.0V
FILTER
PHASEB
FILTER FILTER
INDEX HOME
+5.0V GROUND PHASE PHASE INDEX HOME
FILTER
Figure 2-13. Zero-Crossing Encoder Interface
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2-17
2.18 Interface
56F803EVM board contains physical-layer interface chip that attached MSCAN_RX MSCAN_TX pins 56F803. board uses Philips, PCA82C250, high speed, 1Mbps, physical layer interface chip. +5.0V operating voltage chip, pull-up +5.0V required level shift Transmit Data output line from 56F803. primary, daisy-chain, J13, connector provided allow easy daisy-chaining devices. Refer Figure 2-14 connection diagram Table signals.
CONNECTOR
56F803
+5.0V
MSCAN_TX MSCAN_RX
VREF CANH CANL
SLOPE
JG10
PCA82C250T
TERMINATION
DAISY-CHAIN CONNECTOR
Figure 2-14. Interface
Table 2-8. Header Description
Signal CANL Signal CANH
2-18
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Peripheral Connectors
2.19 Peripheral Connectors
board contains group Peripheral Expansion Connectors used gain access resources 56F803. following signal groups have Expansion Connectors: External Memory Control Encoder/Timer Channel Timer Channel Address Data Input Port Serial Communications Port Serial Peripheral Interface Port Port Port
2.19.1 External Memory Control Signal Expansion Connector
External Memory Control Signal connector contains device's external memory control signal lines. Table names these signals.
Table 2-9. External Memory Control Signal Connector Description
Signal CLKO Signal IRQA IRQB RESET +3.3V
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2-19
2.19.2 Encoder/Timer Channel Expansion Connector
Encoder/Timer Channel port MPIO port attached Timer expansion connector. port Quadrature Decoder interface port general purpose Timer port. Refer Table 2-10 signals attached connector.
Table 2-10. Timer Connector Description
Signal +5.0V PhaseA PhaseB INDEX HOME
2.19.3 Timer Channel Expansion Connector
Timer Channel port GPIO timer port attached Timer expansion connector. Table 2-11 signals attached connector.
Table 2-11. Timer Connector Description
Signal +3.3V
2-20
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Peripheral Connectors
2.19.4 Address Expansion Connector
16-bit Address connector contains hybrid controller's external memory address signal lines. upper bits, A15, also used Port GPIO lines. Table 2-12 Address connector information.
Table 2-12. External Memory Address Connector Description
Signal Signal +3.3V
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2-21
2.19.5 Data Expansion Connector
16-bit Data connector contains controller's external memory data signal lines. Refer Table 2-13 Data connector information.
Table 2-13. External Memory Address Connector Description
Signal Signal +3.3V
2-22
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Peripheral Connectors
2.19.6 Port Expansion Connector
8-channel Analog-to-Digital conversion port attached this connector. Table 2-14 connection information.
Table 2-14. Connector Description
Signal GNDA +3.3VA
2.19.7 Serial Communications Port Expansion Connector
Serial Communications Port, SCI, attached this connector. Refer Table 2-15 connection information.
Table 2-15. Connector Description
Signal
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2-23
2.19.8 Serial Peripheral Interface Expansion Connector
Serial Peripheral Interface, SPI, attached this connector. Table 2-16 connection information.
Table 2-16. Connector Description
Signal SCLK MISO Signal MOSI +3.3V
2.19.9 Expansion Connector
port attached this connector. Refer Table 2-17 connection information.
Table 2-17. Connector Description
Signal MSCAN_TX MSCAN_RX
2-24
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MOTOROLA
Test Points
2.19.10 Port Expansion Connector
port attached this connector. Refer Table 2-18 connection information.
Table 2-18. Port Connector Description
Signal ISA0 ISA2 FAULT1 PWM0 PWM2 PWM4 Signal ISA1 FAULT0 FAULT2 PWM1 PWM3 PWM5 +3.3V
2.20 Test Points
56F803EVM board nine test points: Five near breadboard, (+3.3V, GND, +3.3VA, AGND +5.0V), four near UNI-3 connector, (-15VA, GND, +15VA GND).
MOTOROLA
Technical Summary More Information This Product, www.freescale.com
2-25
2-26
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MOTOROLA
Appendix 56F803EVM Schematics
MOTOROLA
56F803EVM Schematics More Information This Product, www.freescale.com
A[0.15] TRST /TRST
JTAG
USER BRAKE CONTROL INHIBIT serial_com
MOSI/PE5 MISO/PE6 SCLK/PE4 SS/PE7
MOSI MISO SCLK
A6/PE2 A7/PE3 A8/A0 A9/A1 A10/A2 A11/A3 A12/A4 A13/A5 A14/A6 A15/A7 PHASEA0/TA0 PHASEB0/TA1 INDEX0/TA2 HOME0/TA3 PHASEA PHASEB INDEX HOME
ENCODER HALL EFFECT INPUT
ZERO CROSSING
D[0.15] TXD0/PE0 RXD0/PE1
RS-232
MSCAN_TX MSCAN_RX
MSCAN_TX MSCAN_RX
PULSE WIDTH MODULATION PHASE CURRENT SENSE
OVERVOLTAGE FAULT OVERCURRENT FAULT
IRQA IRQB PWMA0 PWMA1 PWMA2 PWMA3 PWMA4 PWMA5 ISA0 ISA1 ISA2 FAULTA0 FAULTA1 FAULTA2 PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 FAULT0 FAULT1 FAULT2
/IRQA /IRQB RESET EXTBOOT CLK0 XTAL EXTAL VCAPC VCAPC +3.3V 2.2uF 50VDC 2.2uF 50VDC DSP56F803BU80 VDDA VDDA VSSA +3.3VA CLKO XTAL EXTAL
OVERVOLTAGE OVERCURRENT PHASE CURRENT BACK PHASE PHASE CURRENT BACK PHASE PHASE CURRENT BACK PHASE DRIVE TEMPERATURE START STOP
/RESET EXTBOOT
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cessor ment mber Date:
EVM.DSN
Monday, June 1998
Development Tools Sheet
MOTOROLA
Figure A-1. 56F803 Processor
MOTOROLA
+3.3V
BYPASS
+3.3V XTAL 0.1uF
IRQA PUSHBUTTON
/IRQA
8.00MHz
IRQB PUSHBUTTON
/IRQB 0.1uF
+3.3V /RESET
RESET PUSHBUTTON
BOOT MODE JUMPER BOOT BOOT
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MODES, CLOCK, IRQS Document Date:
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Monday, July 2000
Rev. Designer: Development Tools
Sheet
Figure A-2. Reset, Mode, Clock IRQsL
64Kx16-bit Program 64Kx16-bit Data Memory
D[0.15] A[0.15]
+3.3V
+3.3V
SRAM ENABLE JUMPER OPTION JUMPER
GS72116TP-12
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
SRAM ENABLE
SRAM DISABLE
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OGRAM DATA SRAM MEMORY Document Date:
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Monday, June 1998
Rev. Designer: Development Tools
Sheet
MOTOROLA
Figure A-3. Program Data SRAM Memory
MOTOROLA
0.1uF +3.3V C2V+ C1T1IN T2IN T3IN T1OUT T2OUT T3OUT TP79 TP80 R1OUT R2OUT R3OUT R4OUT R5OUT ADM3311EARS
VC3+ C3GND 0.1uF 0.1uF
T2IN T3IN R1IN R2IN R3IN R4IN R5IN R2IN R3IN R4IN R5IN 0.1uF 0.1uF
RS-232 CONNECTOR
TP81 TP82 TP83 TP85
DB9S
R2IN
R3IN
T2IN
T3IN
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R4IN
R5IN
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RS-232 CONNECTORS Document Date:
DSP56803EVM.DSN
Monday, June 1998
Rev. Designer: Development Tools
Sheet
Figure A-4. RS-232 Connectors
LEDS STATE
+3.3V U10A PWM0 U10B 74AC04 PWM1 74AC04 PWM2 U10D 74AC04 PWM3 74AC04 PWM4 U10F 74AC04 PWM5 74AC04 U10E LED5 LED4 U10C LED3 LED2
YELLOW
GREEN
YELLOW
GREEN
LED6
YELLOW
LED7
GREEN
USER
U12A 74AC04 MOSI
USER
LED8 +3.3V
GREEN
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DSP56803 LEDS USER Document Date:
DSP56803EVM.DSN
Monday, June 1998
Rev. Designer: Development Tools
Sheet
MOTOROLA
Figure A-5. 56F803 LEDs User
56F803EVM Schematics More Information This Product, www.freescale.com
LM393A FAULT0
MOTOROLA
VOLTAGE SENSE
+3.3V 0.1uF 5.1K +5.0V V_S_DCB
UNI-3 OVER-VOLTAGE FAULT DETECTION
FAULT SENSE
U14A
+5.0V
CURRENT SENSE
+3.3V 0.1uF 5.1K U14B LM393A FAULT1 +5.0V I_S_DCB
UNI-3 OVER-CURRENT FAULT DETECTION
FAULT SENSE
+5.0V
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RRENT SENSE ment mber Date:
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Development Tools Sheet
Figure A-6. UNI-3 Over-Voltage Current Sense
UNI-3: ZERO CROSSING
ZERO_X_A
ZERO_X_B
ZERO_X_C +5.0V
1-2: ZERO CROSSING INFORMATION 2-3: ENCODER HALL EFFECT INFORMATION
+5.0V JG7A 0.1uF 2.2uF 50VDC +5.0V 470pF
PHASEA
470pF
JG7B PHASEB
+5.0V
+5.0V 470pF
JG7C INDEX
ENCODER HALL EFFECT CONNECTOR
470pF
HOME
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ZERO CROSSING, ENCODER, HALL EFFECT SELECTION Document Date:
DSP56803EVM.DSN
Monday, June 1998
+5.0V GROUND PHASE PHASE INDEX HOME
Rev. Designer: Development Tools
Sheet
MOTOROLA
Figure A-7. Zero-Crossing/ Encoder Hall-Effect Selection
MOTOROLA
+5.0V +5.0V CANL CANH CANL TP86 CANH
CONNECTOR
VREF CANH CANL
DAISY-CHAIN CONNECTOR
MSCAN_TX MSCAN_RX
SLOPE PCA82C250T
JG10 CANH 1/4W CANL
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HIGH SPEED INTERFACE Document Date:
DSP56803EVM.DSN
Wednesday, July 2000
Rev. Designer: Development Tools
Sheet
Figure A-8. High Speed Interface
A-10
PORT
A[0.15] FAULT0 FAULT2 PWM1 PWM3 PWM5 +3.3V +3.3V FAULT1 PWM0 PWM2 PWM4
ADDRESS CONNECTOR 0-15
A[0.15]
MSCAN_TX MSCAN_RX
SIGNAL CONNECTOR
PORT PA:0-7 SHARE ADDRESS PINS A:8-15
CONTROL LINES
D[0.15] /IRQA /IRQB /RESET +3.3V +3.3VA
PORT DATA CONNECTOR 0-15
D[0.15] +3.3V
CLKO
TIMER CHANNEL
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SIGNALS
MOSI +3.3V
+3.3V
PORT
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SCLK MISO
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LINES CONNECTORS ment mber Date:
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Development Tools Sheet
MOTOROLA
Figure A-9. Port Timer Address, Data, Control Line Connectors
+15VA UNI_3_+15 PWM_AT PWM_AB PWM_BT PWM_BB PWM_CT PWM_CB PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 +5.0V_UNI3 UNI_3_+15 V_S_DCB U3_PHB_IS MOTOR PHASE CURRENT SENSE MOTOR DRIVE TEMPERATURE SENSE UNI_3_-15 I_S_DCB +5.0V_UNI3 +3.3VA
MOTOR PHASE CURRENT SENSE MOTOR PHASE CURRENT SENSE MISO PFC_PWM PFC_ZERO_CROSS PHASE BACK PHASE BACK SERIAL_COM PFC_INHIBIT
U3_PHA_IS U3_PHC_IS
-15VA UNI_3_-15
MOTOROLA
TEST POINTS
UNI-3 CONNECTOR
MOTOR DRIVE BRAKE CONTROL
ZERO_X_B BK_EMF_B
PHASE BACK
ZERO_X_A ZERO_X_C BK_EMF_A BK_EMF_C
STOP SWITCH
+3.3VA
PFC_PWM PFC_ZERO_CROSS SCLK SERIAL_COM PFC_INHIBIT
RUN/STOP JUMPER ZERO CROSSING JUMPER
SPST
UNI-3 SERIAL
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Title Size
JUMPER INHIBIT JUMPER
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URPOSE SWITCHES ment mber Date:
EVM.DSN
Monday, June 1998
Development Tools
Sheet
A-11
Figure A-10. UNI-3 Interface General Purpose Switches
A-12
JG6A BK_EMF_A U3_PHA_IS
JG6B BK_EMF_B U3_PHB_IS
JG6C BK_EMF_C U3_PHC_IS
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BACK-EMF PHASE CURRENT SENSE ANALOG INPUT SELECTORS Document Date:
DSP56803EVM.DSN
Monday, June 1998
Rev. Designer: Development Tools
Sheet
MOTOROLA
Figure A-11. Back-EMF Phase Current Sense Analog Input Selectors
MOTOROLA
Parallel JTAG Interface
PORT_IDENT
/TRST +3.3V TP47 PORT_TCK +3.3V 5.1K MC74HC244DW 5.1K 5.1K PORT_VCC 5.1K TP46 PORT_TDI /PORT_TRST MC74HC244DW DB25M +3.3V PORT_CONNECT PORT_TDO 0.1uF 5.1K PORT_TMS PORT_RESET P_RESET
On-Board Host Target Interface Disable
On-Board Host Target Interface Power Source
/RESET
+3.3V
JTAG Connector
/JTAG-RESET
5.1K /RESET 5.1K 2N2222/TO /TRST 5.1K 5.1K +3.3V +3.3V /RESET
/TRST
P_RESET
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JTAG CONNECTOR ment mber Date:
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Development Tools
Sheet
A-13
Figure A-12. Parallel JTAG Host/Target Interface JTAG Connector
A-14
FM4001 MC33269DT_5.0 47uF 10VDC LED1 GREEN FERRITE BEAD VOUT VOUT FM4001 470uF 16VDC 0.1uF +5.0V_UNI3 +5.0V
EXTERNAL POWER
INPUT
POWER GOOD
+5.0V +3.3VA FM4001 0.1uF
+3.3V FERRITE BEAD
VOUT VOUT
+3.3V FERRITE BEAD
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FERRITE BEAD MC33269DT_3.3 47uF 10VDC
NEAR BREADBOARD AREA
+3.3VA +3.3V +5.0V GNDA
3.3V 5.0V REGULATOR
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+3.3VA
+3.3V +5.0V
+5.0V
MC33269
Size
ment mber Date:
EVM.DSN
Monday, June 1998
Development Tools
Sheet
MOTOROLA
Figure A-13. Power Supplies 3.3V 5.0V
MOTOROLA
DSP56F803
+3.3V +3.3VA +5.0V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF +3.3VA +3.3V +3.3V +5.0V +3.3V +3.3V
UNI-3 +5.0 VOLT GS72116
UNI-3 +3.3
INTERFACE
CONTROL HEADER
TIMER HEADER
0.1uF
0.1uF
HEADER CONNECTOR
+3.3VA +3.3V +3.3V +5.0V +3.3V +3.3V
ADM3311E
LM393
74HC244
ADDRESS CONNECTOR
+3.3V
DATA CONNECTOR
74AC04
+3.3V
74AC04
+3.3V
+3.3V
0.1uF 0.1uF 1.0uF 50VDC 0.1uF 0.01uF 0.1uF
0.1uF
0.01uF
0.01uF
0.1uF
U12B 5.1K 74AC04 TP52 TP53
U12D
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U12F U12E 5.1K 74AC04 TP55 TP56 5.1K 74AC04 TP54
5.1K
74AC04
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U12C
5.1K
74AC04
ATES ment mber Date:
EVM.DSN
Monday, June 1998
Development Tools
Sheet
A-15
Figure A-14. Bypass Capacitors Spare Gates
A-16
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MOTOROLA
Appendix 56F803EVM Bill Material
Description Ref. Designators Integrated Circuits DSP56F803BU80 GS72116TP-12 ADM3311EARS MC74HC244DW MC33269DT-5.0 MC33269DT-3.3 74AC04SC LM393 PCA82C250T U10, Resistors 5.1K R36, R37, R41, R43, R14, R39, R44, R59, R60, R16, R18, R20, R21, R66, R28, R46, R49, R52, R55, R58, SMEC RC73L2A16KOHMJT SMEC RC73L2A1MOHMJT SMEC RC73L2A5.1KOHMJT Motorola, DSP56F803BU80 GSI, GS72116TP-12 Analog Devices, ADM3311EARS Semiconductor, MC74HC244DW Semiconductor, MC33269DT-5.0 Semiconductor, MC33269DT-3.3 Fairchild, 74AC04SC National Semiconductor, LM393 Philips Semiconductor, PCA82C250T Vendor Part
SMEC RC73L2A10KOHMJT
SMEC RC73L2A51OHMJT SMEC RC73L2A470OHMJT SMEC RC73L2A10MOHMJT SMEC RC73L2A1KOHMJT
SMEC RC73L2A270OHMJT
MOTOROLA
56F803EVM Bill Material More Information This Product, www.freescale.com
Description
Ref. Designators Resistors (continued)
Vendor Part
1/4W
R47, R48, R50, R51, R53, R54, R56, Potentioneters
SMEC RC73L2A24OHMJT
YAGEO 120QBK
R40, Inductors
BC/MEPCOPAL ST4B103CT
1.0mH
LEDs
Fair-Rite 2743015112
Green
LED1, LED3, LED5, LED7, LED8 LED2, LED4, LED6 Diode
Hewlett-Packard HSMG-C650
Yellow
Hewlett-Packard HSMY-C650
FM4001
Capacitors
Vishay DL4001DICT
2.2µF, 0.1µF
C24, C26, C30, C31, C35, C36, C27, C32,
UWX1H2R2MCR2GB SMEC MCCE104K2NR-T1
0.01µF 470µF, 47µF, 1.0µF, 470pF
SMEC MCCE103K2NR-T1 PANASONIC ECE-V1CA471P PANASONIC ECE-V1AA470P UWT1H010MCR1GB SMEC MCCE471J2NO-T1
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MOTOROLA
Description
Ref. Designator Jumpers
Vendor Part
Bergstick Bergstick Bergstick Bergstick Bergstick Bergstick Bergstick Bergstick Bergstick Bergstick
JG3, JG8, JG2, JG4, JG5, JG9, JG10 JG6, Test Points
SAMTEC TSW-103-07-S-S SAMTEC TSW-104-07-S-D SAMTEC TSW-102-07-S-S SAMTEC TSW-103-07-S-T SAMTEC TSW-105-07-S-D SAMTEC TSW-104-07-S-S SAMTEC TSW-103-07-S-D SAMTEC TSW-109-07-S-D SAMTEC TSW-107-07-S-D 640456-6 SAMTEC TSW-106-07-S-D
Bergstick
TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, Crystals
Samtec TSW-101-07-S-S
8.00MHz Crystal
Connectors
ECS-80-18-5P
Shrouded DB25M Connector 2.1mm coax Power Connector DE9F Connector
Switches
2540-6002UB AMPHENOL 617-C025P-AJ121 Switch Craft RAPC-722 AMPHENOL 617-C009S-AJ120
SPDT Toggle SPST Pushbutton
Transistors
GT11MSCKE Panasonic EVQ-QS205K
2N2222A
Miscellaneous
ZETEX FMMT2222ACT
Shunt Rubber Feet
SH1-SH11 RF1-RF6
Samtec SNT-100-BL-T SJ5018BLKC
MOTOROLA
56F803EVM Bill Material More Information This Product, www.freescale.com
56F803EVM Hardware User's Manual More Information This Product, www.freescale.com
MOTOROLA
Index
Symbols
+12VDC power supply Automation viii Specification 2.0B viii Draft Recommendation DR-303-1, Cabling Connector Assignment Connector 2-23 Address 2-21 2-24 Data 2-22 Encoder/Timer Channel 2-20 External Memory Control 2-19 2-25 2-23 2-24 Timer Channel 2-20 Connectors Peripheral Expansion 2-19 Controller Area Network viii
Numerics
56F803 Technical Data 56F803EVM 4.0Amp power supply 2-11 64Kx16-bit data memory 64Kx16-bit program memory 8.00MHz crystal oscillator Port interface physical layer peripheral Development Card external memory expansion connectors external oscillator frequency input GPIO-compatible peripheral JTAG port interface MPIO-compatible peripheral On-board power regulation PWM-compatible peripheral real-time debugging RS-232 interface SCI-compatible peripheral SPI-compatible peripheral test points 2-25 Timer compatible peripheral UNI-3 connector/interface 2-12
Data memory Digital Signal Processor viii viii DSP56800 Family Manual DSP56F801/803/805/807 User's Manual
viii Analog-to Digital viii
Encoder/Hall-Effect circuits 2-17 Encoder/Timer Channel 2-20 Evaluation Module viii viii External Memory Control Signal 2-19 External Memory Interface Schematic Diagram
Back-EMF signals 2-16 voltages 2-16
viii termination bypass interface
FSRAM 2-1,
MOTOROLA
Index More Information This Product, www.freescale.com
General Purpose Input Output Port GPIO viii GPIO viii, 2-2, 2-13, 2-20, 2-21
MPIO Multi Purpose Input Output Port MPIO
OnCE OnCE(TM) On-Chip Emulation OnCE
Hall-Effect/Quadrature Encoder interface Host Parallel Interface Connector Host Target Interface 2-1, external
Phase Locked Loop Printed Circuit Board Program memory Pulse Width Modulation Group Interface LEDs 2-14 group signals 2-14 LEDs 2-14 outputs 2-14 signals 2-14
viii Integrated Circuit viii
Joint Test Action Group JTAG viii JTAG viii, 1-1, connector Jumper Group JG10 Jumper Options Jumper Settings
Quad Encoder 2-17 Quadrature Encoder/Hall-Effect 2-17
Random Access Memory Read Only Memory RS-232 cable connection interface Schematic Diagram
Logic motor over-current motor over-voltage motor zero crossing Low-Profile Quad Flat Pack LQFP viii LQFP viii
Serial Communications Port 2-23 Serial Communications Interface Serial Peripheral Interface Port
MOSI motor over-current over-voltage
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MOTOROLA
Serial Peripheral Interface 2-24 SRAM external data external program Static Random Access Memory SRAM
Timer Channel 2-20
UART UNI-3 interface connector 2-14, 2-16 Motor interface Universal Asynchronous Receiver/Transmitter UART
Zero-Crossing circuits 2-17 encoder interface 2-17
MOTOROLA
Index More Information This Product, www.freescale.com
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola Stylized Logo registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
MOTOROLA Stylized Logo registered Patent Trademark Office. other product service names property their respective owners. Motorola, Inc. 2003. reach USA/EUROPE/Locations Listed: Motorola Literature Distribution; P.O. 5405, Denver, Colorado 80217. 1-303-675-2140 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu. Minato-ku, Tokyo 106-8573 Japan. 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, King Street, Industrial Estate, N.T., Hong Kong. 852-26668334 Technical Information Center: 1-800-521-6274 HOME PAGE:
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DSP56F803EVMUM/D

56F803 Evaluation Module Hardware User's Manual Motorola, Inc., 2

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