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8-bit Proprietary Microcontroller F2MC-8L MB89930C Series MB
Top Searches for this datasheet8-bit Proprietary Microcontroller F2MC-8L MB89930C Series MB89P935C/PV930A DESCRIPTION MB89930C series line single-chip microcontrollers. addition compact instruction set, microcontrollers contain variety peripheral functions such timers, serial interfaces, converter external interrupts. FEATURES MB89600 Series core Minimum execution time: µs/10MHz Interrupt processing time: µs/10MHz ports: max. channels 21-bit timebase timer 8-bit timer 8/16-bit capture timer/counter 10-bit converter: channels UART 8-bit serial External interrput (Edge): channels External interrupt (Level): channels Wild Register: bytes OTPROM Read protection (Refer Programming OTPROM MB89P935C") Low-power consumption modes (sleep mode stop mode) SH-DIP package CMOS Technology PACKAGE 32-pin plastic 32-pin plastic SH-DIP 48-pin ceramic MQFP (DIP-32P-M01) (DIP-32P-M01) (MQP-48C-P01) (DIP-32P-M04) (DIP-32P-M05) (MQP-48C-P01) MB89930C Series PRODUCT LINEUP Part number Parameter Classification MB89P935C One-time PROM product (read protection) 8-bit (internal PROM) bits Number instructions: Instruction length: Instruction length: Data length: Minimum execution time: Minimum interrupt processing time: bits bytes bits µs(10 MHz) 57.6 µs(10 MHz) MB89PV930A Piggyback/evaluation product (for evaluation development) 8-bit (external EPROM) size size functions Ports 21-bit timebase timer Watchdog timer 8-bit timer General-purpose ports (CMOS): (also serve peripherals) ports N-ch open-drain type) 21-bit Interrupt cycle: 0.82, 3.3, 26.2, 419.4 10-MHz main clock Reset generation cycle: 209.7ms minimum 10-MHz main clock 8-bit interval timer operation (square output capable, operating clock cycle: tinst, tinst, tinst, 8/16-bit capture timer/counter output) 8-bit resolution operation (conversion cycle: tinst, 4096 tinst, 16384 tinst times 8/16-bit capture timer/counter output) 8-bit capture timer/counter channel 8-bit timer 16-bit capture timer/counter channel Capable event count operation square wave output using exteranl clock input with 8-bit timer 16-bit counter Transfer data length: 6/7/8 bits Transfer rate: 9600 bits first/MSB first selectable clock selectable from four operation clocks (one external shift clock, three internal shift clocks: tinst, tinst tinst) Output frequency: Pulse width cycle selectable channels (interrupt vector, request flag, request output enable) Edge selectable (Rising edge, falling edge, both edges) Also available resetting stop/sleep mode (Edge detectable even stop mode) channel with inputs (Independent L-level interrupt input enable) Also available resetting stop/sleep mode (Level detectable even stop mode) 10-bit precision channels conversion function (Conversion time: tinst) Continuous activation 8/16-bit timer/counter output timebase timer counter 8-bit Sleep mode Stop mode 3.0V 5.5V 2.7V 5.5V 8/16-bit capture timer/counter UART 8-bit Serial 12-bit timer External interrupt (wake-up function) External interrupt (wake-up function) 10-bit converter Wild Register Standby mode Power supply voltage Note: Tinst instruction cycle (execution time) which selected 1/4, 1/8, 1/16, 1/64 main clock. MB89930C Series PACKAGE CORRESPONDING PRODUCTS Package MB89P935C MB89PV930A DIP-32P-M04 DIP-32P-M05 MQP-48C-P01 Availabe available DIFFERENCES AMONG PRODUCTS Converter Power Supply (AVCC) Reference Voltage Input (AVR) There AVCC pins MB89P935C. They absent MB89PV930A. Hence, electrical characteristics MB89P935C different from that MB89PV930A. (Refer ELECTRICAL CHARACTERISTICS Converter Electrical Characteristics") Curent Consumption case MB89PV930A, current consumed EPROM which connected socket. MB89930C Series ASSIGNMENT (TOP VIEW) P04/INT24 P05/INT25 P06/INT26 P07/INT27 MOD0 MOD1 P37/BZ/PPG P36/INT12 P35/INT11 P34/TO/INT10 P33/EC P03/INT23/AN7 P02/INT22/AN6 P01/INT21/AN5 P00/INT20/AN4 P43/AN3 P42/AN2 P41/AN1 P40/AN0 AVcc AVss P50/PWM P30/UCK/SCK P31/UO/SO P32/UI/SI (DIP-32P-M04) (DIP-32P-M05) MB89930C Series (TOP VIEW) P35/INT11 N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. P34/TO/INT10 P33/EC P32/UI/SI P31/UO/SO P30/UCK/SCK P40/AN0 P41/AN1 P42/AN2 P43/AN3 P00/INT20/AN4 P01/INT21/AN5 P02/INT22/AN6 P36/INT12 P37/BZ/PPG MOD1 MOD0 P07/INT27 P06/INT26 P05/INT25 P04/INT24 Symbol N.C. P03/INT23/AN7 AVss N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. P50/PWM (MQP-48C-P01) Symbol N.C. Symbol N.C. Symbol N.C. N.C.: connected internally, use. MB89930C Series DESCRIPTION Number DIP*1 MQFP*2 Name MOD0 MOD1 Circuit Type Function Pins connecting crystal resonator main clock. external clock, input signal leave open. Memory access mode setting input pins. Connect directly Vss. Reset pin. N-ch open-drain type with pullup resistor hysteresis input well. outputs level when internal reset request present. Inputting level initializes internal circuits. General-purpose CMOS ports. These pins also serve input (wake-up input) external interrupt converter analog input. input external interrupt hysteresis input. General-purpose CMOS ports. These pins also serve input (wake-up input) external interrupt input external interrupt hysteresis input. General-purpose CMOS port. This also serves clock UART 8-bit serial I/O. resources hysteresis input. General-purpose CMOS port. This also serves data output UART 8-bit serial I/O. General-purpose CMOS port. This also serves data input UART 8-bit serial I/O. resources hysteresis input. General-purpose CMOS port. This also serves external clock input 8/16-bit capture timer/counter. resource hysteresis input. General-purpose CMOS port. This also serves output 8/16-bit capture timer/counter input external interrupt resource hysteresis input. General-purpose CMOS ports. These pins also serve input pins external interrupt resource hysteresis input. General-purpose CMOS port. This also serves buzzer output 12-bit programmable pulse generator output. General-purpose CMOS port. also serves 8-bit output pin. General-purpose CMOS ports. These pins also used N-channel open-drain ports. pins also serve converter analog input pins. P00/INT20/AN4 P03/INT23/AN7 P04/INT24 P07/INT27 P30/UCK/SCK P31/UO/SO P32/UI/SI P33/EC P34/TO/INT10 13,12 P35/INT11, P36/INT12 P37/BZ/PPG P50/PWM P40/AN0 P43/AN3 DIP-32P-M04 DIP-32P-M05 MQP-48C-P01 (Continued) MB89930C Series (Continued) DIP*1 MQFP*2 Name AVcc AVss Circuit Type Power supply Power (GND) Power supply converter. Power supply converter. Apply equal potential this pin. Reference voltage input converter. Capacitance regulating power supply. Connect external ceramic capacitor about 0.1µF Function DIP-32P-M04 DIP-32P-M05 MQP-48C-P01 MB89930C Series EPROM Socket (MB89PV930A only) Number MQFP Name level output Function Address output pins. Data input pins. Power supply (GND). Data input pins. Chip enable ROM. Outputs standby mode. Address output pin. Output enable ROM. Always outputs "L". Address output pins. Power supply EPROM. N.C. Internally connected pins. Always leave open. MB89930C Series CIRCUIT TYPE Circuit Type Circuit Remarks Crystal oscillation type Standby control signal CMOS input pull-up resistance (Pchannel) Approx. Hysteresis input CMOS output CMOS input Hysteresis input (Resource input) Selectable pull-up resistor Approx. CMOS output CMOS input Selectable pull-up resistor Approx. (Continued) MB89930C Series (Continued) open-drain control Analog input CMOS output CMOS input Analog input N-ch open-drain output available enable N-ch CMOS output CMOS input Hysteresis input (Resource input) Analog input Selectable pull-up resistor Approx. 50k. Analog input enable MB89930C Series HANDLING DEVICES Preventing Latchup Latchup occur CMOS voltage higher than lower than applied input output pins other than medium- high-voltage pins higher than voltage which shows Absolute Maximum Ratings" Electrical Characteristics" applied between VSS. When latchup occurs, power supply current increases rapidly might thermally damage elements. When using, take great care exceed absolute maximum ratings. Also, take care prevent analog power supply (AVCC AVR) analog input from exceeding digital power supply (VCC) when analog system power supply turned off. Treatment Unused Input Pins Leaving unused input pins open could cause malfunctions. They should connected pull-up pull-down resistor least kilohms between power supply. Treatment N.C. Pins sure leave (internally connected) N.C. pins open. Power Supply Voltage Fluctuations Although power supply voltage assured operate within rated range, rapid fluctuation voltage could cause malfunctions, even occurs within rated range. Stabilizing voltage supplied therefore important. stabilization guidelines, recommended control power that ripple fluctuations (P-P value) will less than standard value commercial frequency transient fluctuation rate will less than V/ms time momentary fluctuation such when power switched. Treatment Power Supply Pins Microcontrollers with Converter Connect AVCC AVSS even converter use. Precautions when Using External Clock When external clock used, oscillation stabilization time required power-on reset (optional) wakeup from stop mode. About Wild Register Function wild register debugged MB89PV930A. operation check, test MB89P935C installed target system. Program Execution When MB89PV930A used, program executed RAM. MB89930C Series PROGRAMMING EPROM WITH PIGGYBACK/EVALUATION DEVICE EPROM MBM27C256A-20TVM Programming Socket Adaptor program PROM using EPROM programmer, socket adaptor (manufacturer: Hayato Co., Ltd.) listed below. Package LCC-32 Adaptor socket part number ROM-32LC-28DP-S Inquiry: Hayato Co., Ltd.: 81-3-3986-0403 81-3-5396-9106 Memory Space Memory space each mode diagrammed below. Address 0000H Normal operating mode Corresponding addresses EPROM programmer 0080H 0880H 8000H available 0000H PROM 32KB EPROM 32KB FFFFH 7FFFH Programming EPROM EPROM programmer MBM27C256A. Load program data into EPROM programmer 0000H 7FFFH. Program 0000H 7FFFH with EPROM programmer. MB89930C Series PROGRAMMING OTPROM MB89P935C Memory Space Normal operating mode Address 0000H 0080H 512Byte 0280H Corresponding addresses programmer Address C000H C000H available PROM 16KByte PROM 16KByte FFFFH FFFFH Programming OTPROM program OTPROM using EPROM programmer AF200 (manufacturer: Yokogawa Digital Computer Corp.). Inquiry Yokogawa Digital Computer Corp. (81)-42-333-6224 program OTPROM using FUJITSU programmer MB91919-001. Inquiry Fujitsu Microelectronics Asia Ltd. (65)-2810770 (65)-2810220 Note Programming OTPROM MB89P935C serial programming mode only. MB89930C Series Programming Adaptor OTPROM program OTPROM using EPROM programmer AF200, programming adaptor (manufacturer: Hayato Co., Ltd.) listed below. Package DIP-32P-M04 DIP-32P-M05 Adaptor socket part number ROM3-FPT30M02-8LA-FJ available Inquiry Hayato Co., (81)-3-3986-0403 (81)-3-5396-9106 program OTPROM using FUJITSU programmer MB91919-001, programming adaptor listed below. Package DIP-32P-M04 DIP-32P-M05 Adaptor socket part number MB91919-809 MB91919-800 MB91919-814 MB91919-800 Inquiry Fujitsu Microelectronics Asia Ltd. (65)-2810770 (65)-2810220 OTPROM Content Protection OTPROM content read using serial programmer OTPROM content protection mechanism activated. predefined area OTPROM (FFFCH) assigned used preventing read access OTPROM content. protection code "00H" written this address (FFFCH), OTPROM content cannot read serial programmer. Note program written into OTPROM cannot verified once OTPROM protection code written ("00H" FFFCH). advised write OTPROM protection code last. MB89930C Series Block Diagram Oscillator circuit Clock control Timebase timer CMOS port 8bit Port P50/PWM Reset circuit CMOS port UART prescaler Switching serial function Port P04/ INT24 P07/ INT27 P00/ INT20 /AN4 P03/ INT23 /AN7 External interrupt (wake-up) Internal data UART P30/UCK/SCK P31/UO/SO P32/UI/SI AVcc AVss P40/AN0 P43/AN3 Port Port 10-bit converter 8-bit serial 8/16-bit capture timer/counter External interrupt (wake-up) P33/EC P34/TO/INT10 CMOS port (Nch-OD) P35/INT11 P36/INT12 512-byte F2MC-8L 16-KB Other pins Vcc,Vss,MOD1,MOD0,C Wild register 12bit P37/BZ/PPG Buzzer output CMOS port MB89930C Series CORE Memory Space microcontrollers MB89930C series offer memory space Kbytes storing I/O, data, program areas. area located lowest address. data area provided immediately above area. data area divided into register, stack direct areas according application. program area located exactly opposite end, that near highest address. Provide tables interrupt reset vectors vector call instructions toward highest address within program area. memory space MB89930C series structured illustrated below. Memory Space MB89P935C 0000H 0080H 512B 0100H 0200H 0280H Generalpurpose registers MB89PV930A 0000H 0080H 512B 0100H 0200H 0280H Generalpurpose registers available 8000H C000H available External EPROM PROM 16KB 32KB FFFFH FFFFH MB89930C Series Registers F2MC-8L family types registers; dedicated registers general-purpose registers memory. following dedicated registers provided: Program counter (PC): Accumulator (A): Temporary accumulator (T): Index register (IX): Extra pointer (EP): Stack pointer (SP): Program status (PS): 16-bit register indicating instruction storage positions 16-bit temporary register storing arithmetic operations, etc. When instruction 8-bit data processing instruction, lower byte used. 16-bit register which performs arithmetic operations with accumulator. When instruction 8-bit data processing instruction, lower byte used. 16-bit register index modification 16-bit pointer indicating memory address 16-bit register indicating stack area 16-bit register storing register pointer, condition code bits Program counter Accumulator Temporary accumulator Index register Extra pointer Stack pointer Program status Initial value FFFDH Undefined Undefined Undefined Undefined Undefined I-flag IL1, Other bits undefined. further divided into higher bits register bank pointer (RP) lower bits condition code register (CCR). (See diagram below.) Structure Program Status Register Vacancy Vacancy Vacancy IL1, initial value X011XXXXB Undefined H-flag I-flag IL1,0 N-flag Z-flag V-flag C-flag MB89930C Series indicates address register bank currently use. relationship between pointer contents actual address based conversion rule illustrated below. Rule Conversion Actual Addresses General-purpose Register Area Lower codes Generated addresses consists bits indicating results arithmetic operations contents transfer data bits control operations time interrupt. H-flag: when carry borrow from occurs result arithmetic operation. Cleared otherwise. This flag decimal adjustment instructions. I-flag: IL1, Interrupt allowed when this flag Interrupt prohibited when flag when reset. Indicates level interrupt currently allowed. Processes interrupt only request level higher than value indicated this bit. Interrupt level interrupt High-low High N-flag: result arithmetic operation. Cleared when Z-flag: V-flag: when arithmetic operation results Cleared otherwise. complement overflows result arithmetic operation. Reset overflow does occur. C-flag: when carry borrow from occurs result arithmetic operation. Cleared otherwise. shift-out value case shift instruction. MB89930C Series following general-purpose registers provided: General-purpose registers: 8-bit resister storing data general-purpose registers bits located register banks memory. bank contains eight registers. total banks used MB89930C series. bank currently indicated register bank pointer (RP). Register Bank Configuration This address 0100H (RP) banks Memory area MB89930C Series Address Register name PDR0 DDR0 SYCC STBC WDTC TBTC PDR3 DDR3 RSFR PDR4 DDR4 OUT4 PDR5 DDR5 RCR21 RCR22 RCR23 RCR24 BZCR TCCR TCR1 TCR0 TDR1 TDR0 TCPH TCPL TCR2 CNTR COMR EIC1 EIC2 Register Description Port data register Port data direction register (Reserved) System clock control register Standby control register Watchdog timer control register Timebase timer control register (Reserved) Port data register Port data direction register Reset flag register Port data register Port direction register Port output format register Port data register Port data direction register 12-bit control register 12-bit control register 12-bit control register 12-bit control register Buzzer register Capture control register Timer control register Timer control register Timer data register Timer data register Capture data register Capture data register Timer output control register (Reserved) control register compare register External interrupt control register External interrupt control register (Reserved) Read/Write Initial value XXXXXXXXB 00000000B 1-11100B 00010-B 0-XXXXB 00-000B XXXXXXXXB 00000000B XXXX-B -XXXXB -0000B -0000B 00000000B -000000B 0-000000B -000000B -000B 00000000B 00000000B 00000000B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB -00B 0-000000B XXXXXXXXB 00000000B -0000B Serial mode control register Serial rate control register Serial status data register 00000-00B -011000B 00100-1XB (Continued) MB89930C Series (Continued) Address ILR1 ILR2 ILR3 ILR4 PUL0 PUL3 PUL5 WRARH1 WRARL1 WRDR1 WRARH2 WRARL2 WRDR2 WREN WROR SSEL Serial mode register Serial data register Serial function switching register (Reserved) Upper-address setting register Lower-address setting register Data setting register Upper-address setting register Lower-address setting register Data setting register Wild-register enable register Wild-register data test register (Reserved) Port pull-up setting register Port pull-up setting register Port pull setting register (Reserved) Interrupt level setting register Interrupt level setting register Interrupt level setting register Interrupt level setting register Interrupt test register available 11111111B 11111111B 11111111B 11111111B -00B 00000000B 00000000B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXX00B -00B EIE2 EIF2 ADC1 ADC2 ADDH ADDL ADEN Register name SIDR SODR Register Description Serial input data register Serial output data register Clock division selection register (Reserved) converter control register converter control register converter data register converter data register enable register (Reserved) External interrupt control register1 External interrupt control register (Reserved) 00000000B XXXXXXXXB 00000000B -0000000B -0000001B -XXB XXXXXXXXB 00000000B Read/Write Initial value XXXXXXXXB 11111111B -0010B Unused, Undefined Note reserved area. MB89930C Series ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (AVSS Parameter Power supply voltage converter reference input voltage Input voltage Output voltage level maximum output current level average output current level total maximum output current level maximum output current level average output current level total maximum output current Power consumption Operating temperature Storage temperature Symbol AVCC IOL1 IOL2 IOLAV Value Min. Max. +150 Unit Average value (operating current operating rate) Pins excluding Average value (operating current operating rate) Remarks AVCC must exceed must exceed AVcc IOHAV Tstg WARNING: Semiconductor device permanently damaged application stress (voltage, current, temperature etc.) excess absolute maximum ratings. exceed these ratings. MB89930C Series Recommended Operating Conditions Parameter Symbol AVCC level input voltage VIHS level input voltage VILS Open-drain output application voltage Value Min. 3.0* Max. AVCC Unit P07, P37, P43, P50, UI/SI MOD0/1, RST, INT20 INT27, UCK/SCK, INT10 INT12 P07, P37, P43, P50, UI/SI MOD0/1, RST, INT20 INT27, UCK/SCK, INT10 INT12 (AVss Remarks Operation assurance range Retains state stop mode Power supply voltage converter reference input voltage Operating temperature This value depend operating conditions analog assurance range. Figure converter Electrical Characteristics." MB89930C Series Operating Voltage Analog accuracy assurance range Operation assurance range 10.0 Operating Freq. (MHz) Figure Operating Voltage Operating Frequency WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representatives beforehand. MB89930C Series Characteristics (AVCC AVSS MHZ(External clock), -40°C +85°C) Parameter Symbol P07, P37, P43, P50, UI/SI RST, MOD0/1, UCK/SCK, INT20 INT27, INT10 INT12 P37, P43, P50, UI/SI RST, MOD0/1, UCK/SCK, INT20 INT27, INT10 INT12 Condition Value Min. Typ. Max. Unit Remarks level input voltage VIHS level input voltage VILS Open-drain output application voltage level output voltage VOL1 level output voltage VOL2 Input leakage current Pull-up resistance P07, P37, -4.0mA P43, P07, P37, P50, 12.0 Without pullup resistor P07, P37, 0.45 P43, P50, MOD0/1 P07, P37, 0.0V P43, 10.0MHz Tinst= 0.4µs Main clock mode (External clock RPULL ICCS Power supply current ICCH operation) 10.0MHz Tinst= 0.4µs Main clock sleep mode Stop mode Ta=+250C When converting AVcc Input capacitance Other than AVCC, AVSS, AVR, VCC, When stops Ta=+250C MB89930C Series Characteristics Reset Timing (AVSS -40°C +85°C) Parameter pulse width Symbol tZLZH Condition Value Min. tHCYL* Max. Unit Remarks tHCYL oscillation cycle (1/FC) input pin. tZLZH Note: operation guaranteed when pulse width shorter than tZLZH. Power-on Reset (AVSS -40°C +85°C) Parameter Power supply rising time Power supply cut-off time Symbol tOFF Condition Value Min. Max. Unit repeated operations Remarks tOFF Note: supply voltage must minimum value required operation within prescribed default oscillation setting time. MB89930C Series Clock Timing (AVSS -40°C +85°C) Parameter Clock frequency Clock cycle time Input clock pulse width Input clock rising/falling time Symbol tHCYL Condition Value Min. Max. 1000 Unit Remarks Timing Conditions tHCYL Main Clock Conditions When crystal ceramic reasonator used When external clock used Open Instruction Cycle Parameter Instruction cycle (minimum execution time) Symbol tinst Value 4/FCH, 8/FCH, 16/FCH, 64/FCH Unit Remarks tinst when operating (4/FCH) MB89930C Series Peripheral Input Timing (AVCC 10%, AVSS -40°C +85°C) Parameter Peripheral input pulse width Peripheral input pulse width Symbol tILIH tIHIL INT10 INT12, INT20 INT27, Value Min. tinst* tinst* Max. Unit Remarks information tinst, "(4) Instruction Cycle." INT10 INT12, INT20 INT27, tIHIL tILIH (AVCC 10%, AVSS -40°C +85°C) Parameter Peripheral input noise limit Peripheral input noise limit Symbol tIHNC tILNC INT10 INT12, Value Min. Typ. Max. Unit Remarks information tinst, "(4) Instruction Cycle." INT10 INT12, tILNC tIHNC MB89930C Series UART, Serial Timing (AVCC AVSS VSS= -40°C +85°C) Parameter Serial clock cycle time UCK/SCK time Valid UCK/SCK UCK/SCK valid hold time Serial clock pulse width Serial clock pulse width UCK/SCK time Valid UCK/SCK UCK/SCK valid hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX UCK/SCK UCK/SCK, UCK/SCK, UCK/SCK, UCK/SCK UCK/SCK UCK/SCK, UCK/SCK, UCK/SCK, External shift clock mode Internal shift clock mode Condition Value Min. tinst* -200 tinst* tinst* tinst* tinst* tinst* tinst* Max. Unit information tinst, "(4) Instruction Cycle." Internal Shift Clock Mode tSCYC UCK/SCK tSLOV tIVSH tSHIX External Shift Clock Mode tSLSH tSHSL UCK/SCK tSLOV tIVSH tSHIX MB89930C Series Converter Electrical Characteristics Converter Electrical Characteristics AVCC +10%, AVSS -40°C +85°C) Parameter Resolution Total error Symbol Value Min. Typ. Max. +3.0 +5.0 +2.5 +3.0 +1.9 +2.5 Unit MB89P935C MB89PV930A MB89P935C MB89PV930A MB89P935C MB89PV930A MB89P935C MB89PV930A MB89P935C MB89PV930A Remarks Linearity error Differential linearity error Zero transition voltage Full-scale transition voltage mode conversion time Analog port input current Analog input voltage Reference voltage Reference voltage supply current AVSS AVSS AVSS AVSS AVSS AVSS tinst* AVCC VFST IAIN VAIN AVSS AVSS start stop information tinst, "(4) Instruction Cycle" Characteristics." Converter Glossary Resolution Analog changes that identifiable with converter When number bits analog voltage divided into 1024. Linearity error (unit: LSB) deviation straight line connecting zero transition point ("00 0000 0000" 0000 0001") with full-scale transition point ("11 1111 1111" 1111 1110") from actual conversion characteristics. Differential linearity error (unit: LSB) deviation input voltage needed change output code from theoretical value. Total error (unit: LSB) difference between theoretical actual conversion values. MB89930C Series Theoretical characteristics VFST Total error Actual conversion value VOT} Digital output AVSS Analog input AVCC Digital output Actual conversion value Theoretical value AVSS AVCC Analog input VFST 1022 Total error LSB} Full-scale transition error Zero transition error Actual conversion value Theoretical value Actual conversion value Digital output Digital output VFST (Actual measurement) Actual conversion value AVCC Actual conversion value (Actual measurement) AVSS Analog input Analog input Linearity error Actual conversion value VOT} VFST (Actual measurement) Differential linearity error Theoretical value Actual conversion value Digital output Digital output AVSS Analog input Theoretical value Actual conversion value Actual conversion value AVCC Analog input (Actual measurement) AVCC AVSS Linearity error VOT} Differential linearity error MB89930C Series Notes Using Converter Input impedance analog input pins converter used MB89930C series contains sample hold circuit illustrated below fetch analog input voltage into sample hold capacitor instruction cycles after activation conversion. this reason, output impedance external circuit analog input high, analog input voltage might stabilize within analog input sampling period. Therefore, recommended keep output impedance external circuit (below 4k). Note that impedance cannot kept low, recommended connect external capacitor about analog input pin. Analog Input Circuit Model Analog input Sample hold circuit Comparator analog input impedance higher than recommended connect external capacitor approx. Close instruction cycles after activating conversion. Analog channel selector Error smaller |AVR AVSS|, greater error would become relatively. MB89930C Series EXAMPLE CHARACTERISTICS Power Supply Current (External Clock) MB89P935A Main Clock Operation (Highest Clock Gear) (mA) 10MHz 8MHz 4MHz Iccs (mA) MB89P935A Main Sleep Operation (Highest Clock Gear) Iccs 10MHz 8MHz 4MHz MB89930C Series INSTRUCTIONS Execution instructions divided into following four groups: Transfer Arithmetic operation Branch Others Table lists symbols used notation instructions. Table Instruction Symbols Symbol #vct #d16 dir: Direct address bits) Offset bits) Extended address bits) Vector table number bits) Immediate data bits) Immediate data bits) direct address (8:3 bits) Branch relative address bits) Meaning Register indirect (Example: @IX, @EP) Accumulator (Whether length bits determined instruction use.) Upper bits accumulator bits) Lower bits accumulator bits) Temporary accumulator (Whether length bits determined instruction use.) Upper bits temporary accumulator bits) Lower bits temporary accumulator bits) Index register bits) (Continued) MB89930C Series (Continued) Symbol Extra pointer bits) Program counter bits) Stack pointer bits) Program status bits) Meaning Accumulator index register bits) Condition code register bits) Register bank pointer bits) General-purpose register bits, Indicates that very immediate data. (Whether length bits determined instruction use.) Indicates that contents target accessing. (Whether length bits determined instruction use.) address indicated contents target accessing. (Whether length bits determined instruction use.) Columns indicate following: Mnemonic: Operation: Assembler notation instruction Number instructions Number bytes Operation instruction content change when each instructions executed. Symbols column indicate following: indicates change. upper bits operation description data. must become contents immediately before instruction executed. becomes code: instruction which corresponding flag will change. written this column, relevant instruction will change corresponding flag. Code instruction. instruction more than code, written according following rule: Example: This indicates MB89930C Series Table Table Transfer Instructions instructions) Mnemonic dir,A +off,A ext,A @EP,A Ri,A A,#d8 A,dir A,@IX +off A,ext A,@A A,@EP A,Ri dir,#d8 +off,#d8 @EP,#d8 Ri,#d8 MOVW dir,A MOVW +off,A MOVW ext,A MOVW @EP,A MOVW EP,A MOVW A,#d16 MOVW A,dir MOVW A,@IX +off MOVW A,ext MOVW A,@A MOVW A,@EP MOVW A,EP MOVW EP,#d16 MOVW IX,A MOVW A,IX MOVW SP,A MOVW A,SP @A,T MOVW @A,T MOVW IX,#d16 MOVW A,PS MOVW PS,A MOVW SP,#d16 SWAP SETB dir: CLRB dir: XCHW XCHW A,EP XCHW A,IX XCHW A,SP MOVW A,PC Operation (dir) (IX) +off (ext) (EP) (Ri) (dir) (IX) +off) (ext) (EP) (Ri) (dir) (IX) +off (EP) (Ri) (dir) (AH),(dir (AL) (IX) +off) (AH), (IX) +off (AL) (ext) (AH), (ext (AL) (EP) (AH),( (EP) (AL) (EP) (AH) (dir), (AL) (dir (AH) (IX) +off), (AL) (IX) +off (AH) (ext), (AL) (ext (AH) (AL) (AH) (EP) (AL) (EP) (EP) (EP) (IX) (IX) (SP) (SP) (TH),( (TL) (IX) (PS) (PS) (SP) (AH) (AL) (dir): (dir): (AL) (TL) (EP) (IX) (SP) (PC) NZVC ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++++ ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- code Notes: During byte transfer restricted bytes. Operands more than operand instruction must stored order which their mnemonics written. (Reverse arrangement F2MC-8 family) MB89930C Series Table Table Arithmetic Operation Instructions instructions) Mnemonic ADDC A,Ri ADDC A,#d8 ADDC A,dir ADDC A,@IX +off ADDC A,@EP ADDCW ADDC SUBC A,Ri SUBC A,#d8 SUBC A,dir SUBC A,@IX +off SUBC A,@EP SUBCW SUBC INCW INCW INCW DECW DECW DECW MULU DIVU ANDW XORW CMPW RORC ROLC A,#d8 A,dir A,@EP A,@IX +off A,Ri A,#d8 A,dir A,@EP A,@IX +off A,Ri A,#d8 A,dir Operation (Ri) (dir) (IX) +off) (EP) (AL) (AL) (TL) (Ri) (dir) (IX) +off) (EP) (AL) (TL) (AL) (Ri) (Ri) (EP) (EP) (IX) (IX) (Ri) (Ri) (EP) (EP) (IX) (IX) (AL) (TL) (AL),MOD (TL) (AL) NZVC ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ +++- ---- ---- ++-- +++- ---- ---- ++-- ---- ---- ++R- ++R- ++R- ++++ ++++ ++-+ ++-+ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- code (Continued) (dir) (EP) (IX) +off) (Ri) Decimal adjust addition Decimal adjust subtraction (AL) (TL) (AL) (AL) (dir) (AL) (EP) (AL) (IX) +off) (AL) (Ri) (AL) (TL) (AL) (AL) (dir) MB89930C Series (Continued) Mnemonic A,@EP A,@IX +off A,Ri A,#d8 A,dir A,@EP A,@IX +off A,Ri dir,#d8 @EP,#d8 +off,#d8 Ri,#d8 INCW DECW Operation (AL) (EP) (AL) (IX) +off) (AL) (Ri) (AL) (TL) (AL) (AL) (dir) (AL) (EP) (AL) (IX) +off) (AL) (Ri) (dir) (EP) (IX) off) (Ri) (SP) (SP) (SP) (SP) Table NZVC ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++++ ++++ ++++ ++++ ---- ---- code Table Branch Instructions instructions) Mnemonic BZ/BEQ BNZ/BNE BC/BLO BNC/BHS dir: b,rel dir: b,rel CALLV #vct CALL XCHW A,PC RETI Operation then then then then then then then then (dir: then (dir: then (PC) (PC) Vector call Subroutine call (PC) (A),(A) (PC) Return from subrountine Return form interrupt Table NZVC ---- ---- ---- ---- ---- ---- ---- ---- -+-- -+-- ---- ---- ---- ---- ---- ---- Restore code Table Other Instructions instructions) Mnemonic PUSHW POPW PUSHW POPW CLRC SETC CLRI SETI Operation NZVC ---- ---- ---- ---- ---- ---R ---S ---- ---- code PUSHW POPW MOVW CLRI A,ext A,PS SETC SETI CLRB INCW DECW MOVW dir: dir: 0,rel A,PC SWAP RETI MULU DIVU CALL PUSHW POPW MOVW CLRC addr16 addr16 ext,A PS,A CLRB INCW DECW MOVW MOVW dir: dir: 1,rel SP,A A,SP ROLC ADDC SUBC CLRB INCW DECW MOVW MOVW @A,T A,@A dir: dir: 2,rel IX,A A,IX INSTRUCTION RORC CMPW A,#d8 A,#d8 A,#d8 ADDCW SUBCW XCHW XORW ANDW MOVW MOVW CLRB INCW DECW MOVW MOVW @A,T A,@A dir: dir: 3,rel EP,A A,EP CLRB MOVW MOVW MOVW XCHW dir: dir: 4,rel A,ext ext,A A,#d16 A,PC ADDC SUBC A,#d8 A,#d8 A,#d8 A,#d8 ADDC SUBC CLRB MOVW MOVW MOVW XCHW A,dir A,dir A,dir A,dir dir,A A,dir A,dir A,dir dir,#d8 dir,#d8 dir: dir: 5,rel A,dir dir,A SP,#d16 A,SP +d,A @A,IX A,@IX A,@IX CLRB MOVW MOVW MOVW XCHW dir: dir: 6,rel A,@IX IX,#d16 A,IX +d,#d8 +d,#d8 +d,A A,@IX A,@IX ADDC A,@IX SUBC A,@IX ADDC SUBC CLRB MOVW MOVW MOVW XCHW A,@EP A,@EP A,@EP A,@EP @EP,A A,@EP A,@EP A,@EP @EP,#d8 @EP,#d8 dir: dir: 7,rel A,@EP @EP,A EP,#d16 A,EP CALLV CALLV CALLV CALLV CALLV CALLV ADDC SUBC SETB A,R0 A,R0 A,R0 A,R0 R0,A A,R0 A,R0 A,R0 R0,#d8 R0,#d8 dir: dir: 0,rel ADDC SUBC SETB A,R1 A,R1 A,R1 A,R1 R1,A A,R1 A,R1 A,R1 R1,#d8 R1,#d8 dir: dir: 1,rel ADDC SUBC SETB A,R2 A,R2 A,R2 A,R2 R2,A A,R2 A,R2 A,R2 R2,#d8 R2,#d8 dir: dir: 2,rel ADDC SUBC SETB A,R3 A,R3 A,R3 A,R3 R3,A A,R3 A,R3 A,R3 R3,#d8 R3,#d8 dir: dir: 3,rel ADDC SUBC SETB A,R4 A,R4 A,R4 A,R4 R4,A A,R4 A,R4 A,R4 R4,#d8 R4,#d8 dir: dir: 4,rel ADDC SUBC SETB A,R5 A,R5 A,R5 A,R5 R5,A A,R5 A,R5 A,R5 R5,#d8 R5,#d8 dir: dir: 5,rel CALLV CALLV ADDC SUBC SETB A,R6 A,R6 A,R6 A,R6 R6,A A,R6 A,R6 A,R6 R6,#d8 R6,#d8 dir: dir: 6,rel MB89930C Series ADDC SUBC SETB A,R7 A,R7 A,R7 A,R7 R7,A A,R7 A,R7 A,R7 R7,#d8 R7,#d8 dir: dir: 7,rel MB89930C Series ORDERING INFORMATION Part number MB89P935CP MB89P935CP-G-SH MB89PV930ACF Package 32-pin Plastic (DIP-32P-M04) 32-pin Plastic SH-DIP (DIP-32P-M05) 48-pin Ceramic MQFP (MQP-48C-P01) Remarks MB89930C Series PACKAGE DIMENSIONS 32-pin Plastic DIP-32P-M04 41.91±0.127 (1.65±0.005) 13.97±0.127 (.550±.005) 2.159±.127 (.085±.005) 4.572±0.254 (.18±.01) 3.30(.130) 0.635±0.127 (.025±.005) 0.254(.010) 0.457(.018) 1.905±0.127 (.075±.005) 1.27(.050) 2.54(.100) 15.24(.600) 1.842±.127 (.0725±.005) 2001 FUJITSU LIMITED Dimensions (inches) 32-pin Plastic SH-DIP DIP-32P-M05 28.03±0.10 (1.104±.004) 8.90±0.15 (.350±.006) 10.16 (.400) 11.2±0.3 (.441±.012) 0.27±0.05 (.011±.002) 4.7±0.15 (.185±.006) 3.3±0.20 (.130±.008) 1.778 (.0700) 1.00 (.039) 0.45 (.018) 0.73 (.029) 2002 FUJITSU LIMITED D32017Sc-1-1 Dimensions (inches) MB89930C Series 48-pin Ceramic MQFP MQP-48C-P01 (MQP-48C-P01) Dimensions (inches) MB89930C Series MEMO MB89930C Series FUJITSU LIMITED further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 http://www.fujitsu.co.jp/ North South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street Jose, 95134-1804, Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. Fri.: (PST) Tel: (800) 866-8608 Fax: (408) 922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MIKROELEKTRONIK GmbH Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 http://www.fujitsu-ede.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA #05-08, Lorong Chuan Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ Rights Reserved. Circuit diagrams utilizing Fujitsu products included means illustrating typical semiconductor applications. Complete information sufficient construction purposes necessarily given. information contained this document been carefully checked believed reliable. However, Fujitsu assumes responsibility inaccuracies. information contained this document does convey license under copyrights, patent rights trademarks claimed owned Fujitsu. Fujitsu reserves right change products specifications without notice. part this publication copied reproduced form means, transferred third party without prior written consent Fujitsu. information contained this document intended with equipments which require extremely high reliability such aerospace equipments, undersea repeaters, nuclear control systems medical equipments life support. Other recent searchesuPD753204 - uPD753204 uPD753204 Datasheet SMB10 - SMB10 SMB10 Datasheet KCSC02-138 - KCSC02-138 KCSC02-138 Datasheet KA5Q0740RT - KA5Q0740RT KA5Q0740RT Datasheet F1740-3550 - F1740-3550 F1740-3550 Datasheet F1740-3558 - F1740-3558 F1740-3558 Datasheet BAT54S - BAT54S BAT54S Datasheet 2SA1823 - 2SA1823 2SA1823 Datasheet
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