AK2500B DS3/STS-1 Analog Line Receiver GENERAL DESCRIPTION
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[AK2500B]
AK2500B
DS3/STS-1 Analog Line Receiver
GENERAL DESCRIPTION
AK2500B based line receiver. provides analog receive line interface functions 44.736 51.84 STS-1 interface. device operates from single +3.3 Volt supply transparent framing format.
FEATURE
"Robust" based line receiver AK2500B Provides Complete Analog Line Receiver STS-1 Applications Provides Line Equalization, Clock Data Recovery Functions
PACKAGE
APPLICATIONS
Interfacing network transmission equipment such SONET multiplexor DSX3 cross connect. Interfacing customer premises equipment line.
BLOCK DIAGRAM
RLOL
TREF
BREF
IREF
RCLK
CLOCK RECOVERY
EXCLK
RPDATA RNDATA
DATA RECOVERY
GAIN LINE EQUALIZATION
VDDA VSSA VDDD VSSD VDDC VSSC LOSTHR RLOS MODE2 MODE1 RESET LOGIC
MS0005-E-00
1999/12
[AK2500B]
LOCATION
Package
IREF LOSTHR RLOL VDDA VDDA RESET BREF TREF VSSA VSSD RLOS
MODE2 MODE1 VSSA VSSA VSSC RPDATA RNDATA RCLK VDDC VDDA VDDD EXCLK
AK2500B
MS0005-E-00
1999/12
[AK2500B]
CONDITION
Note: 1)External resister kohm connected between IREF VSS. 2)Input impedance more than 5kohm. 3)Pulled with internal register. (typical ohm) Name IREF LOSTHR RLOL VDDA VDDA RESET BREF TREF VSSA VSSD RLOS EXCLK VDDD VDDA VDDC RCLK RNDATA RPDATA VSSC VSSA VSSA MODE1 MODE2 Analog Analog CMOS CMOS CMOS 15pF 15pF 15pF CMOS CMOS 15pF CMOS Analog Analog Note Type Analog Analog CMOS Analog 15pF Note Maximum load Minimum load Status Reset
Remarks
Note
MS0005-E-00
1999/12
[AK2500B]
DESCRIPTION
Name IREF Function Current reference output determined external resister. External resistance kohm(+/-1%) should connected between this VSSA. Loss Signal Threshold Control voltage forced this controls input loss-of-signal threshold. Three settings provided forcing GND, VDD/2, LOSTHR (see Table Receive Loss-of-Lock Active High alarm. recovered clock frequency larger than approximately 0.5% EXCLK, RLOL alarm goes High. Receive Input Unbalanced analog receive input. B3ZS receive signal input this pins. Data clock recovered output RPDATA, RNDATA RCLK. Power Supply analog part. +3.3 volts. Active RESET. Pulled with internal resister. Bottom voltage reference level output. external capacitor (0.1uF±20%) should connected between this VSSA. voltage reference level output. external capacitor (0.1uF±20%) should connected between this VSSA. Ground analog part. volts. Ground digital part. volts. Receive Loss-of-Signal. This high loss incoming signal RIN. External Reference Clock. valid STS-1 clock must provided this input. duty cycle EXCLK, referenced VDD/2 levels, must 60%. EXCLK frequency determines operating frequency device. Power Supply digital part. +3.3 volts Power Supply analog part. +3.3 volts. Power Supply output buffer. +3.3 volts. Recovered Clock. Receive Negative Data. Receive Positive Data. Ground output buffer. volts. Ground analog part. volts. Mode Control. Equalizer enable/bypass mode, Test mode selectable shown Table
LOSTHR
RLOL
VDDA VDDA RESET BREF
TREF VSSA VSSD RLOS
EXCLK VDDD VDDA VDDC RCLK RNDATA RPDATA VSSC VSSA VSSA MODE1 MODE2
MS0005-E-00
1999/12
[AK2500B]
FUNCTIONAL DESCRIPTION
AK2500B provides basic receiver functions high-speed line card shown Fig.7. receiver extracts data clock from B3ZS coded signal outputs clock synchronized data.
Signal Requirements
Pulse characteristics specified DSX-3. Table Interface Specification Parameter Line Rate Line Code Test Load Standards 44.736Mbps±20ppm B3ZS 75±5% GR-499-CORE ANSI T1-102 T1.404 Specification
Table STS-1 Interface Specification Parameter Line Rate Line Code Test Load Standards 51.840Mbps±20ppm B3ZS 75±5% GR-253-CORE ANSI T1-102 Specification
Equalization
incoming data have loss cable and/or flat. Cable type length from cross-connect specified shown Table Equalizer compensates appropriately nominal DSX-3/STS-1 pulse attenuated feet 728A cable. Table DS3/STS-1 Cable Specification Parameter Cable Type Cable Length Specification Type 728A coaxial cable equivalent) feet (from DSX-3 point)
MS0005-E-00
1999/12
[AK2500B]
Equalizer Bypass
incoming signal attenuated flat loss only (zero cable loss), internal equalizer should bypassed with MODE1=1, MODE2=1. (See Table level incoming signal should satisfy input range (50mVpk 1000mVpk DS3/STS-1). Table Mode Control MODE2 (pin24) MODE1 (pin23) OPEN Function Equalizer Enable TEST MODE (Factory only) Equalizer Bypass
DSX-3 (1)Cable loss 450feet Flat loss Cable 450feet Flat Loss AK2500B
MODE2 MODE1
Equalizer enable
Flat Loss (2)Flat loss only Transmitter
Monitoring circuit
AK2500B
MODE2 MODE1
Equalizer bypass
Fig. AK2500B Application
Clock Acquisition
valid input signal assumed already present analog input, maximum time between application device power error-free operation typically Table Lock Acquisition Time
Tmin Tmax; 3.3V±0.3V;
Power Input data restore
Conditions Power Input data Valid Power Input data Loss Valid
Units
MS0005-E-00
1999/12
[AK2500B]
Output Jitter
Typical output jitter characteristics shown table ANALOG SPECIFICATIONS (page.11).
Jitter Transfer
Jitter transfer characteristics shown table ANALOG SPECIFICATIONS (page.11).
Jitter Tolerance
Compliance with GR-499-CORE, GR-253-CORE, ITU-T G.752, G.824 Typical jitter tolerance characteristics shown table ANALOG SPECIFICATIONS (page.11).
Loss-of-Lock Detection
recovered clock frequency larger than approximately 0.5% EXCLK, RLOL alarm goes High.
External Reference Clock
external reference clock EXCLK used frequency PLL. frequency EXCLK should within ideal clock±100ppm.
Reset
AK2500B/01B goes into RESET status RESET input low. Output pins status follows during input RESET RLOS, RLOL High
RPDATA, RNDATA, RCLK
MS0005-E-00
1999/12
[AK2500B]
Loss Signal
This device detects loss signal analog digital methods. RLOS goes high either analog digital loss detected.
Analog Loss Signal(ALOS)
Analog loss detector operates follows. Analog loss detector monitors peak level incoming signal. peak level falls below Alarm threshold shown Table output pins status follows. RLOS High RPDATA: RNDATA: RCLK Recovered from EXCLK
Table Analog Loss-of-Signal thresholds LOSTHR Voltage VDD/2 Clear Alarm Level Min. Upper Threshold Max. Upper Threshold Alarm Level Min. Lower Threshold Max. Lower Threshold Units
Notes: Alarm Level 0.5dB lower than Clear Alarm Level Measured with PN20 pattern, 450ft cable loss, flat loss
MS0005-E-00
1999/12
[AK2500B]
Digital Loss Signal(DLOS)
Digital loss detector operates follows. digital loss detector monitors consecutive density recovered data. RLOS high 175±5 consecutive detected. RPDATA,RNDATA ALOS detected. RLOS density consecutive bits) consecutive bits detected.
Normal Operation
RCLK Recovered from data RPDATA Recovered data RNDATA Recovered data RLOS 175bits incoming data includes following data. 58bits (33% density) 100bits consecutive
bits consecutive incoming data
DLOS
RCLK Recovered from data RPDATA Recovered data RNDATA Recovered data RLOS Peak level incoming data Alarm Threshold Level High
Peak level incoming data
Clear Alarm Threshold Level
ALOS
RCLK Recovered from EXCLK RPDATA RNDATA RLOS High
Fig. Loss Signal state diagram
MS0005-E-00
1999/12
[AK2500B]
ABSOLUTE MAXIMUM RATINGS
Parameter Supply (referenced GND) (Note Input Voltage, Input Current, (Note Ambient Operating Temperature Storage Temperature Power Dissipation Symbol tstg -0.3 GND-0.3 (V+)+0.3 Units
Normal
WARNING: Operation beyond these limits result permanent damage device. operation guaranteed these extremes. Note; 1.GND=VSSA=VSSC=VSSD=0V 2.Transient currents will cause latch
RECOMMENDED OPERATING CONDITIONS
Parameter Supply (referenced GND) Ambient Operating Temperature Supply Current: STS-1 EXCLK Frequency STS-1 PN20 PN20 44.736 100ppm 51.84 100ppm 44.736 51.84 44.736 100ppm 51.84 100ppm Symbol Condition Units
MS0005-E-00
1999/12
[AK2500B]
ANALOG SPECIFICATIONS
Tmin Tmax; 3.3V±0.3V;
Parameter Jitter Transfer
Condition Bandwidth
0.05
Units UIpp UIpp UIpp UIpp UIpp
with repetitive pattern (Note Peaking Jitter Tolerance (Including cable loss)
(Note
5kHz 10kHz 60kHz 300kHz 1MHz one's pattern Repetitive 1000 pattern
Signal Noise Immunity (Note Output Jitter with Jitter-Free Input
(Note4)
1000
nsp-p nsp-p mVpk bits bits
Output Clock Duty Cycle (Note4) Receiver Input Range DLOS detection RPDATA Delay Time
Note; Measured with repetitive input nominal DSX-3 level with (V+)=3.3V, TA=25°C Typical performance shown Fig. Measured with sinusoidal noise, peak amplitude noise 11dB down from peak amplitude signal. noise frequency 22MHz±22kHz(DS3), 26MHz±26kHz(STS-1).
3.2k, 14UIpp G.752 GR-499 Category GR-499 Category
Jitter Amplitude [UIpp]
AK2500B Typical performance
300k, 0.3UIpp 0.05UIpp
0.01 0.01 1000 10000
Jitter Frequency [kHz]
Fig. Jitter Tolerance(STS-1)
MS0005-E-00
1999/12
[AK2500B]
SWITCHING SPECIFICATIONS
Tmin Tmax; 3.3V±0.3V; Input: Logic Logic Parameter RCLK Pulse Width
(Note
Symbol tpwh tpwl tpwh1 tdcrd tscrd thcrd
10.1 10.1
11.177 11.177
12.2 12.2
Units
EXCLK Duty Cycle (EXCLK Rise/Fall time 5ns) Rise Time, RCLK Fall Time, RCLK
(Note (Note
Delay time from RCLK rising RDATA(Note Setup time from RCLK falling RDATA(Note Hold time from RCLK falling RDATA(Note
STS-1 SWITCHING SPECIFICATIONS
Tmin Tmax; 3.3V±0.3V; Input: Logic Logic Parameter Symbol RCLK Pulse Width
(Note
Units
tpwh tpwl tpwh1/tpw tdcrd tscrd
9.645 9.645
10.6 10.6
EXCLK Duty Cycle(EXCLK Rise/Fall time 5ns) Rise Time, RCLK Fall Time, RCLK
(Note (Note
Delay time from RCLK rising RDATA(Note Setup time from RCLK falling RDATA(Note
Hold time from RCLK falling RDATA(Note thcrd Note; Assumes locked 44.736 signal. pulse widths must always meet frequency specifications. load Assumes locked 51.84 signal.
DIGITAL CHARACTERISTICS
Tmin Tmax; 3.3V±0.3V; Parameter Symbol High-Level Input Voltage Low-Level Input Voltage
(Note (Note
(V+) (V+)
(V+) (V+)
Units
High-Level Output Voltage(Note 15,16) IOUT=-40uA Low-Level Output Voltage IOUT=1.6mA (Note 15), 0.4mA (Note Input Leakage Current (Note Note; Pins RESET Pins RCLK, RPDATA, RNDATA MS0005-E-00
Pins RLOS, RLOL Except RESET
1999/12
[AK2500B]
RCLK
Fig. Signal Rise Fall Characteristics
RCLK RPDATA
dcrd
RNDATA scrd hcrd
Fig. Recovered Clock Data Switching Characteristics
pwh1
VDD/2
EXCLK
Fig. EXCLK Duty Cycle Requirements
MS0005-E-00
1999/12
[AK2500B]
Application Circuit Example
FRAMER B3ZS CODER/ DECODER
RCLK 0.01uF RPDATA RNDATA COAX 75ohm
AK2500B
CLOCK SOURCE EXCLK VDDC VDDA CONTROL LOGIC RLOL RLOS LOSTHR MODE2 MODE1 VSSD VSSA VSSC BREF 0.1uF TREF 0.1uF IREF 4.9kohm VDDD
3.3V
0.1uF 0.1uF 0.1uF
RESET
Fig.
Application circuit example
Board Layout Consideratons
recommended power supply de-coupling circuit illustrated Figure Good quality high-frequency, lead-inductance capacitors should used. performance Jitter Tolerance good, please smaller de-coupling capacitors such 0.01uF. These performances affected power supply noise which depends customer's board circuit layout. capacitors should close device possible.
MS0005-E-00
1999/12
[AK2500B]
Marking
(1)Pin indication (2)Date Code: 7digits XXXXYZZ (3)Marketing Code: AK2500B (4)Country Origin: JAPAN (5)Asahi Kasei Logo
AK2500B XXXXYZZ JAPAN
MS0005-E-00
1999/12
[AK2500B]
Outline Dimensions
MS0005-E-00
1999/12
[AK2500B]
IMPORTANT NOTICE These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
MS0005-E-00
1999/12
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