µPA1703 DESCRIPTION This product N-Channel Field Effect Tran

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µPA1703 DESCRIPTION This product N-Channel Field Effect Tran

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FIELD EFFECT POWER TRANSISTORS
µPA1703
DESCRIPTION
This product N-Channel Field Effect Transistor designed power management applications notebook computers.
PACKAGE DIMENSIONS
millimeter)
FEATURES
Super On-Resistance RDS(on)1 10.5 RDS(on)2 Ciss MAX. (VGS MAX. (VGS
5.37 MAX.
+0.10 -0.05
Source Gate Drain
Ciss 2180 TYP.
1.44 MAX.
±0.3
Built-in Protection Diode Small Surface Mount Package (Power SOP8)
0.15
0.05 MIN.
±0.2 0.10
1.27 0.78 MAX. 0.40
+0.10 -0.05
0.12
ABSOLUTE MAXIMUM RATINGS terminals connected)
Drain Source Voltage Gate Source Voltage Drain Current (DC) Drain Current (pulse)
Notes1 Notes2
VDSS VGSS ID(DC) ID(pulse) Tstg
+150
Gate Gate Protection Diode Body Diode Drain
Total Power Dissipation Channel Temperature Storage Temperature Notes
Source
Duty Cycle Mounted ceramic substrate 1200
diode connected between gate source transistor serves protector against ESD. When this device acutally used, addtional protection circuit externally required voltage exceeding rated voltage applied this device.
Document D11494EJ1V0DS00 (1st edition) Date Published December 1996 Printed Japan
1996
µPA1703
ELECTRICAL CHARACTERISTICS terminals connected)
CHARACTERISTICS Drain Source On-state Resistance Gate Source Cutoff Voltage Forward Transfer Admittance Drain Leakage Current Gate Source Leakage Current Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate Source Charge Gate Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge SYMBOL RDS(on)1 RDS(on)2 VGS(off) IDSS IGSS Ciss Coss Crss td(on) td(off) VF(S-D) TEST CONDITIONS VGS(on) di/dt A/µs 2180 0.73 MIN. TYP. MAX. 10.5 UNIT
Test Circuit Switching Time
D.U.T.
Wave Form
Test Circuit Gate Charge
D.U.T.
VGS(on)
Wave Form
Duty Cycle
td(on) td(off) toff
µPA1703
DERATING FACTOR FORWARD BIAS SAFE OPERATING AREA Percentage Rated Power Total Power Dissipation Mounted ceramic substrate TOTAL POWER DISSIPATION AMBIENT TEMPERATURE
Ambient Temperature
Ambient Temperature
FORWARD BIAS SAFE OPERATING AREA
Drain Current
Note: Mounted ceramic substrate
ID(pulse)
ID(DC)
Single Pulse
Drain Source Voltage
TRANSIENT THERMAL RESISTANCE PULSE WIDTH rth(t) Transient Thermal Resistance °C/W
Mounted ceramic substrate Single Pulse Channel Ambient
0.01 0.001
Pulse Width
µPA1703
FORWARD TRANSFER CHARACTERISTICS Pulsed
Drain Current
DRAIN CURRENT DRAIN SOURCE VOLTAGE Pulsed
Drain Current
Gate Source Voltage
Drain Source Voltage
FORWARD TRANSFER ADMITTANCE DRAIN CURRENT
Forward Transfer Admittance
RDS(on) Drain Source On-State Resistance
Pulsed
DRAIN SOURCE ON-STATE RESISTANCE GATE SOURCE VOLTAGE Pulsed
Drain Current
Gate Source Voltage
RDS(on) Drain Source On-State Resistance
DRAIN SOURCE ON-STATE RESISTANCE DRAIN CURRENT
VGS(off) Gate Source Cutoff Voltage
GATE SOURCE CUTOFF VOLTAGE CHANNEL TEMPERATURE
Pulsed
Channel Temperature
Drain Current
µPA1703
RDS(on) Drain Source On-State Resistance DRAIN SOURCE ON-STATE RESISTANCE CHANNEL TEMPERATURE Diode Forward Current SOURCE DRAIN DIODE FORWARD VOLTAGE Pulsed
Channel Temperature
Source Drain Voltage
CAPACITANCE DRAIN SOURCE VOLTAGE Ciss, Coss, Crss Capacitance Ciss Coss Crss td(on), td(off), Switching Time
SWITCHING CHARACTERISTICS td(off) td(on)
VGS(on)
Drain Source Voltage
Drain Current
REVERSE RECOVERY TIME DRAIN CURRENT Reverse Recovery Time di/dt
DYNAMIC INPUT/OUTPUT CHARACTERISTICS Drain Source Voltage Gate Source Voltage
Diode Current
Gate Charge
µPA1703
REFERENCE
Document Name semiconductor device reliability/quality control system Quality grade semiconductor devices Semiconductor device mounting technology manual Semiconductor device package manual Guide quality assurance semiconductor devices Application circuits using Power Safe operating area Power Document C11745E C11531E C10535E C10943X MEI-1202 TEA-1035 TEA-1037
µPA1703
[MEMO]
µPA1703
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance. Anti-radioactive design implemented this product.

µPA1703 DESCRIPTION This product N-Channel Field Effect Tran

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