Copyright 1996, 1997 Arnewsh Inc. Arnewsh Inc. P.O. 270352 Fort Collin
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SBC5204 USER'S MANUAL REVISION
Copyright 1996, 1997 Arnewsh Inc. Arnewsh Inc. P.O. 270352 Fort Collins, 80527-0352 Phone: (970) 223-1616 Fax: (970) 223-9573
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COPYRIGHT
Copyright 1996, 1997 Arnewsh Inc. rights reserved. part this manual dBUG software provided Flash ROM's/EPROM's reproduced, stored retrieval system, transmitted form means, electronic, mechanical, photocopying, recording, otherwise. program part thereof, purpose other than single user purchaser prohibited.
DISCLAIMER
information this manual been carefully examined believed entirely reliable. However, responsibility assumed inaccuracies. Furthermore, Arnewsh reserves right make changes product(s) herein improve reliability, function, design. SBC306 board intended life and/or property critical applications. Here, such applications defined situation which failure, malfunction, unintended operation board could, directly, indirectly, threaten life, result personal injury, cause damage property. Although every effort been made make supplied software documentation accurate functional possible, Arnewsh Inc. will assume responsibility damages incurred generated this product. Arnewsh does assume liability arising application product circuit described herein, neither does convey license under patent rights, any, rights others.
WARNING THIS BOARD GENERATES, USES, RADIATE RADIO FREQUENCY ENERGY AND, INSTALLED PROPERLY, CAUSE INTERFERENCE RADIO COMMUNICATIONS. TEMPORARILY PERMITTED REGULATION, BEEN TESTED COMPLIANCE WITH LIMITS CLASS COMPUTING DEVICES PURSUANT SUBPART PART RULES, WHICH DESIGNED PROVIDE REASONABLE PROTECTION AGAINST SUCH INTERFERENCE. OPERATION THIS PRODUCT RESIDENTIAL AREA LIKELY CAUSE INTERFERENCE, WHICH CASE USER, HIS/HER EXPENSE, WILL REQUIRED CORRECT INTERFERENCE.
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LIMITED WARRANTY Arnewsh Inc. warrants this product against defects material workmanship period sixty (60) days from original date purchase. This warranty extends original customer only lieu other warrants, including implied warranties merchantability fitness. event will seller liable incidental consequential damages. During warranty period, Arnewsh will replace, charge, components that fail, provided product returned (properly packed shipped prepaid) Arnewsh address below. Dated proof purchase (such copy invoice) must enclosed with shipment. will return shipment prepaid UPS. This warranty does apply opinion Arnewsh Inc., product been damaged accident, misuse, neglect, misapplication, result service modification (other than specified manual) others. Please send board cables with complete description problem Arnewsh Inc. P.O. 270352 Fort Collins, 80527-0352 Phone: (970) 223-1616 (970) 223-9573
Motorola registered trademark Motorola Inc. registered trademark Corp. other trademark names mentioned this manual registered trade mark repective owners.
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TABLE CONTENTS Page CHAPTER INTRODUCTION SBC5204 BOARD INTRODUCTION GENERAL HARDWARE DESCRIPTION SYSTEM MEMORY SERIAL COMMUNICATION CHANNELS PARALLEL PORTS PROGRAMMABLE TIMERS/COUNTERS CONNECTOR. SYSTEM CONFIGURATION INSTALLATION SETUP 1.9.1 Unpacking 1.9.2 Preparing Board 1.9.3 Providing Power Board 1.9.4 Selecting Terminal Baud Rate 1.9.5 Terminal Character Format 1.9.6 Connecting Terminal 1.9.7 Using Personal Computer Terminal 1.10 SYSTEM POWER-UP INITIAL OPERATION 1.11 SBC5204 JUMPER SETUP. 1.12 USING CHAPTER USING MONITOR/DEBUG FIRMWARE 1-10 2-10 2-11 2-12 2-13 2-14 2-15 2-16 2-17 2-18 2-19 2-20 2-21
WHAT dBUG. OPERATIONAL PROCEDURE 2.2.1 System Power-up 2.2.2 System Initialization 2.2.2.1 RESET Button 2.2.2.2 ABORT Button 2.2.2.3 Software Reset Command 2.2.2.4 User Program 2.2.3 System Operation TERMINAL CONTROL CHARACTERS dBUG COMMAND 2.4.1 Block Memory Fill 2.4.2 Block Move 2.4.3 Breakpoint 2.4.4 Block Search 2.4.5 DATA Data Conversion 2.4.6 Disassemble 2.4.7 Download Serial 2.4.8 Download Network. 2.4.9 Execute 2.4.10 Execute Till Temporary Breakpoint 2.4.11 Help Help 2.4.12 Internal Registers Display 2.4.13 Internal Registers Modify 2.4.14 Memory Display 2.4.15 Memory Modify
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2.4.16 Register Display 2.4.17 Register Modify 2.4.18 RESET Reset board dBUG 2.4.19 Configuration 2.4.20 SHOW Show Configuration 2.4.21 STEP Step Over 2.4.22 SYMBOL Symbol Name Management 2.4.23 TRACE Trace Into 2.4.24 UPDBUG Update dBUG Image 2.4.25 UPUSER Update User Code Flash 2.4.26 VERSION Display dBUG Version TRAP Functions 2.5.1 OUT_CHAR 2.5.2 IN_CHAR 2.5.3 CHAR_PRESENT 2.5.4 EXIT_TO_dBUG 2-22 2-23 2-24 2-25 2-27 2-28 2-29 2-30 2-31 2-32 2-33 2-34 2-34 2-34 2-35 2-35
CHAPTER
HARDWARE DESCRIPTION RECONFIGURATION
3-10 3-10 3-10 3-13 3-15
PROCESSOR SUPPORT LOGIC 3.1.1 Processor 3.1.2 Reset Logic 3.1.2.1 ATS/BUSW Line 3.1.3 Clock Circuitry 3.1.4 Watchdog Timer (BUS MONITOR) 3.1.5 Interrupt Sources 3.1.6 Internal SRAM 3.1.7 MCF5204 Registers Memory 3.1.8 Reset Vector Mapping 3.1.9 DTACK Generation 3.1.10 Wait State Generator EXTERNAL SRAM EPROM/FLASH UART LOGIC 3.4.1 MC68HC901 PARALLEL PORT. LOGIC CONNECTORS EXPANSION 3.7.1 Terminal Connector 3.7.2 Auxiliary Connector 3.7.3 Power Supply Connector 3.7.4 Programming Connector 3.7.5 Auxiliary Communication Connector 3.7.6 Debug Connector 3.7.7 Processor Expansion 3.7.8 Connector SBC5204 JUMPERS APPENDIX NETWORK DOWNLOAD
Configuring dBUG Network Downloads
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A.1.1 A.1.2 A.1.3 Required Network Parameters Configuring dBUG Network Parameters Troubleshooting Network Problems
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CHAPTER INTRODUCTION SBC5204 BOARD
INTRODUCTION SBC5204 versatile single board computer based MCF5204 ColdFire Processor. used powerful microprocessor based controller variety applications. With addition terminal, serves complete microcomputer development/evaluation, training educational use. user must only connect RS-232 compatible terminal personal computer with terminal emulation software) power supply have fully functional system. Provisions have been made connect this board additional user supplied boards, Microprocessor Expansion connectors, expand memory capabilities. Additional boards require buffers permit additional loading. Furthermore, provisions have been made PC-board permit configuration board which best suits application. Options available are: SRAM, Timer, I/O, interface, bytes Flash bytes EPROM. addition, functions MCF5204 available user.
GENERAL HARDWARE DESCRIPTION SBC5204 board provides RAM, Flash ROM, optional Ethernet interface (ISA bus), RS232, built-in functions MCF5204 learning evaluating attributes MCF5204. MCF5204 member ColdFire family processors. 32-bit processor with bits addressing lines data. processor eight 32-bit data registers, 32-bit address registers, 32-bit program counter, 16-bit status register. MCF5204 System Integration Module referred SIM. module incorporate many functions needed system design. These include programmable chip-select logic, System Protection logic, General purpose I/O, Interrupt controller logic. chip-select logic select memory banks peripherals. chip-select logic also allows programmable number wait-state allow slower memory (refer MCF5204 User's Manual Motorola detail information about SIM.) SBC5204 dBUG monitor only uses five chip selects access Flash ROM's, bank SRAM's, MC68HC901, interface. other functions available user. hardware watchdog timer (Bus Monitor) circuit included which monitors activities. cycle terminated within programmable time, watchdog timer will assert internal transfer error signal terminate cycle. block diagram board shown Figure 1.1.
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RS232 MCF5204 XCEIVERS
MC68HC901 LSI2032 Flash ROM/ EPROM Data Address Xceivers SRAM PORTS CONTROL U11, ADDRESS DATA Figure U13,U14
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SYSTEM MEMORY There 32-pin sockets board EPROM's Flash ROM's (U13, U14), most significant byte least significant byte. EPROM sockets jumpers (JP2, JP3, JP4) accept 27C256, 27C512, 27C010, 27C020, 27C040, 27C080 EPROM's. 29F010, 29F040. SBC5204 comes with 29F010 Flash ROM's which programmed with debugger/monitor firmware. dBUG driver only supports 29F010 Flash ROM. There 32-pin sockets SRAM's which accept 128Kx8 512Kx8 SRAM's. used make selection.
SERIAL COMMUNICATION CHANNELS
MCF5204 built-in Serial Communication Channel with baud rate generator. This signals this channel passed through external Driver/Receivers make channel compatible with RS-232. This channel used debugger available user. SBC5204, however, MC68HC901 which four timers serial communication port. timer channel used baud rate generator serial channel. lines passed through external Driver/Receiver make this channel compatible with RS-232C level (Note: only main signals available, signals). This channel "TERMINAL" channel used debugger communication with external terminal/PC.
PARALLEL PORTS Some multifunction pins MCF5204 used Port general purpose pins. These pins available user except A20/PA0 which used EPROM selection when using EPROM's.
PROGRAMMABLE TIMER/COUNTER MCF5204 built general purpose timer/counters. These timers used debugger available user. signals timer share pins with Port available connector There also three timers MC68HC901 which available user.
CONNECTOR SBC5204 connector allow off-the-shelf cards. main reason this connector install Ethernet card support down-load network.
SYSTEM CONFIGURATION SBC5204 board requires only following items minimum system configuration (Fig. 1.2): SBC5204 board (provided). Power supply regulated 7.5V DC), about Amp. RS-232C compatible terminal with terminal emulation software.
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Communication cable (provided). Refer next sections initial setup.
INSTALLATION SETUP following sections describe steps needed prepare board operation. Please read following sections carefully before using board. When preparing board first time, optional features (Ethernet, BUS). minimum configuration does require modifications. After board functional minimal configuration, other features following instructions provided following sections. 1.9.1 Unpacking
Unpack computer board from shipping box. Save storing reshipping. Refer following list verify that items present. should have received: SBC5204 Single Board Computer. SBC5204 User's Manual, this documentation. communication cable.
WARNING
AVOID TOUCHING DEVICES. STATIC DISCHARGE WILL DAMAGE THESE DEVICES. Once verified that items present, remove board from protective jacket. Check board visible damage. Ensure that there broken, damaged, missing parts. have received items listed above they damaged, please contact Arnewsh Inc. immediately order correct problem. 1.9.2 Preparing Board board shipped ready connected terminal power supply without need modification. However, follow steps below insure proper operation from first time apply power. Figure shows placement jumpers connectors which need refer following sections. steps taken are: Connecting power supply. Connecting terminal. 1.9.3 Providing Power Board board accepts means power supply connections. Connector 2.1mm power jack lever actuated connector. board accepts either regulated supply +7.5V (regulated unregulated), less than either connectors. Jumper selects between +7.5-12V
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options. Make sure jumper proper location your option. Connect power supply marked board shown below turn power supply yet): Contact Voltage +7.5-12V Ground Jumper JP1. Jumper Function regulated +7.5-12V regulated unregulated (default)
1.9.4 Selecting Terminal Baud Rate serial channel MC68HC901 which used serial communication channel built software programmable baud rate generator (timer). programmed number baud rates. After power-up manual RESET, dBUG firmware configures channel 19200 baud. After dBUG running, issue command choose baud rate supported dBUG. Refer Chapter discussion this command. 1.9.5 Terminal Character Format character format communication channel fixed power-up RESET. character format bits character, parity, stop bit. need insure that your terminal this format.
1.9.6 Connecting Terminal board ready connected terminal. communication cable provided connect terminal SBC5204. cable 9-pin female D-sub connector 9-pin male D-sub connector other end. Attach 9-pin male connector connector board. Attach 9-pin female connector 9-pin-to-25-pin adapter, necessary, make compatible with connector back terminal. 1.9.7 Using Personal Computer Terminal your personal computer terminal provided also have terminal emulation software such PROCOMM, KERMIT, QMODEM, similar packages. communication cable provided connect SBC5204. cable 9-pin female D-sub connector 9-pin male D-sub connector other end. Connect 9-pin male connector connector SBC5204. Connect 9-pin female connector available serial communication channels normally referred COM1 (COM2, etc.) PC's compatible. Depending kind serial connector back your connector your male 25-pin 9-pin. need obtain 9-pin-to-25-pin adapter make connection. need build adapter, refer Figure which shows assignment 9-pin connector board.
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dBUG>
SBC5204
RS232 TERMINAL
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Power Supply MICROPROCESSOR EXPANSION Figure 1.2. System Configuration
BACKGROUND DEBUG
Once connection made, ready power-up terminal emulation software. When terminal mode, need select baud rate character format channel. Most terminal emulation software packages provide command known "Alt-p" (press while pressing key) choose baud rate character format. Make sure select bits, parity, stop (see Section 1.9.5). Then, select baud rate 19200. ready apply power board.
Data Carrier Detect, Output (shorted pins Receive Data, Output from board (receive refers terminal side). Transmit Data, Input board (transmit refers terminal side). Data Terminal Ready, input (not used). Signal Ground. Data Ready, Output (shorted pins Request Send, input. Clear send, output (shorted pins connected.
Figure 1.4. assignment (Terminal) connector.
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Figure 1.3. Jumper connector placement.
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1.10 SYSTEM POWER-UP INITIAL OPERATION that have connected cables, apply power board. After power applied, dBUG initializes board then displays power-up message terminal which includes amount memory present.
Hard Reset Installed SRAM: 256K Copyright 1995-1996 Motorola, Inc. Rights Reserved. ColdFire MCF5204 Debugger V2.1 (Aug 1996 xx:xx:xx:) Enter `help' help. dBUG>
board ready operation under control debugger described Chapters above response, perform following checks: Make sure that power supply properly connected board. Check that terminal board same character format baud. Press RESET (red switch) button insure that board been initialized properly.
still receiving proper response, your board have been damaged shipping. Contact Arnewsh further instructions.
1.11 SBC5204 JUMPER SETUP jumpers board discussed Chapter However, brief discussion jumper settings follows: Jumper JP1. This jumper selects power supply selection.
Jumper
Function regulated. +7.5-12V regulated unregulated (default)
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Jumper JP2. This jumper selects SRAM size EPROM Size.
Jumper
Function Selects 128Kx8 SRAM (default) Selects 128Kx8 Flash Memory (default)
Jumper JP3. This jumper selects between Flash EPROM. Jumper Function Select Flash (default)
Jumper JP4. This jumper selects size EPROM Flash.
Jumper
Function Selects 128Kx8 EPROM/Flash
1.12 USING MCF5204 built debug mechanism referred BDM. SBC5204 necessary connector, facilitate this connection. order BDM, simply connect 26-pin header cable provided development tool (third party tool) connector. special setting needed. Refer User's Manual additional instructions.
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CHAPTER USING MONITOR/DEBUG FIRMWARE
SBC5204 Computer Board resident firmware package that provides self-contained programming operating environment. firmware, named dBUG, provides user with monitor/debug, disassembly, program download, control functions. This Chapter how-to-use description dBUG package, including user interface command structure.
WHAT dBUG?
dBUG resident firmware package ColdFire family Computer Boards. firmware (stored 128Kx8 Flash devices) provides self-contained programming operating environment. dBUG interacts with user through pre-defined commands that entered terminal. user interface dBUG command line. number features have been implemented achieve easy intuitive command line interface. dBUG assumes that 80x24 character dumb-terminal utilized connect debugger. serial communications, dBUG requires eight data bits, parity, stop bit, 8N1. baud rate 19200 changed after power-up. command line prompt "dBUG> dBUG command entered from this prompt. dBUG does allow command lines exceed characters. Wherever possible, dBUG displays data columns less. dBUG echoes each character typed, eliminating need "local echo" terminal side. general, dBUG case sensitive. Commands entered either upper lower case, depending upon user's equipment preference. Only symbol names require that exact case used. Most commands recognized using abbreviated name. instance, entering same entering "help". Thus, necessary type entire command name. commands STEP TRACE used repeatedly when debugging. dBUG recognizes this allows repeated execution these commands with minimal typing. After command entered, simply press <RETURN> <ENTER> invoke command again. command executed command line parameters were provided.
additional function called "TRAP handler" allows user program utilize various routines within dBUG. TRAP handler discussed this chapter. operational mode dBUG demonstrated Figure 2-1. After system initialization, board waits command line input from user terminal. When proper command entered, operation continues basic modes. command causes execution user program, dBUG firmware re-entered, depending discretion user. alternate case, command will executed under control dBUG firmware, after command completion, system returns command entry mode.
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Figure 2-1. Flow Diagram dBUG Operational Mode.
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During command execution, additional user input required depending command function. commands that accept optional <width> modify memory access size, valid values are: 8-bit (byte) access 16-bit (word) access 32-bit (long) access When <width> option provided, default width 16-bit. core ColdFire register maintained dBUG. These listed below: A0-A7 D0-D7
control registers ColdFire readable supervisor programming model, thus accessible dBUG. User code change these registers, caution must exercised changes render dBUG useless.
reference "SP" actually refers "A7".
OPERATIONAL PROCEDURE System power-up initial operation described detail Chapter This information repeated here convenience prevent possible damage. 2.2.1 System Power-up sure power supply connected properly prior power-up. Make sure terminal connected TERMINAL (J1) connector. Turn power board. 2.2.2 System Initialization powering board will initialize system. processor reset dBUG invoked. dBUG performs following configurations internal resources during initialization. instruction cache invalidated disabled. Vector Base Register, VBR, points Flash. However, copy exception table made address $00000000 SRAM. take over exception vector, user places address exception handler appropriate vector vector table located 0x00000000, then points 0x00000000. Software Watchdog Timer disabled, Monitor enabled, internal timers placed stop condition. Interrupt controller registers initialized with unique interrupt level/priority pairs. Port general purpose pins configured dedicated peripheral functions, i.e. UART.
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After initialization, terminal will display: Hard Reset Installed SRAM: 256K Copyright 1995-1996 Motorola, Inc. Rights Reserved. ColdFire MCF5204 Debugger V2.1 (Aug 1996 xx:xx:xx:) Enter `help' help. dBUG> this response check setup. Refer Section 1.10. Note, date `Aug 1996 xx:xx:xx' vary different revisions. Other means used re-initialize SBC5204 Computer Board firmware. These means discussed following paragraphs. 2.2.2.1 RESET Button. RESET button located middle side board. Depressing this button causes processes terminate, resets MCF5204 processor board logic's restarts dBUG firmware. Pressing RESET button would appropriate action else fails. 2.2.2.2 ABORT Button. ABORT black button located next RESET button middle side board. abort function causes interrupt present processing level interrupt MCF5204) gives control dBUG firmware. This action differs from RESET that processor register memory contents changed, processor peripherals reset, dBUG restarted. Also, response depressing ABORT button, contents MCF5204 core internal registers displayed. abort function most appropriate when software being debugged. user interrupt processor without destroying present state system. 2.2.2.3 Software Reset Command. dBUG does have command that causes dBUG restart hardware reset invoked. command "RESET". 2.2.2.4 USER Program. user return control system firmware recalling dBUG his/her program. Instructions inserted into user program call dBUG TRAP handler. 2.2.3 System Operation After system initialization, terminal will display: Hard Reset Installed SRAM: 256K Copyright 1995-1996 Motorola, Inc. Rights Reserved. ColdFire MCF5204 Debugger V2.1 (Aug 1996 xx:xx:xx:) Enter `help' help. dBUG>
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waits command. user call commands supported firmware. standard input routine controls system while user types line input. Command processing begins only after line been entered followed carriage-return. NOTES user memory located addresses $00010000-$xxxxxxxx, $xxxxxxxx maximum address memory installed board. When first learning system, user should limit his/her activities this area memory map. Address range $00000000-$0000FFFF used dBUG. command causes system access unused address (i.e., memory peripheral devices mapped that address), trap error will occur. This results terminal printing trap error message contents MCF5204 core registers. Control returned dBUG monitor.
TERMINAL CONTROL CHARACTERS command line editor remembers last five commands, history buffer, which were issued. They recalled then executed using control keys. Several keys used command line edit control functions. best familiar with these functions before exercising system. These functions include: RETURN (carriage- return) will enter command line causes processing begin. Delete (Backspace) CTRL-H will delete last character entered terminal. CTRL-D down command history buffer, modify then press enter key. CTRL-U command history buffer, modify then press enter key. CTRL-R Recall execute last command entered, does need enter pressed.
characters requiring control (CTRL) CTRL should pushed held down then other should pressed.
dBUG COMMAND Table lists dBUG commands. Each individual commands described following pages.
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TABLE 2-1. dBUG Commands.
COMMAND MNEMONIC DATA HELP RESET SHOW STEP SYMBOL TRACE UPDBUG UPUSER VERSION DESCRIPTION BLOCK FILL BLOCK MOVE BLOCK SEARCH BREAKPOINT DATA CONVERT DISASSEMBLE DOWNLOAD SERIAL DOWNLOAD NETWORK EXECUTE TILL BREAKPOINT HELP INTERNAL REGISTER DISPLAY INTERNAL REGISTER MODIFY MEMORY DISPLAY MEMORY MODIFY REGISTER DISPLAY REGISTER MODIFY RESET CONFIGURATIONS SHOW CONFIGURATIONS STEP (OVER) SYMBOL MANAGEMENT TRACE(INTO) UPDATE DBUG UPDATE USER FLASH SHOW VERSION SYNTAX BF<WIDTH> BEGIN DATA BEGIN DEST <WIDTH> BEGIN DATA ADDR <-R> COUNT> TRIGGER> DATA VALUE <ADDR> <OFFSET> <-C> <-E> <-S> <-I> OFFSET> <FILENAME> <ADDR> <ADDR> HELP <COMMAND> <MODULE.REGISTER> <MODULE.REGISTER> <DATA> <WIDTH> <BEGIN> <END> <WIDTH> ADDR <DATA> <REG> DATA RESET OPTION <VALUE> SHOW OPTION STEP SYMBOL <SYMB> SYMB VALUE> SYMB> TRACE <NUM> UPDBUG UPUSER VERSION PAGE 2-10 2-11 2-12 2-13 2-14 2-15 2-16 2-17 2-18 2-19 2-20 2-21 2-22 2-23 2-24 2-25 2-27 2-28 2-29 2-30 2-31 2-32 2-33
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2.4.1 Block Memory Fill Usage: BF<width> begin data command fills contiguous block memory starting address begin, stopping address end, with value data. Width modifies size data that written. value addresses begin absolute address specified hexadecimal value, symbol name. value data symbol name, number converted according user defined radix, normally hexadecimal. This command first aligns starting address data access size, then increments address accordingly during operation. Thus, duration operation, this command performs properly aligned memory accesses.
Examples: fill memory block starting 0x00010000 ending 0x00040000 with value 0x1234, command 10000 40000 1234 fill block memory starting 0x00010000 ending 0x0004000 with byte value 0xAB, command bf.b 10000 40000 zero section target code (defined symbols bss_start bss_end), command bss_start bss_end
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2.4.2 Block Move Usage: begin dest command moves contiguous block memory starting address begin, stopping address end, address dest. command copies memory series bytes, does alter original block. value addresses begin, end, dest absolute address specified hexadecimal value, symbol name. destination address overlaps block defined begin end, error message produced command exits. Examples:
copy block memory starting 0x00040000 ending 0x00080000 location 0x00200000, command 40000 80000 200000
copy target code's data section (defined symbols data_start data_end) 0x00200000, command data_start data_end 200000
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2.4.3 Breakpoint Usage: addr <-r> count> trigger> command inserts removes breakpoints address addr. value addr absolute address specified hexadecimal value, symbol name. Count trigger numbers converted according user defined radix, normally hexadecimal. argument provided command, listing defined breakpoints displayed. option command removes breakpoint defined address addr. address specified conjunction with option, then breakpoints removed. Each time breakpoint encountered during execution target code, count value incremented one. default, initial count value breakpoint zero, option allows setting initial count breakpoint.
Each time breakpoint encountered during execution target code, count value compared against trigger value. count value equal greater than trigger value, breakpoint encountered control returned dBUG. default, initial trigger value breakpoint one, option allows setting initial trigger breakpoint. address specified conjunction with options, then breakpoints initialized values specified option. Examples: breakpoint function main(), command _main
When target code executed processor reaches main(), control will returned dBUG. breakpoint function bench() trigger value command _bench
When target code executed, processor must attempt execute function bench() third time before returning control back dBUG. remove breakpoints, command
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2.4.4 Block Search Usage: BS<width> begin data command searches contiguous block memory starting address begin, stopping address end, value data. Width modifies size data that compared during search. value addresses begin absolute address specified hexadecimal value, symbol name. value data symbol name, number converted according user defined radix, normally hexadecimal. This command first aligns starting address data access size, then increments address accordingly during operation. Thus, duration operation, this command performs properly aligned memory accesses.
Examples: search 16-bit value 0x1234 memory block starting 0x00040000 ending 0x00080000 command 40000 80000 1234
This reads 16-bit word located 0x00040000 compares against 16-bit value 0x1234. match found, then address incremented 0x00040002 next 16-bit value read compared. search 32-bit value 0xABCD memory block starting 0x00040000 ending 0x00080000, command bs.l 40000 80000 ABCD
This reads 32-bit word located 0x00040000 compares against 32-bit value 0x0000ABCD. match found, then address incremented 0x00040004 next 32-bit value read compared. search section (defined symbols bss_start bss_end) byte value 0xAA, command bs.b bss_start bss_end
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2.4.5 DATA Data Conversion Usage: DATA data DATA
DATA command displays data both decimal hexadecimal notation. value data symbol name absolute value. absolute value passed into DATA command prefixed `0x', then data interpreted hexadecimal value. Otherwise data interpreted decimal value. values treated 32-bit quantities. Examples: display decimal equivalent 0x1234, command
data
0x1234
display hexadecimal equivalent 1234, command data 1234
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2.4.6 Disassemble Usage: <addr> value addr absolute
command disassembles target code pointed addr. address specified hexadecimal value, symbol name.
Wherever possible, disassembler will information from symbol table produce more meaningful disassembly. This especially useful branch target addresses subroutine calls. command attempts track address last disassembled opcode. address provided command, then command uses address last opcode that disassembled. Examples:
disassemble code that starts 0x00040000, command 40000
disassemble code function main(), command _main
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2.5.7 Download Serial Usage: <offset>
command performs S-record download data obtained from serial port. value offset converted according user defined radix, normally hexadecimal. offset provided, then destination address each S-record adjusted offset. command checks destination address validity. destination address below defined user space (0x00000000-0x00010000), then error message displayed downloading aborted. S-record file contains entry point address, then program counter reflect this address.
Examples: download S-record file through serial port, command download S-record file through serial port, adjust destination address 0x40, command 0x40
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2.4.8 Download Network Usage: <-c> <-e> <-i> <-s> offset> <filename>
command downloads code from network. command handle files which either Srecord, COFF formats. command uses Trivial File Transfer Protocol, TFTP, transfer files from network host. This command only works with 100% NE2000 compatible boards. general, type file downloaded name file must specified command. option indicates COFF download, option indicates download, option indicates image fownload, indicates S-record download. option works only conjunction with option indicate optional offset S-record download. filename passed directly TFTP server and, therefore, must valid filename server.
neither filename options specified, then default filename filetype will used. Default filename filetype parameters manipulated using show commands. command checks destination address validity. destination address below defined user space, then error message displayed downloading aborted. COFF files which contain symbolic debug information, symbol tables extracted from file during download used dBUG. Only global symbols kept dBUG. dBUG symbol table cleared prior downloading, user's responsibility clear symbol table necessary prior downloading. entry point address specified S-record, COFF file, program counter accordingly. Examples: download S-record file with name "srec.out", command srec.out download COFF file with name "coff.out", command coff.out download file using default filetype with name "bench.out", command bench.out download file using default filename filetype, command This command requires proper Network address parameter setup. Refer Appendix this procedure. Also refer "SET" command setup base address card.
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2.4.9 Execute Usage: <addr>
command executes target code starting address addr. value addr absolute address specified hexadecimal value, symbol name. argument provided, command begins executing instructions current program counter. When command executed, user-defined breakpoints inserted into target code, context switched target program. Control only regained when target code encounters breakpoint, illegal instruction, other exception which causes control handed back dBUG. Examples:
execute code current program counter, command execute code function main(), command _main execute code address 0x00040000, command 40000
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2.4.10 Execute Till Temporary Breakpoint Usage: <addr>
command executes target code starting address (whatever has) until temporary breakpoint given command line reached. Example: execute code current program counter stop breakpoint address 0x10000, command 10000
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2.4.11 HELP Help Usage: HELP <command>
HELP command displays brief syntax commands available within dBUG. addition, address where user code start given. command provided, then brief listing syntax specified command displayed. Examples: obtain listing commands available within dBUG, command help
help list longer than page. help command displays screen full input display rest list. obtain help breakpoint command, command help
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2.4.12 Internal Registers Display Usage: <module.register>
This commands displays internal registers different modules inside MCF5204. command line, module refers module name where register located register refers specific register needed. registers organized according module which they belong. available modules MCF5204 SIM, UART, TIMER. Refer MCF5204 User's Manual. Example: sim.sypcr ;display SYPCR register module.
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2.4.13 Internal Registers MODIFY Usage: module.register data
This commands modifies contents internal registers different modules inside MCF5204. command line, module refers module name where register located, register refers specific register needed, data value written into that register. registers organized according module which they belong. available modules MCF5204 SIM, UART, TIMER. Refer MCF5204 User's Manual Example: timer.tmr1 0021 ;write 0021 into TMR1 register TIMER module.
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2.4.14 Memory Display Usage: MD<width> <begin> <end>
command displays contiguous block memory starting address begin stopping address end. value addresses begin absolute address specified hexadecimal value, symbol name. Width modifies size data that displayed. Memory display starts address begin. beginning address provided, command uses last address that displayed. ending address provided, then will display memory address that beyond starting address. This command first aligns starting address data access size, then increments address accordingly during operation. Thus, duration operation, this command performs properly aligned memory accesses. Examples: display memory address 0x00400000, command 400000 display memory data section (defined symbols data_start data_end), command data_start display range bytes from 0x00040000 0x00050000, command md.b 40000 50000
display range 32-bit values starting 0x00040000 ending 0x00050000, command md.l 40000 50000
This command repeated simply pressing carriage-return (Enter) key. will continue with address after last display address.
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2.2.15 Memory Modify Usage: MM<width> addr <data>
command modifies memory address addr. value address addr absolute address specified hexadecimal value, symbol name. Width modifies size data that modified. value data symbol name, number converted according user defined radix, normally hexadecimal. value data provided, then command immediately sets contents addr data. value data provided, then command enters into loop. loop obtains value data, sets contents current address data, increments address according data size, repeats. loop terminates when invalid entry data value entered, i.e., period.
This command first aligns starting address data access size, then increments address accordingly during operation. Thus, duration operation, this command performs properly aligned memory accesses. Examples: byte location 0x00010000 0xFF, command mm.b 10000
interactively modify memory beginning 0x00010000, command 10000
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2.4.16 Register Display Usage: MM<width> addr <data>
command modifies memory address addr. value address addr absolute address specified hexadecimal value, symbol name. Width modifies size data that modified. value data symbol name, number converted according user defined radix, normally hexadecimal. value data provided, then command immediately sets contents addr data. value data provided, then command enters into loop. loop obtains value data, sets contents current address data, increments address according data size, repeats. loop terminates when invalid entry data value entered, i.e., period.
This command first aligns starting address data access size, then increments address accordingly during operation. Thus, duration operation, this command performs properly aligned memory accesses. Examples: byte location 0x00010000 0xFF, command mm.b 10000
interactively modify memory beginning 0x00010000, command 10000
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2.4.17 Register Modify Usage: data
command modifies contents register data. value name register, value data symbol name, converted according user defined radix, normally hexadecimal. dBUG preserves registers storing copy register buffer. command updates copy register buffer. actual value will written register until target code executed. Examples:
change register contain value 0x1234, command 1234
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2.4.18 RESET Reset board dBUG RESET Usage: RESET
RESET command attempts reset board dBUG their initial power-on states. RESET command executes same sequence code that occurs power-on. This code attempts initialize devices board dBUG data structures. RESET command fails reset board your satisfaction, cycle power press reset button. Examples: reset board clear dBUG data structures, command
reset
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2.4.19 Configuration Usage: option <value>
command allows setting user configurable options within dBUG. options listed below. command issued without option, will show available options values. board needs RESET after this command order option(s) take effect. baud This baud rate first serial port board. communications between dBUG user occur using either 9600 19200 bps, eight data bits, parity, stop bit, 8N1. choose 38400 baud.
base This default radix converting number from their ASCII text representation internal quantity used dBUG. default hexadecimal (base 16), other choices binary (base octal (base decimal (base 10). client This network Internet Protocol, address board. network communications, client required unique value, usually assigned your local network administrator. server This network address machine which contains files accessible TFTP. Your local network administrator will have this information assist properly configuring TFTP server does exist. gateway This network address gateway your local subnetwork. client address server address same subnetwork, then this option must properly set. Your local network administrator will have this information. netmask This network address mask determine gateway required. This field must properly set. Your local network administrator will have this information. filename This default filename used network download name provided command. filetype This default file type used network download type provided command. Valid values are: "srecord", "coff", "image", "elf". autoboot This option allows automatic downloading execution file from network. This option used automatically boot operating system from network. Valid values are: "on" "off". This option implemented current reviosion dBUG. nicbase this base address network interface card. When using network card, base address that card needed dBUG order communicate with This command used inform dBUG address card. dBUG does configure interface card. only uses this address access card. user should provide this information dBUG. nicirq this used network interface card. When using network card, used that card needed dBUG order communicate with This command used inform dBUG card. dBUG does configure interface card. only uses this access card. user should provide this information dBUG.
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flashws This command used adjust number wait state Flash ROM. sramws This command used adjust number wait state SRAM.
Examples: available options supported choices, command baud rate board 19200, command baud 19200
press RESET button (RED) RESET command baud take effect. This baud will programmed Flash will used during power-up. order KNE2000TLC ethernet card system, debugger need know base address. Kingston Technology Corporation ethernet card KNE2000TLC default base address $300 uses IRQ3. debugger ethernet communication, following commands should issued first. nicbase nicirq
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2.4.20 SHOW Show Configuration Usage: SHOW option SHOW SHOW
SHOW command displays settings user configurable options within dBUG. Most options configurable command displayed with SHOW command. SHOW command issued without option, will show options. Examples: display current options, command show
display current baud rate board, command show baud
display TFTP server address, command show server
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2.4.21 STEP Step Over Usage: STEP
command used "step over" subroutine call, rather than tracing every instruction subroutine. command sets breakpoint instruction beyond current program counter then executes target code. command used instructions. command will work other instructions well, note that command used with instruction that will return, i.e. BRA, then temporary breakpoint never encountered thus dBUG regain control. Examples:
pass over subroutine call, command step
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2.4.22 SYMBOL Symbol Name Management Usage: SYMBOL <symb> symb value> symb> <-c|l|s> SYMBOL
SYMBOL command adds removes symbol names from symbol table. only symbol name provided SYMBOL command, then symbol table searched match symbol name information displayed. option adds symbol name value into symbol table. option removes symbol name from table. option clears entire symbol table, option lists contents symbol table, option displays usage information symbol table.
Symbol names contained symbol table truncated characters. symbol table lookups, either SYMBOL command disassembler, will only first characters. Symbol names case sensitive. Examples: define symbol "main" have value 0x00040000, command symbol main 40000
remove symbol "junk" from table, command symbol junk
full symbol table command symbol display symbol table, command symbol
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2.4.23 TRACE Trace Into Usage: TRACE <num>
TRACE command allows single instruction execution. provided, then instructions executed before control handed back dBUG. value decimal number. TRACE command sets bits processors' supervisor registers achieve single instruction execution, target code executed. Control returns dBUG after single instruction execution target code. Examples: trace instruction program counter, command
trace instructions from program counter, command
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2.4.24 UPDBUG Update dBUG Image Usage: UPDBUG UPDBUG
UPDBUG command used updating dBUG image Flash. When updates MCF5204 dBUG available, updated image downloaded address 0x00010000. image placed into Flash using UPDBUG command. user prompted verification before performing operation. this command with extreme caution, error render dBUG, thus board, useless!
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2.4.25 UPUSER Update User Code Flash Usage: UPUSER UPUSER
UPUSER command places user code data into space allocated user Flash, last 128K Flash ROM. place code data user Flash, image downloaded address 0x00010000, UPUSER command issued. This commands programs entire upper 128K Flash. Users access this space starting address 0xFFE20000.
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2.4.26 VERSION Display dBUG Version Usage: VERSION VERSION
VERSION command display version information dBUG. dBUG version number build date both given. version number separated decimal, example, "v1.1". first number indicates version specific code, second number indicates version board specific code. version date time which entire dBUG monitor compiled built. Examples:
display version dBUG monitor, command version
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TRAP Functions additional utility within dBUG firmware function called TRAP handler. This function called user program utilize various routines within dBUG, perform special task, return control dBUG. This section describes TRAP handler used. There four TRAP functions. These are: OUT_CHAR, IN_CHAR, CHAR_PRESENT, EXIT_TO_dBUG. 2.5.1 OUT_CHAR This function function code 0x0013) sends character, which lower bits terminal. Assembly example:
assume contains character move.l #$0013,d0 Selects function TRAP character sent terminal example: void board_out_char (int your compiler produces LINK/UNLK pair this routine, then following code which takes this into account LINK a6,#0 produced compiler move.l 8(a6),d1"); `ch' into move.l #0x0013,d0"); select function trap #15"); make call UNLK produced compiler #else compiler does produce LINK/UNLK pair, following code. move.l 4(sp),d1"); `ch' into move.l #0x0013,d0"); select function trap #15"); make call #endif
2.5.2 IN_CHAR This function (function code 0x0010) returns input character (from terminal) caller returned character Assembly example: move.l #$0010,d0 trap Select function Make call, input character
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example: board_in_char (void) move.l #0x0010,d0"); trap #15"); move.l d1,d0");
select function make call character
2.5.3 CHAR_PRESENT This function (function code 0x0014) checks input character present receive. value zero returned when character present. non-zero value means character present.
Assembly example: move.l #$0014,d0 trap example: board_char_present (void) move.l #0x0014,d0"); trap #15"); Select function Make call, contains response (yes/no).
select function make call
2.5.4 EXIT_TO_dBUG This function (function code 0x0000) transfers control back dBUG, terminating user code. register context preserved. Assembly example: move.l #$0000,d0 trap example: void board_exit_to_dbug (void) move.l #0x0000,d0"); select function trap #15"); exit transfer dBUG Select function Make call, exit dBUG.
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CHAPTER HARDWARE DESCRIPTION RECONFIGURATION
This chapter provides functional description SBC5204 board hardware. With description given here schematic diagram provided this manual, user gain good understanding board's design. this manual, active signal indicated preceding signal name.
PROCESSOR SUPPORT LOGIC This part Chapter discusses general supporting logic SBC5204 board.
3.1.1 Processor microprocessor used SBC5204 highly integrated MCF5204, 32-bit processor. MCF5204 uses ColdFire processor core with bytes instruction cache, UART, Timers, bytes SRAM, one-byte wide parallel port, supporting integrated system logic. registers core processor bits wide except Status Register (SR) which bits wide. This processor communicates with external devices over 16-bit wide data bus, D0-D15. This chip address entire Bytes memory space using internal chip-select logic. However, provides only address lines, A0-A21. processor's signals available board expansion. Refer section assignment. MCF5204 IEEE JTAG-compatible port port. These signals available processor also logic generate chip selects, -CS0 -CS5. 3.1.2 Reset Logic reset logic provides system initialization under modes. Under system power-up when RESET switch, (red switch), activated. power-on RESET switch assert processor's RESET line reset processor. used produce both active high RESET. -RESET signal board devices RESET Bus. dBUG performs following configurations internal resources during initialization. instruction cache invalidated disabled. Vector Base Register, VBR, points Flash. However, copy exception table made address $00000000 SRAM. take over exception vector, user places address exception handler appropriate vector vector table located $00000000, then points $00000000. Software Watchdog Timer disabled, Monitor enabled, internal timers placed stop condition. Interrupt controller registers initialized with unique interrupt level/priority pairs. Port general purpose pins configured dedicated peripheral functions, i.e. UART.
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3.1.2.1 ATS/BUSW Line ATS/BUSW line configure function -ATS BUSW after reset. -IRQ0 kept during Reset, -ATS otherwise, BUSW. SBC5204 leaves -IRQ0 high during reset which chooses BUSW function. -ATS function needed, user press ABORT button (BLACK) while pressing RESET button (RED) which will cause -IRQ0 remain when resetting board -ATS function will selected.
3.1.3 Clock Circuitry SBC5204 uses 25MHZ oscillator (U3) provide clock processor. This clock also feeds LSI2032 internal produce clock timings MC68HC901 (1/4 system clock).
3.1.4 Watchdog Timer (BUS MONITOR) cycle initiated processor providing necessary information cycle (e.g. address, data, control signals, etc.) asserting low. Then, processor waits acknowledgment (DTACK signal) from addressed device before complete cycle. possible (due incorrect programming) that processor attempts access part address space which physically does exist. this case, cycle will ever, since there memory device provide acknowledgment signal, processor will infinite wait state. MCF5204 necessary logic built into chip watch duration cycle. cycle terminated within preprogrammed duration logic will internally assert Transfer Error signal. response, processor will terminate cycle access fault exception (trap) will take place. duration Watchdog selected BMT0-1 bits System Protection Register. dBUG initializes this register with value which provides 1024 system clock time-out. 3.1.5 Interrupt Sources ColdFire family processors receive interrupts seven levels interrupt priorities. When processor receives interrupt which higher priority than current interrupt mask status register), will perform interrupt acknowledge cycle current instruction cycle. This interrupt acknowledge cycle indicates source interrupt that request being acknowledged device should provide proper vector number indicate where service routine this interrupt level located. source interrupt capable providing vector, interrupt should autovector interrupt which directs processor predefined entry into exception table (refer MCF5204 User's Manual). processor goes different service routine exception table. This table Flash points However, copy this table made starting $00000000. take over exception vector, user places address exception handler appropriate vector vector table located $00000000, then points $00000000. MCF5204 four external interrupt request lines (-IRQ0, -IRQ1, -IRQ2, -IRQ3) four internal requests from Timer1, Timer2, Software watchdog timer, UART. Each interrupt source external internal, programmed priority level. case similar priority level, second relative priority between will assigned.
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SBC5204, internal Timers, Software Watchdog Timer, UART disabled used. However, software watchdog programmed Level priority uninitialized vector. UART programmed Level priority autovector. Timers Level with Timer with priority Timer with priority both autovector. SBC5204 uses -IRQ0 support ABORT function using ABORT switch (black switch). This switch used force non-maskable interrupt (level priority user's program execution should aborted without issuing RESET (refer Chapter more information ABORT). Since ABORT switch capable generating vector response level seven interrupt acknowledge from processor, debugger programs this request autovector mode. MC68HC901 reports interrupt request -IRQ1 line which Level priority uses vectored mode acknowledgment. chip-select -CS3 used generate -IACK signal MC68HC901. MC68HC901 programmed generate vectors $FF. This should changed. -IRQ2 -IRQ3 lines MCF5204 used this board. However, -IRQ2 programmed Level with priority -IRQ3 programmed Level with priority user these lines external interrupt request. Refer MCF5204 User's Manual more information about interrupt controller. 3.1.6 Internal SRAM MCF5204 bytes internal memory. This memory mapped $02000000 used dBUG. available user.
3.1.7 MCF5204 Registers Memory memory resources SBC5204 divided into three groups, MCF5204 Internal, External resources, address. registers memory mapped. MCF5204 built logic Chip-select pins (-CS0, -CS1, -CS2, -CS3, -CS4, -CS5) which used enable external memory devices. There eighteen (18) 32-bit registers specify address range, type access, method DTACK generation each chip-select pin. These registers programmed dBUG external memory devices. SBC5204 uses chip-select zero (-CS0) enable EPROM/Flash refer Section 3.3.) SBC5204 also uses -CS1 enable SRAM (refer Section 3.2), -CS2 enabling MC68HC901, -CS3 Interrupt acknowledge MC68HC901, -CS4 space. SBC5204 does -CS5. chip select mechanism MCF5204 allows memory mapping defined based memory space desired (User/Supervisor, Program/Data spaces). MCF5204 internal registers, configuration registers, parallel port registers, DUART registers system control registers mapped MBAR register 1K-byte boundary. mapped $01000000 dBUG. complete these registers refer MCF5204 User's Manual. SBC5204 board have bytes SRAM installed. first bytes reserved this memory. Refer Section discussion RAM. dBUG programmed 29F010 Flash
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ROM's which only occupies 256K bytes address space. first 128K bytes used dBUG second half left user. Refer section 3.3. MC68HC901 used dBUG serial communication, baud rate generator, interrupt request. Refer section 3.4.1. interface maps space MCF5204 memory address $04000000. Refer section 3.6. TABLE 3.1. SBC5204 memory map. ADDRESS RANGE $00000000-$000FFFFF1 $01000000-$010003FF $02000000-$020001FF $03000000-$030FFFFF $04000000-$040FFFFF $FFE00000-$FFE3FFFF Refer text more detail. SIGNAL DEVICE -CS1, bytes SRAM's. Internal Module registers Internal SRAM -CS2, space MC68HC901. -CS3 used IACK -CS4, area -CS0, 256K bytes Flash ROM.
unused area memory available user.
3.1.8 Reset Vector Mapping After reset, processor attempts initial stack pointer initial program counter values from locations $000000-$000007 (the first eight bytes memory space). This requires board have nonvolatile memory device this range with proper information. However, some systems, preferred have starting address $00000000. MCF5204, -CS0 responds accesses after reset until V-bit CS0. This includes reset vector range. Since -CS0 connected Flash ROM's, Flash ROM's appear address $00000000 which provides initial stack pointer program counter (the first bytes EPROM). initialization routine, however, programs chipselect logic locates Flash start $FFE00000 SRAM's start $00000000. 3.1.9 DTACK Generation processor starts cycle providing necessary information (address A1-A23, R/-W, etc.) asserting -CS. processor then waits acknowledgment (-DTACK) addressed device before complete cycle. This -DTACK used only indicate presence device, also allows devices with different access time communicate with processor properly. MCF5204, part chip-select logic, built mechanism generate -DTACK external devices which have capability generate -DTACK their own. Flash ROM's SRAM's generate -DTACK. Their chip-select logic's programmed dBUG generate DTACK internally after preprogrammed number wait states. order support future expansion board, -DTACK input processor also connected Processor Expansion Bus, This allows expansion boards assert this line indicate their -DTACK processor. expansion boards, however, this signal should generated through open collector buffer with pull-up resistor, pull-up resistor included board. -DTACK's from expansion boards should connected this line.
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3.1.10 Wait State Generator Flash SRAM chips board require some adjustments cycle time processor make them compatible with processor speed. extend cycles slower devices, chip-select logic MCF5204 programmed generate -DTACK after given number wait states. Refer Sections information about wait state requirements SRAM's Flash ROM's respectively. EXTERNAL SRAM SBC5204 32-pin sockets (U11 U12) static RAM's. These sockets support both 128Kx8 (such KM681000BLP) 512Kx8 (such HM628512). board configured 256K bytes SRAM's. dBUG will detect total memory installed power-up.
memory configuration choices: 256K bytes 256K bytes, install 128Kx8 SRAM chips U12. memory address range will $00000000-$0003FFFF. jumper pins should connected (default). bytes bytes, install 512x8 SRAM chips U12. memory address range will $00000000-$000FFFFF. jumper pins should connected. debugger programs chip-select generate wait state SRAM.
EPROM/ FLASH
There sockets EPROM's/Flash ROM's SBC5204, (high, even byte) (low, byte). These sockets support 32K, 64K, 128K, 256K, 512K, 1M-byte EPROM's such 27C256, 27C512, 27C010, 27C020, 27C040, 27C080 chips total bytes. sockets also support Flash ROM's such 29F010 29F040 which 5-volt only devices. user wishes modify size type memory chips, jumpers JP2, JP3, should modified accommodate different size type memory chips. Refer Figure jumper selection. board shipped with 29F010, 128K-byte, FLASH ROM's total 256K bytes. first 128K Flash contains dBUG firmware. second half (last 128K) available user. high byte (even address) chip installed socket byte (odd address) chip installed socket. chip-select signal generated MCF5204 (-CS0) enables both chips. MCF5204 chip-select logic programmed generate -DTACK -CS0 signal after certain number wait states. dBUG programs this parameter three wait-states.
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Configuration MEMORY TYPE JUMPER SETUP FLASH Connect (default) EPROM Connect Configuration MEMORY TYPE JUMPER SETUP FLASH Connect (default) EPROM Connect
Configuration EPROM MEMORY SIZE JUMPER SETUP 27C256 (256K EPROM) 27C512 (512K EPROM) 27C010 EPROM) 27C020 EPROM) 27C040 EPROM) 27C080 EPROM)
Configuration FLASH MEMORY SIZE JUMPER SETUP 29F010 (1M, Flash) 29F040 Flash) Note: Only connect pins specified. Leave rest open.
Figure 3.1. Jumper setup Flash/EPROM sockets.
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UART LOGIC MCF5204 built UART, This serial channel with software programmable baud rate generator used SBC5204 dBUG available user. dBUG, however, programs interrupt level UART Level priority autovector mode operation. signals this channel available passed through RS-232 driver/receiver available DB-9 connector Refer MCF5204 User's Manual programming register map. 3.4.1 MC68HC901 provide board with independent serial communication channel dBUG communication with terminal MC68HC901 used. This device provides four timer channels serial communication channel, input lines. Channel timer used baud rate generator serial communication channel.
clock source timers 2.4576MHZ crystal. clock signal drive MC68HC901 logic one-fourth processor's clock. (SO) signal (SI) signal passed through RS-232 driver/receiver available eight input lines used report interrupts (IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, IRQ9, IRQ10, IRQ11). interrupt from MC68HC901 reported MCF5204 -IRQ1 MCF5204. interrupt level MC68HC901 Level with priority vectors used MC68HC901 $FF. generates vectors. This should changed. -CS2 used access MC68HC901 internal registers, mapped $03000000. -CS3 programmed generate Interrupt Acknowledge signal drive -IACK MC68HC901. Refer MC68HC901 User's Manual functional description programming model.
PARALLEL Port MCF5204 8-bit parallel port. pins have dual functions. They configured their alternate function Assignment register. PA0/A20 PA1/A21 available rest available User them based application. However, will used EPROM's they installed. Otherwise changed pin. more information this refer MCF5204 User's Manual from Motorola. dBUG programs these pins their dedicated peripheral functions.
LOGIC SBC5204 includes necessary logic, drivers, connector (P1) allow off-the-shelf cards. slot used with 16-bit cards. architectural differences between ColdFire buses, accesses must 16-bits. addition, byte accessing, even ISA-space addresses located starting $04000000, ISA-space addresses located starting $04010000. example, consider sequential registers starting ISA-space address $320. Their ColdFire addresses become, order, $04000320, $04010320, $04000322, $04010322. main purpose this setup allow Ethernet card (NE2000 compatible) facilitate network down load, refer chapter network download command (DN). dBUG driver only accepts 100% NE2000 compatible cards.
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interrupt request lines IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, IRQ9, IRQ10, IRQ11 connected MC68HC901. requested interrupt then routed -IRQ1 MCF5204.
CONNECTORS EXPANSION There connectors SBC5204 which used connect board external devices expansion boards. This section provides brief discussion assignments connectors. 3.7.1 Terminal Connector SBC5204 uses 9-pin D-sub female connector connecting board terminal with terminal emulation software. available signals working subset RS-232C standard. Table shows assignment.
TABLE 3.2. (TERMINAL) Connector assignment. DIRECTION Output Output Input Input Output Input Output SIGNAL NAME Data Carrier Detect (shorted Receive data Transmit data Data Terminal Ready (shorted Signal Ground Data Ready (shorted Request Send (shorted Clear Send (shorted Used
3.7.2 Auxiliary Power Connector requires +/-12 well volts supply. Since they always needed connector used these simple burg connector. Table shows assignment
TABLE 3.3. Connector assignment. NUMBER SIGNAL NAME Volts Ground Volts Volts
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3.7.3 Power Supply Connectors SBC5204 needs volts supply (less than Amp.). power Volts regulated +7.5 Volts (regulated unregulated) which utilizes board regulator Jumper (Table 3.6) makes selection between Volts regulated +7.5-12 Volts supply. pins connected, board needs external Volts regulated supply. pins connected, then supply +7.5 volts used. either case, power connected board through (2.1mm power jack) two-contact lever actuated terminal block. center (pin plus supply body (pin ground. handle (pin plus supply black handle (pin ground. Tables show assignment
TABLE 3.4. Connector assignment.
NUMBER (center pin) (body)
SIGNAL NAME Plus Supply Ground
TABLE 3.5. Connector assignment. NUMBER SIGNAL NAME Plus Supply Ground
TABLE 3.6. Jumper JP1. Jumper Pins Selection regulated Volts +7.5 regulated unregulated (default)
3.7.4 Programming Connector connector used program ispLSI2032. This Connector user connector. TABLE 3.7. Connector Assignment. SIGNAL NAME Volts -SDO -SDI -ISPEN Connect (key) -MODE SCLK
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3.7.5 Auxiliary Serial Communication Connector MCF5204 built-in UART. This channel used SBC5204 dBUG available user. signals this channel available they also trough RS-232 driver/receivers available available signals form working subset RS-232C standard. Table shows assignment
TABLE 3.8. Connector assignment. DIRECTION Output Output Input SIGNAL NAME Connected Receive Data Transmit Data connect Signal Ground Connected Clear Send Request Send (connected Used
Output Input Output
3.7.6 Debug Connector MCF5204 does have background Debug Port, Real-Time Trace Support, Real-Time Debug Support. necessary signals available connector Table shows assignment. 3.7.7 Processor Expansion processors signals available burg headers future expansion. Although these signals buffered, they drive least load with some having more than load capability. User refer data sheets major parts schematic this manual obtain accurate loading capability. primary signals to/from processor needed expansion available Secondary signals (less likely used) signals available Therefore, single 50-wire flat ribbon cable with connectors used most future expansions. Tables 3.10 3.11 show assignment respectively.
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TABLE 3.9. Connector assignment.
SIGNAL NAME Connect -BKPT Ground DSCLK Ground Connect -RESET Volts Ground MTMOD2/PST3 MTMOD1/PST2 MTMOD0/PST1 -HIZ/PST0 DDAT3 DDAT2 DDAT1 DDAT0 Ground MTMOD3 Connect Ground Volts Connect
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TABLE 3.10. Connector assignment.
SIGNAL NAME Volts Ground -CS2 -CS3 -CS4 -CS5 Volts -UDS Ground -LDS
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Table 3.11. Connector assignment.
SIGNAL NAME TCLK DSCLK TOUT -BKPT -RTS Volts -CTS Ground Volts DDATA0 Ground DDATA1 -IRQ0 DDATA2 -IRQ1 DDATA3 -IRQ2 Volts -IRQ3 Ground Ground MTMOD0/PST1 -CS0 MTMOD1/PST2 -HIZ/PST0 MTMOD2/PST3 BUSW MTMOD3 -DTACK -RESET Volts Ground -CS1 Connect
3.7.8 Connector SBC5204 utilize 16-bit cards. connector compatible connector. Table 3.12 shows assignment.
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TABLE 3.12. Connector assignment.
SIGNAL NAME RESET IRQ9 DRQ2 -12V ZWS* +12V SMFMW* SMFMR* IOW* IOR* DACK3* DRQ3 DACK1* DRQ1 REFSH SYSCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK2* BALE MEMCS16* IOCS16 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK0* DRQ0 DACK5* DRQ5 DACK6* DRQ6 DACK7* DRQ7 MASTER* SIGNAL NAME IOCHK* IOCHRDY SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SBHE* LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMB* MEMW* SD10 SD11 SD12 SD13 SD14 SD15
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SBC5204 JUMPERS There total four jumpers SBC5204 board configure board different setup. Table 3.13 shows what these jumpers section where more information found.
TABLE 3.13. SBC5204 Jumpers. Jumper Function (section) Power Supply Selection, (section 3.7.3) EPROM size selection (section 3.3) Flash/ EPROM selection (section 3.3) Flash/EPROM size selection (section 3.3)
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Appendix Configuring dBUG Network Downloads
dBUG ability perform downloads over Ethernet network using Trivial File Transfer Protocol, TFTP. Prior using this feature, several parameters required network downloads occur. information that required steps configuring dBUG described below. A1.1 Required Network Parameters performing network downloads, dBUG needs parameters; four network-related, download-related. parameters listed below, with dBUG designation following parenthesis.
computers connected Ethernet network running protocol need three network-specific parameters. These parameters are: Internet Protocol, address computer (client IP), address Gateway non-local traffic (gateway IP), Network netmask flagging traffic local non-local (netmask).
addition, dBUG network download command requires following three parameters: address TFTP server (server IP), Name file download (filename), Type file download (filetype S-record, COFF, Elf, Image).
Your local system administrator assign unique address board, also provide addresses gateway, netmask, TFTP server. Fill lines below with this information. Client Server Gateway: Netmask: _._._._ _._._._ _._._._ _._._._ address board) address TFTP server) address gateway) (Network netmask)
A.1.2 Configuring dBUG Network Parameters Once network parameters have been obtained, dBUG must configured. following commands used configure network parameters. client <client server <server gateway <gateway netmask <netmask> example, TFTP server named `santafe' address 123.45.67.1. board assigned address 123.45.68.15. gateway address 123.45.68.250, netmask 255.255.255.0. commands dBUG are: client 123.45.68.15 server 123.45.67.1
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gateway 123.45.68.250 netmask 255.255.255.0 last step inform dBUG name type file download. Prior giving name file, keep mind following. Most, all, TFTP servers will only permit access files starting particular sub-directory. (This security feature which prevents reading arbitrary files unknown persons.) example, SunOS uses directory /tftp_boot default TFTP directory. When specifying filename SunOS TFTP server, filenames relative /tftp_boot. result, normally will required copy file download into directory used TFTP server. default filename network downloads maintained dBUG. change default filename, command:
filename <filename> When using Ethernet network download, either S-record, COFF, Elf, Image files downloaded. default filetype network downloads maintained dBUG well. change default filetype, command: filetype <srecord|coff|elf|image> Continuing with above example, compiler produces executable COFF file, `a.out'. This file copied /tftp_boot directory server with command: a.out santafe:/tftp_boot/a.out Change default filename filetype with commands: filename a.out filetype coff Finally, perform network download with `dn' command. network download process uses configured addresses default filename filetype initiating TFTP download from TFTP server. A.1.3 Troubleshooting Network Problems Most problems related network downloads direct result improper configuration. Verify that addresses configured into dBUG correct. This accomplished `show' command. Using address already assigned another machine will cause dBUG network download fail, probably other severe network problems. Make certain client address unique board. Check proper insertion connection network cable. status LEDs indicating that network traffic present? Check proper configuration operation TFTP server. Most Unix workstations execute command named `tftp`which used connect TFTP server well. default TFTP root directory present readable?
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`ICMP_DESTINATION_UNREACHABLE' similar ICMP message appears, then serious error occurred. Reset board, wait minute TFTP server time terminate open connections. Verify that addresses server gateway correct.
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SP5D 9x4.7K 9x4.7K SP5H 9x4.7K -RESET -IRQ0 -IRQ1 -IRQ2 -IRQ3 -HIZ TMOD0 TMOD1 TMOD2 TMOD3 DDATA0 DDATA1 DDATA2 DDATA3 TOUT -CTS -RTS BUSW TACK -UDS -LDS -BKPT DSCLK TCLK SOFT_G0 9x4.7K SP5C PP0/A20 PP1/A21 MCF5204 A[0.21]
RESET IRQ0 IRQ1 IRQ2 IRQ3 HIZ/PST0 MTMOD0/PST1 MTMOD1/PST2 MTMOD2/PST3 TMOD3 DDATA0 DDATA1 DDATA2 DDATA3 TIN/PP2 TOUT/PP3 TXD/PP4 RXD/PP5 TS/PP6 TS/PP7 BUSW/ATS TACK UWE/UDS LWE/LDS BKPT/TMS DSCLK/TRST DSI/TDI DSO/TDO TCLK
|LINK MEMORY.SCH ISA.SCH CONNECT.SCH
[0.15]
SP5A 9x4.7K
SP5B 9x4.7K
-CS0 -CS1 -CS2 -CS3 -CS4 -CS5 TACK RESET IACK XTAL1 XTAL2 MC68HC901 COPYRIGHT ARNEWSH, INC. P.O. 270352 FORT COLLINS, 80527-0352 Size Date: Document Number SBC5204.CPU Thursday, October 1996 Sheet
5x4.7K
SP5F 9x4.7K
25MHZ
-DTACK901 CLK4MHZ RESET
SP5I 9x4.7K
SP5G
RESIN SENSE RESET RESET
9x4.7K
TL7705ACP
Title {Title} Size Date: Document Number {Doc} Friday, November 1996 Sheet {RevCode}
A[1.21]
D[0.15]
A17/E A18/NC HM628512 -LDS -CS1 -UDS A17/E A18/NC HM628512 A18/WE A19/A18 27C080 A18/WE A19/A18 27C080 COPYRIGHT ARNEWSH, INC. -CS0 P.O. 270352 FORT COLLINS, 80527-0352 Size Date: Document Number SBC5204.MEMORY Friday, November 1996 Sheet
D[0.15] 9x4.7K SD15 SD14 SD13 SD12 SD11 SD10 74FCT16245 A[1.16] 74FCT16244 SD10 SD11 SD12 SD13 SD14 SD15
V-12 V+12 RESET -CS3
-UDS -DTACK I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 IN1/SDO IN0/SDI ISPEN MODE Y2/SCLK Y1/RESET GOE0 LSI2032 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
RESET IRQ9 DRQ2 ZWS* +12V SMFMW* SMFMR* IOW* IOR* DACK3* DRQ3 DACK1* DRQ1 REFSH SYSCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK2* BALE MEMCS16* IOCS16 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK0* DRQ0 DACK5* DRQ5 DACK6* DRQ6 DACK7* DRQ7 MASTER* CONNECTOR_ISA IOCHK* IOCHRDY SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SBHE* LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMB* MEMW* SD10 SD11 SD12 SD13 SD14 SD15
1DIR 2DIR
CLK4MHZ -CS4
-CS2
-LDS -IRQ0 -DTACK901
14.31818MHZ
7x4.7K
SOFT_G0 7x4.7K 9x4.7K
COPYRIGHT ARNEWSH, INC. 270352 FORT COLLINS, 80527-0352 Size Date: Document Number SBC5204.ISA Thursday, October 1996 Sheet
D[0.15]
A[0.21] -CS2 -CS3 -CS4 -CS5 -LDS
C2VCC MC145407 C1VSS
-UDS
TOUT -RTS -CTS -IRQ0 -IRQ1 -IRQ2 -IRQ3 -CS0 BUSW -DTACK -CS1
TCLK DSCLK -BKPT DDATA0 DDATA1 DDATA2 DDATA3 MTMOD0 MTMOD1 MTMOD2 MTMOD3 -RESET
V-12 V+12 VOUT LT1086CT
OPYRIGHT ARNEWSH, INC. P.O. 270352 FORT COLLINS, 80527-0352 Size Date: Document Number SBC5204.CONNECTORS Thursday, October 1996 Sheet
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