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8-bit Proprietary Microcontroller F2MC-8L MB89201 Series MB8


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Revision
8-bit Proprietary Microcontroller
F2MC-8L MB89201 Series
MB89201/N201/V201
DESCRIPTION
MB89201 series line single-chip microcontrollers. addition compact instruction set, microcontrollers contain variety peripheral functions such, timers, serial interface, converter external interrupt.
FEATURES
MB89600 Series core Maximum memory space Kbytes Minimum execution time 0.32 µs/12.5 Interrupt processing time 2.88 µs/12.5 ports max. 27channels 21-bit timebase timer 8-bit timer 8/16-bit capture timer/counter 10-bit converter channels UART 8-bit serial External interrupt channels External interrupt channels Wild Register bytes Multi-time programmable flash (MTP flash) Read protection (Continued)
PACKAGES
32-pin plastic SHDIP 64-pin plastic SHDIP
(DIP-32P-M06)
(DIP-64P-M01)
MB89201 Series
(Continued) Low-power consumption modes sleep mode, stop mode) SHDIP-32 package CMOS Technology
PRODUCT LINEUP
Part number Parameter
MB89201
MB89N201 Multi-time programmable flash product (read protection) bits (internal flash) bits
MB89V201 Evaluation product (for development) 8-bit (external EPROM)
Classification
Mask product bits (internal mask ROM)
size size
functions
Number instructions Instruction length Instruction length Data length Minimum execution time Interrupt processing time
bits bytes bits 0.32 (12.5 MHz) 2.88 46.1 (12.5 MHz)
Ports 21-bit time base timer Watching timer
General-purpose ports (CMOS) (also serve peripherals ports also N-ch open-drain type.) 21-bit Interrupt cycle 0.66 2.64 335.5 with 12.5-MHz main clock Reset generation cycle 335.5 minimum with 12.5-MHz main clock 8-bit interval timer operation (square output capable, operating clock cycle 0.32 2.56 20.5 8-bit resolution operation (conversion cycle 81.9 21.47 selection internal shift clock 8/16-bit capture timer) Count clock selectable between 8-bit 16-bit timer/counter outputs 8-bit capture timer/counter channel 8-bit timer 16-bit capture timer/counter channel Capable event count operation square wave output using external clock input with 8-bit timer 16-bit counter Transfer data length 6/7/8 bits bits first/MSB first selectable clock selectable from four operation clocks (one external shift clock, three internal shift clocks 25.6 Output frequency Pulse width cycle selectable channels (Interrupt vector, request flag, request output enabled) Edge selectable (Rising edge, falling edge, both edges) Also available resetting stop/sleep mode (Edge detectable even stop mode) channel with inputs (Independent L-level interrupt input enable) Also available resetting stop/sleep mode (Level detectable even stop mode) (Continued)
8-bit timer
8/16-bit capture, timer/counter UART 8-bit Serial 12-bit timer External interrupt (wake-up function) External interrupt (wake-up function)
MB89201 Series
(Continued)
Part number Parameter
MB89201
MB89N201
MB89V201
10-bit converter Wild Register Standby mode
10-bit precision channels conversion function (Conversion time 12.16 µs/12.5 MHz) Continuous activation 8/16-bit timer/counter output time-base timer counter 8-bit Sleep mode, Stop mode
Powr-on reset Powr-on reset Powr-on reset Oscillation settling time Oscillation settling time*1 Voltage regulator os(21.0 ms/12.5 MHz) cillation settling time External reset External reset (31.5 ms/12.5 MHz) Overhead time from Oscillation settling time External reset reset first Software reset (21.0 ms/12.5 MHz) Oscillation settling time struction execution Software reset (21.0 ms/12.5 MHz) Software reset Power supply Voltage*2
Check section MASK OPTIONS" minimum operating voltage varies with operating frequency, function, connected ICE.
PACKAGE CORRESPONDING PRODUCTS
Package DIP-32P-M06 DIP-64P-M01 Available available MB89201 MB89N201 MB89V201
Adapter 64-pin 32-pin conversion (manufactured Part number Inquiry:
DIFFERENCES AMONG PRODUCTS
Memory Size
Before evaluating using evaluation product, verify differences from product that will actually used.
Current Consumption
case MB89V201, current consumed EPROM which connected adapter socket.
Mask Options
Functions that selected options designate these options vary product. Before using options check section MASK OPTIONS".
MB89201 Series
ASSIGNMENT
(TOP VIEW)
P04/INT24 P05/INT25 P06/INT26 P07/INT27 P62/RST P37/BZ/PPG P36/INT12 P35/INT11 P34/TO/INT10 P33/EC
P03/INT23/AN7 P02/INT22/AN6 P01/INT21/AN5 P00/INT20/AN4 P43/AN3* P42/AN2* P41/AN1* P40/AN0* P72* P71* P70* P50/PWM P30/UCK/SCK P31/UO/SO P32/UI/SI
Heavy-current drive type
(DIP-32P-M06) (Continued)
MB89201 Series
(Continued) (TOP VIEW)
EVDD EVSS N.C. N.C. EVDD EVSS
P40/AN0* P41/AN1* P42/AN2* P43/AN3* P00/INT20/AN4 P01/INT21/AN5 P02/INT22/AN6 P03/INT23/AN7 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P37/BZ/PPG P36/INT12 P35/INT11 P34/TO/INT10 P33/EC P32/UI/SI P31/UO/SO P30/UCK/SCK P50/PWM P70* P71* P72* P62/RST
Heavy-current drive type
(DIP-64P-M01)
N.C. Internally connected. use.
MB89201 Series
DESCRIPTION
SHDIP32*1 SHDIP64*2
name
Circuit type
Function
Pins connecting crystal main clock. external clock, input signal leave open. General-purpose CMOS input port. General-purpose CMOS input port Reset General-purpose CMOS port (selectable metal option MB89201/N201; selectable input MB89V201). This serves N-channel open-drain output with pull-up resistor input well. reset hysteresis input. selected reset pin, then outputs signal response internal reset request. Also, initializes internal circuit upon input signal. MB89V201 P62/RST selection input. pullup, then P62/RST function; pulldown, then P62/RST function; General-purpose CMOS ports. These pins also serve input (wake-up input) external interrupt converter analog input. input external interrupt hysteresis input. General-purpose CMOS ports. These pins also serve input (wake-up input) external interrupt input external interrupt hysteresis input. General-purpose CMOS ports. This also serves clock UART 8-bit serial I/O. resource hysteresis input. General-purpose CMOS ports. This also serves data output UART 8-bit serial I/O. General-purpose CMOS ports. This also serves data input UART 8-bit serial I/O. resource hysteresis input. General-purpose CMOS ports. This also serves external clock input 8/16-bit capture timer/counter. resource hysteresis input. General-purpose CMOS ports. This also serves output 8/16-bit capture timer/ counter input external interrupt resource hysteresis input. General-purpose CMOS ports. These pins also serve input external interrupt resource hysteresis input.
P62/RST
P00/INT20/AN4 P03/INT23/AN7 P04/INT24 P07/INT27 P30/UCK/SCK
P31/UO/SO
P32/UI/SI
P33/EC
P34/TO/INT10
P35/INT11, P36/INT12
(Continued) DIP-32P-M06 DIP-64P-M01
MB89201 Series
(Continued)
SHDIP*1 SHDIP*2
name
Circuit type
Function
General-purpose CMOS ports. This also serves buzzer output 12-bit programmable pulse generator output. General-purpose CMOS ports. This also serves 8-bit output pin. General-purpose CMOS ports. These pins also used N-channel open-drain ports. These pins also serve converter analog input pins. Power supply Power (GND) General-purpose CMOS ports. General-purpose CMOS ports. MB89N201: Capacitance regulating power supply. Connect external ceramic capacitor about MB89201: This internally connected. unnecessary connect capacitor.
P37/BZ/PPG P50/PWM P40/AN0 P43/AN3
DIP-32P-M06 DIP-64P-M01
MB89201 Series
EXTERNAL EPROM DESCRIPTION (MB89V201 only)
name EVDD EVSS N.C. Function EPROM power supply EPROM power supply (GND) Address output pins Data input pins chip enable Outputs during standby. output enable Outputs times. Internally connected pins sure leave them open.
MB89201 Series
CIRCUIT TYPE
Type Circuit Remarks oscillation feedback resistance approximately
Standby control signal
P-ch
CMOS output Hysteresis input Pull-up resistor optional
P-ch
N-ch
Input enable
Port Resource
P-ch
Input enable Input enable
N-ch Port Reset
output pull-up resister (P-ch) approximately k/5.0 N-ch open-drain output available CMOS input Hysteresis input (Reset input)
P-ch
P-ch
CMOS output CMOS input Hysteresis input (Resource input) Pull-up resistor optional
N-ch Input enable Input enable Port Resource
(Continued)
MB89201 Series
(Continued) Type
Circuit
P-ch
Remarks CMOS output CMOS input Pull-up resistor optional P70-P72 heavy-current drive type
P-ch
N-ch
Input enable
Port
P-ch
open-drain control
Input enable
N-ch Analog input Port enable
CMOS output CMOS input Analog input N-ch open-drain output available P40-P43 heavy-current drive type
P-ch
P-ch
CMOS output CMOS input Hysteresis input (Resource input) Analog input
N-ch Input enable Input enable Analog input enable Port Resource
CMOS input
Input enable Port
MB89201 Series
HANDLING DEVICES
Preventing Latchup
Latchup occur CMOS voltage higher than lower than applied input output pins other than medium- high-voltage pins higher than voltage which shows Absolute Maximum Ratings" section ELECTRICAL CHARACTERISTICS" applied between VSS. When latchup occurs, power supply current increases rapidly might thermally damage elements. When using, take great care exceed absolute maximum ratings. Also, take care prevent analog input from exceeding digital power supply (VCC) when analog system power supply turned off.
Treatment Unused Input Pins
Leaving unused input terminals open lead permanent damage malfunction latchup; pull pull down terminals through resistors more. Make unused terminal state output leave open input state, handle with same procedure input terminals.
Treatment N.C. Pins
sure leave (internally connected) N.C. pins open.
Power Supply Voltage Fluctuations
Although power supply voltage assured operate within rated range, rapid fluctuation voltage could cause malfunctions, even occurs within rated range. Stabilizing voltage supplied therefore important. stabilization guidelines, recommended control power that ripple fluctuations (P-P value) will less than standard value commercial frequency transient fluctuation rate will less than V/ms time momentary fluctuation such when power switched.
Precautions when Using External Clock
When external clock used, oscillation stabilization time required even power-on reset (optional) wake-up from stop mode.
About Wild Register Function
wild register debugged MB89V201. operation check, test MB89N201 installed target system.
Program Execution
When MB89V201 used, program executed RAM.
Note Noise External Reset (RST)
reset pulse applied external reset (RST) does meet specifications, cause malfunctions. caution that reset pulse less than specifications will external reset (RST).
Cautions product that does contain External Reset (RST)
product that select instead mask option, only initialize device power reset. power supply rise cutoff time does meet specifications, then power reset cannot generated, device become unusable.
MB89201 Series
PROGRAMMING ERASE FLASH MEMORY MB89N201
Flash Memory
flash memory located between C000H FFFFH memory incorporates flash memory interface circuit that allows read access program access from performed same mask ROM. Programming erasing flash memory also performed flash memory interface circuit executing instructions CPU. This enables flash memory updated place under control CPU, providing efficient method updating program data.
Flash Memory Features
configuration Automatic programming algorithm (Embedded algorithm*) Includes erase pause restart function Data polling toggle detection program/erase completion Detection program/erase completion interrupt Compatible with JEDEC-standard commands program/erase cycles Minium 100; Maxium 1,000
Embedded Algorithm trademark Advanced Micro Devices.
Procedure Programming Erasing Flash Memory
Programming reading flash memory cannot performed same time. Accordingly, program erase flash memory, program must first copied from flash memory that programming performed without program access from flash memory.
Flash Memory Control Status Register (FMCS)
Address 0079H INTE
RDYINT
Initial value 000X-B
Memory Space
memory space access parallel flash programmer access listed below. Memory size bytes address FFFFH C000H Programmer address 3FFFH 0000H
Flash Programmer Adaptor Recommended Flash Programmers
Part number MB89N201-PSH Package DIP-32P-M06 Adaptor Part number MB91919-607 Programmer Part number MB91919-001
Contact information Fujitsu Microelectronics Asia Ltd. (65)-2810770
Flash Content Protection
Flash content read using serial programmer flash content protection mechanism activated. predefined area flash (FFFCH) assigned used preventing read access flash content. protection code "01H" written this address (FFFCH), flash content cannot read serial programmer. Note program written into flash cannot verified once flash protection code written ("01H" FFFC advised write flash protection code last.
MB89201 Series
PROGRAMMING EPROM WITH EVALUATION DEVICE
EPROM
MBM27C256A-20TVM
Programming Socket Adapter
program PROM using EPROM programmer, socket adapter (manufacturer Hayato Co., Ltd.) listed below. Package Compatible socket part number LCC-32 ROM-32LC-28DP-S
Inquiry Hayato Co., Ltd. (81) -3-3986-0403 (81) -3-5396-9106
Memory Space.
Normal operating mode Address 0000H 0080H 0280H
available
Corresponding adresses programmer Address
8000H
0000H
PROM
EPROM
FFFFH
7FFFH
Programming EPROM
EPROM programmer MBM27C256A. Load program data into EPROM programmer 0000H 7FFFH. Program 0000H 7FFFH with EPROM programmer.
MB89201 Series
BLOCK DIAGRAM
Main clock oscillator
Timebase timer
Clock controller CMOS port Port
Port
*P70 *P72
Reset circuit
CMOS port (N-ch P62) Port CMOS port
UART prescaler
UART
CMOS port
Serial function switching
Internal
INT24 INT27
Port
External interrupt2 (wake-up)
serial
INT20 INT23
Port Converter 8/16 capture timer/ counter INT10
*P40 *P43
Port
CMOS port (N-ch
Exernal interrupt
INT11 INT12
byte F2MC Other pins VCC, VSS, Buzzer output Kbyte
Wild register
CMOS port
Heavy-current drive type
MB89201 Series
CORE
Memory Space
microcontrollers MB89201 series offer memory space Kbytes storing I/O, data, program areas. area located lowest address. data area provided immediately above area. data area divided into register, stack, direct areas according application. program area located exactly opposite end, that near highest address. Provide tables interrupt reset vectors vector call instructions toward highest address within program area. memory space MB89201 series structured illustrated below. Memory Space
MB89201 0000H 0080H 0100H Register 0100H Register 0080H 0100H Register 0200H 0280H available 8000H C000H FFFFH FFFFH C000H FLASH FFFFH External EPROM 0000H 0080H MB89N201 0000H MB89V201
0200H 0280H
0200H 0280H
available
available
MB89201 Series
Registers
MB89201 series types registers; dedicated registers general-purpose registers memory. following dedicated registers provided Program counter (PC) 16-bit register indicating instruction storage positions Accumulator 16-bit temporary register storing arithmetic operations, etc. When instruction 8-bit data processing instruction, lower byte used. Temporary accumulator 16-bit register which performs arithmetic operations with accumulator When instruction 8-bit data processing instruction, lower byte used. Index register (IX) 16-bit register index modification Extra pointer (EP) 16-bit pointer indicating memory address Stack pointer (SP) 16-bit register indicating stack area Program status (PS) 16-bit register storing register pointer, condition code
Initial value Program counter Accumulator Temporary accumulator Index register Extra pointer Stack pointer Program status FFFD Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate I-flag IL1, other values indeterminate.
further divided into higher bits register bank pointer (RP) lower bits condition code register (CCR) (See diagram below.) Structure Program Status Register
bit15 bit14 bit13 bit12 bit11 bit10 bit9 H-flag I-flag IL1,0 N-flag Z-flag bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 initial value X011XXXXB
Undefined
V-flag C-flag
MB89201 Series
indicates address register bank currently use. relationship between pointer contents actual address based conversion rule illustrated below. Rule Conversion Actual Addresses General-purpose Register Area
Generated addresses codes
consists bits indicating results arithmetic operations contents transfer data bits control operations time interrupt. H-flag when carry borrow from occurs result arithmetic operation. Cleared otherwise. This flag decimal adjustment instructions. I-flag Interrupt enabled when this flag "1". Interrupt disabled when flag cleared "0". Cleared reset. IL1, Indicates level interrupt currently allowed. Processes interrupt only request level higher than value indicated this bit. N-flag Z-flag V-flag C-flag Interrupt level interrupt High-low High
becomes result arithmetic operation. Cleared when cleared "0". when arithmetic operation results Cleared otherwise. complement overflows result arithmetic operation. Cleared overflow does occur. when carry borrow from occurs result arithmetic operation. Cleared otherwise. shift-out value case shift instruction.
MB89201 Series
following general-purpose registers provided General-purpose registers 8-bit register storing data general-purpose registers bits located register banks memory. bank contains eight registers total banks used MB89201 series. bank currently indicated register bank pointer (RP) Register Bank Configuration
This address 0100H (RP) banks
Memory area
MB89201 Series
Address 0000H 0001H 0002H 00006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000FH 0010H 0011H 0012H 0013H 0014H 0015H 0016H 0017H 0018H 0019H 001AH 001BH 001CH 001DH 001EH 001FH 0020H 0021H 0022H 0023H 0024H CNTR COMR EIC1 PDR3 DDR3 RSFR PDR4 DDR4 OUT4 PDR5 DDR5 RCR21 RCR22 RCR23 RCR24 BZCR TCCR TCR1 TCR0 TDR1 TDR0 TCPH TCPL TCR2 Port data register Port data direction register Reset flag register Port data register Port data direction register Port output format register Port data register Port data direction register 12-bit control register 12-bit control register 12-bit control register 12-bit control register Buzzer register Capture control register Timer control register Timer control register Timer data register Timer data register Capture data register Capture data register Timer output control register Prohibited area control register compare register External interrupt Control register XXXXXX (Continued) SYCC STBC WDTC TBTC Register name PDR0 DDR0 Register description Port data register Port data direction register Prohibited area System clock control register Standby control register Watchdog timer control register Timebase timer control register Prohibited area XXXXXX XXXX- XXXXXX XXXXXX XXXXXX XXXXXX Read/write Initial value XXXXXX
MB89201 Series
Address 0025H 0026H 0027H 0028H 0029H 002AH 002BH 002CH 002D 002FH 0030H 0031H 0032H 0033H 0034H 0035H 0036H 0037H 0038H 0039H 003AH 003BH 003C 003FH 0040H 0041H 0042H 0043H 0044H 0045H 0046H 0047H 0048H 005FH
Register name EIC2
Register description External interrupt Control register Prohibited area
Read/write
Initial value
SIDR SODR
Serial mode control register Serial rate control register Serial status data register Serial input data register Serial output data register Clock division selection register Prohibited area
XXXXXX XXXXXX
ADC1 ADC2 ADDH ADDL ADEN
converter control register converter control register converter data register converter data register enable register Prohibited area
XXXXXX
EIE2 EIF2
External interrupt control register1 External interrupt control register2 Prohibited area
SSEL
Serial mode register Serial data register Serial function switching register Prohibited area
XXXXXX
WRARH0 WRARL0 WRDR0 WRARH1 WRARL1 WRDR1 WREN WROR
Upper-address setting register Lower-address setting register Data setting register Upper-address setting register Lower-address setting register Data setting register Address comparison register Wild-register data test register Prohibited area
XXXXXX XXXXXX XXXXXX XXXXXX XXXXXX XXXXXX XXXXXX (Continued)
MB89201 Series
(Continued) Address 0060H 0061H 0062H 0063H 0064H 0065H 0066H 006FH 0070H 0071H 0072H 0073H 0078H 0079H 007AH 007BH 007C 007D 007EH 007FH ILR1 ILR2 ILR3 ILR4 FMCS PUL0 PUL3 PUL5
Register name PDR6 DDR6 PUL6 PDR7 DDR7 PUL7
Register description Port data register Port data direction register* Port pull-up setting register Port data register Port data direction register Port pull-up setting register Prohibited area Port-0 pull-up setting register Port-3 pull-up setting register Port-5 pull-up setting register Prohibited area Flash memory control status register Prohibited area Interrupt level setting register1 Interrupt level setting register2 Interrupt level setting register3 Interrupt level setting register4 Interrupt test register
Read/write
Initial value
available
Unused, Undefined, using mask option Note prohibited areas. used MB89N201
MB89201 Series
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter Power supply voltage Input voltage Output voltage level maximum output current Symbol Value Min. Max. Unit Average value (operating current operating rate) Pins excluding P43, Average value (operating current operating rate) Pins P43,
(Vss 0.0V)
Remarks
IOLAV1 level average output current IOLAV2 level total maximum output current level maximum output current level average output current level total maximum output current Power consumption Operating temperature Storage temperature IOHAV Tstg
+150
Pins excluding Average value (operating current operating rate)
WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
MB89201 Series
Recommended Operating Conditions
Parameter Symbol Value Min. Power supply voltage level input voltage VIHS level input voltage VILS Open-drain output application voltage Operating temperature Max. Unit MB89201 MB89N201 MB89V201 Retains state stop mode P07, P31, P37, P43, P50, P62, RST, INT20 INT27, UCK/SCK, INT10 INT12, P30, P36, UI/SI P07, P31, P37, P43, P50, P62, RST, INT20 INT27, UCK/SCK, INT10 INT12, P30, P36, UI/SI P43, P62,
(Vss 0.0V)
Remarks
Operating Assurance MB89201 MB89PV201
Operating Assurance MB89N201
Analog accuracy assurance range
Operating voltage
Operation analog accuracy assurance range
Operating voltage
Operation assurance range
Area assured only MB89201
Operating Frequency (MHz)
12.5
Operating Frequency (MHz)
12.5
WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representatives beforehand.
MB89201 Series
Characteristics
(VCC 10%, 12.5 (External clock) Parameter Symbol level input voltage VIHS name
P07, P31, P37, P43, P50, P62, P30, P36, UCK/SCK, UI/SI, INT20 INT27, INT10 INT12 P07, P31, P37, P43, P50, P62, P30, P36, RST, UCK/SCK, UI/SI, INT20 INT27, INT10 INT12
Condition
Value Min.
Typ.
Max.
Unit
Remarks
level input voltage VILS Open-drain output application voltage level output voltage level output voltage Input leakage current Pull-up resistance
P43, RST/P62
VOL1 VOL2
P07, P37, P43, P50, P07, P37, P50, RST/P62 P43, P07, P37, P43, P61, RST/P62, P07, P37,
-4.0 12.0 0.45 When converter stops When converter starts When converter stops When converter stops
Without pull-up resistor
RPULL P50, RST/P62,
Normal operation mode (External clock, highest gear speed) Sleep mode (External clock, highest gear speed) Stop mode (External clock) Other than VCC,
MB89201 MB89N201 MB89201 MB89N201 MB89201 MB89N201
MB89201 MB89N201 MB89N201
Power supply current ICCS
ICCH Input capacitance
MB89201 Series
Characteristics
(VSS Parameter pulse width Internal reset pulse extension tHCYL oscillating clock cycle time Symbol tZLZH tirst Condition Value Min. tHCYL Max. Unit Remarks
Reset Timing
tZLZH
Internal reset signal
tirst
Notes: power-on reset option leave external reset until oscillation becomes stable. reset pulse applied external reset (RST) does meet specifications, cause malfunctions. caution that reset pulse less than specifications will external reset (RST). Power-on Reset (VSS Parameter Power supply rising time Power supply cutoff time Symbol tOFF Condition Value Min. Max. Unit repeated operations Remarks
tOFF
Note supply voltage must minimum value required operation within prescribed default oscillation settling time. Note product that select instead mask option, only initialize device power reset. power supply rise cutoff time does meet specifications, then power reset cannot generated, device become unusable.
MB89201 Series
Clock Timing (VSS -40°C +85°C) Parameter Clock frequency Clock cycle time Input clock pulse width Input clock rising/falling time Symbol tXCYL Condition Value Min. Max. 12.5 1000 Unit Remarks
Timing Conditions
tXCYL
Main Clock Conditions
When crystal ceramic resonator used When exernal clock used
open
Instruction Cycle. Parameter Instruction cycle (minimum execution time) Symbol tINST Value (typical) 4/FCH, 8/FCH, 16/FCH, 64/FCH Unit Remarks tINST 0.32 when operating 12.5 (4/FCH)
MB89201 Series
Peripheral Input Timing (VCC 10%, Parameter Peripheral input pulse width Peripheral input pulse width Symbol tILIH tIHIL name INT10 INT12, INT20 INT27, Value Min. tINST* tINST* Max. Unit Remarks
information tINST Instruction Cycle".
tILIH
tIHIL
INT10 INT12, INT20 INT27,
(VCC 10%, Parameter Peripheral input noise limit Symbol tIHNC name P07, P37, P43, P50, P62, P72, RST, INT20 INT27, INT10 INT12 Value Min. Typ. Max. Unit Remarks
Peripheral input noise limit
tILNC
tIHNC
tILNC
INT10 INT12,
MB89201 Series
UART, Serial Timing (VCC 10%, Parameter Serial clock cycle time UCK/SCK time Valid UCK/SCK UCK/SCK Valid hold time Serial clock pulse width Serial clock pulse width UCK/SCK time Valid UCK/SCK UCK/SCK Valid hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX name UCK/SCK UCK/SCK, Internal shift UCK/SCK, clock mode UCK/SCK, UCK/SCK UCK/SCK UCK/SCK, UCK/SCK, UCK/SCK, External shift clock mode Condition Value Min. tINST* -200 tINST* tINST* tINST* tINST* tINST* tINST* Max. Unit Remarks
information tinst, Instruction Cycle". Internal Shift Clock Mode
tSCYC
UCK/SCK
tSLOV
tIVSH tSHIX
External Shift Clock Mode
tSLSH tSHSL
UCK/SCK
tSLOV
tIVSH tSHIX
MB89201 Series
Converter
(VSS Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Full-scale transition voltage mode conversion time Analog port input current Analog input voltage range Power supply voltage accuracy assurance VFST IAIN Symbol Value Min. -5.0 -3.0 -2.5 Typ. Max. +5.0 +3.0 +2.5 tINST* Unit
MB89201 MB89V201 MB89N201
Converter Electrical Characteristics
Remarks
information tinst, Instruction Cycle" Characteristics." Converter Glossary Resolution Analog changes that identifiable with converter When number bits analog voltage divided into 1024. Linearity error (unit LSB) deviation straight line connecting zero transition point ("00 0000 0000" 0000 0001") with full-scale transition point ("11 1111 1111" 1111 1110") from actual conversion characteristics Differential linearity error (unit LSB) deviation input voltage needed change output code from theoretical value Total error (unit LSB) difference between theoretical actual conversion values
Theoretical characteristics
VFST
Actual conversion value LSB}
Total error
Digital output
AVSS
Digital output
AVSS Actual conversion value Theoretical value
Analog input
Analog input
VFST 1022
Total error digital output
LSB}
MB89201 Series
Zero transition error
Actual conversion value
Full-scale transition error
Theoretical value
Actual conversion value
Digital output
Digital output
VFST (Measured value) Actual conversion value
Theoretical conversion value (Measured value) AVSS Actual conversion value
Analog input
Analog input
Linearity error
Actual conversion value VOT}
Differential linearity error
Theoretical conversion value
Digital output
Actual conversion value
Digital output
AVSS
VFST (Measured value)
Actual conversion value Theoretical conversion value (Measured value)
Actual conversion value
AVSS
Analog input
Analog input
Linearity error digital output
VOT}
Differential linearity error digital output
MB89201 Series
Notes Using Converter Input impedance analog input pins converter used MB89201 series contains sample hold circuit illustrated below fetch analog input voltage into sample hold capacitor instruction cycles after activating conversion. this reason, output impedance external circuit analog input high, analog input voltage might stabilize within analog input sampling period. Therefore, recommended keep output impedance external circuit (below Note that impedance cannot kept low, recommended connect external capacitor about analog input pin. Analog Input Equivalent Circuit
Analog input Sample hold circuit
Comparator
analog input impedance higher than recommended connect external capacitor approx. MB89201 approx. approx. MB89N201 approx. approx.
Close instruction cycles after activating conversion Analog channel selector
Error smaller AVSS greater error would become relatively.
MB89201 Series
EXAMPLE CHARACTERISTICS
Power supply current MB89201/MB89N201 when external clock used) MB89201 Normal operation mode (ICC1 VCC, ICC2
(mA) (FCH MHz,
MB89N201 Normal operation mode (ICC1 VCC, ICC2 VCC)
(mA) (FCH MHz,
ICC1 (gear divide)
ICC1 (gear divide)
ICC2 (gear divide)
ICC2 (gear divide)
MB89201 Sleep mode (ICCs1 VCC, ICCs2
ICCs (mA) (FCH MHz,
MB89N201 Sleep mode (ICCs1 VCC, ICCs2 VCC)
ICCs (mA) (FCH MHz,
ICCs1 (gear divide)
ICCs1 (gear divide)
ICCs2 (gear divide)
ICCs2 (gear divide)
MB89201 Series
MB89201/MB89N201 (when external clock used) MB89201 Normal operation mode (ICC1 VCC, ICC2 VCC)
(mA) (FCH MHz,
MB89N201 Normal operation mode (ICC1 VCC, ICC2
(mA) (FCH MHz,
ICC1 (gear divide)
ICC1 (gear divide)
ICC2 (gear divide)
ICC2 (gear divide)
MB89201 MB89N201 Seep mode Seep mode (ICCs1 VCC, ICCs2 VCC) (ICCs1 VCC, ICCs2 VCC)
ICCs (mA) (FCH MHz, ICCs (mA) (FCH MHz,
ICCs1 (gear divide) ICCs2 (gear divide)
ICCs1 (gear divide) ICCs2 (gear divide)
MB89201 Series
MB89201/MB89N201 12.5 (when external clock used) MB89201 Normal operation mode (ICC1 VCC, ICC2 VCC)
(mA) (FCH 12.5 MHz,
MB89201 Normal operation mode (ICCs1 VCC, ICCs2
ICCs (mA) (FCH 12.5 MHz,
MB89201 Normal operation mode (ICCh VCC)
ICCh (µA) (FCH 12.5 MHz,
ICC1 (gear divide)
ICCs1 (gear divide)
ICC2 (gear divide)
ICCs2 (gear divide)
MB89201 Stop mode (ICCh
ICCh (µA) (FCH 12.5 MHz, ICCh (µA)
MB89N201 Stop mode (ICCh
(FCH 12.5 MHz,
Temperature (°C)
Temperature (°C)
MB89201 Series
level output voltage IOL1
IOL2
IOL1 (mA)
IOL2 (mA)
level output voltage VOH)
(mA)
MB89201 Series
MASK OPTIONS
Part number Specifying procedure Selection initial value main clock oscillation settling time* (with 12.5 MHz) 214/FCH (Approx.1.31 217/FCH (Approx.10.5 218/FCH (Approx.21.0 Reset output** With reset output Without reset output External Reset external reset used used MB89201
Specify when ordering masking
MB89N201
MB89V201
Specify part number
Selectable
Fixed 218/FCH
Fixed 218/FCH
Selectable
With reset output
With reset output
Selectable
Selectable
Selectable input
Main clock oscillation frequency Initial value which oscillation settling time (SYCC WT1, WT0) system clock control register Reset output available only external reset option choose external reset
ORDERING INFORMATION
Part number MB89201-PSH MB89N201-PSH MB89N201A-PSH MB89V201-CFV Package 32-pin Plastic SHDIP (DIP-32P-M06) 32-pin Plastic SHDIP (DIP-32P-M06) 32-pin Plastic SHDIP (DIP-32P-M06) 64-pin Plastic SHDIP (DIP-64P-M01) used external reset used Remarks
MB89201 Series
PACKAGE DIMENSIONS
32-pin plastic SHDIP (DIP-32P-M06)
8.89 28.00
+0.20 -0.30
+0.25 -0.25
4.70
+0.70 -0.20
DIP-32P-M06 D32018S-c
1.02
+0.30 -0.20
3.30
1.27MAX.
0.48
+0.08 -0.12
+0.20 -0.30
Dimensions (inches) (Continued)
MB89201 Series
(Continued) 64pin plastic SHDIP (DIP-64P-M01)
58.00 -0.55 2.283 -.022
+0.22
+.009
INDEX-1 17.00±0.25 (.669±.010) INDEX-2
4.95 -0.20 .195 -.008
+0.70 +.028
0.70 -0.19 .028 -.007
+0.50 +.020
3.30 -0.30 .130
+0.20 +.008 -.012 +0.40 -0.20 +.016 -.008
0.27±0.10 (.011±.004) 1.378 .0543 1.778(.0700) 0.47±0.10 (.019±.004) 0.25(.010)
19.05(.750) 0~15°
1.00 .039
+0.50 +.020
2001 FUJITSU LIMITED D64001S-c-4-5
Dimensions (inches)
MB89201 Series
FUJITSU LIMITED
further information please contact: Japan FUJITSU LIMITED Marketing Division Electronic Devices Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0721, Japan Tel: +81-3-5322-3353 Fax: +81-3-5322-3386 http://edevice.fujitsu.com/ North South America FUJITSU MICROELECTRONICS AMERICA, INC. 3545 North First Street, Jose, 95134-1804, U.S.A. Tel: +1-408-922-9000 Fax: +1-408-922-9179 Customer Response Center Mon. Fri.: (PST) Tel: +1-800-866-8608 Fax: +1-408-922-9179 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Siebenstein 6-10, D-63303 Dreieich-Buchschlag, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://www.fme.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA LTD. #05-08, Lorong Chuan, Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 http://www.fmal.fujitsu.com/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 1702 KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ F0207 FUJITSU LIMITED Printed Japan
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information circuit diagrams this document presented examples semiconductor device applications, intended incorporated devices actual use. Also, FUJITSU unable assume responsibility infringement patent rights other rights third parties arising from this information circuit diagrams. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that Fujitsu will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Japan, prior authorization Japanese government will required export those products from Japan.

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