PM5316/PM5310 SPECTRA-4X155 WITH REFERENCE DESIGN PM5316/PM5

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PM5316/PM5310 SPECTRA-4X155 WITH REFERENCE DESIGN PM5316/PM5

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PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
PM5316/PM5310
SPECTRA-4X155 WITH
REFERENCE DESIGN
PRELIMINARY ISSUE JUNE 2000
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PUBLIC REVISION HISTORY Issue Issue Date Details Change
June 2000 Document created.
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CONTENTS DEFINITIONS FEATURES APPLICATIONS REFERENCES. APPLICATION EXAMPLES BLOCK DIAGRAM FUNCTIONAL DESCRIPTION. PM5316 SPECTRA-4X155 PM5310 TECHNOLOGY 9054 INTERFACE. CPLD. CLOCKS. POWER SUPPLY.11 7.6.1 VOLTAGE REGULATORS 7.6.2 SWAP CONTROLLER SYSTEM INTERFACE
IMPLEMENTATION DESCRIPTION ROOT DRAWING, PAGE OPTICS BLOCK, PAGE SPECTRA-4X155 BLOCK, PAGES 3,4,5,6 BLOCK, PAGES 9,10, SYSTEM INTERFACE BLOCK, PAGE
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CPLD BLOCK, PAGE CPCI BLOCK, PAGES POWER BLOCK, PAGE
SCHEMATICS LAYOUT BILL MATERIAL
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LIST FIGURES
FIGURE ADD/DROP MUX. FIGURE SPECTRA-4X155 REFERENCE DESIGN BOARD. FIGURE CPLD FUNCTIONAL BLOCK DIAGRAM. FIGURE POWER SUPPLY SYSTEM BLOCK. FIGURE CPCI SWAP CIRCUIT.
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LIST TABLES
TABLE TABLE TABLE
WORKING PROTECT CONNECTOR PINOUT AUXILIARY CONNECTOR PINOUT BILL MATERIAL.
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DEFINITIONS Loss signal When SONET receiver detects allzeros pattern microseconds longer, this constitutes failure. indicates that upstream transmitter failed. This condition cleared when consecutive valid frames received. Loss frame absense valid framing pattern microseconds leads failure condition. This cleared when consecutive valid A1/A2 framing patterns received. Optical Data Link ElectroStatic Discharge Alarm indication signal This condition occur response conditions above. SONET signal format provides AISs line (AIS-L), Path (AIS-P), Path (AIS-V) layers. Error Rate Clock Recovery Unit Recovers timing information from receive data streams. Clock Synthesis Unit Generates timing signal transmit data streams.
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FEATURES CompactPCI (cPCI) interface. MT-RJ OC-3 rate line side transceivers operating 3.3V provide Mbit/s aggregate operation. CMOS ADD/DROP Telecom interface ADD/DROP Telecom interface. Telecom configured operate single STS-12 (STM-4) mode 77.76 MHz. CPLD performs address decoding, timing source selection signal interfacing functions. Line interface speeds 155.52 Mbit/s. Enables 4XOC-3 channelization.
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APPLICATIONS SONET/SDH Multiservice ADMs SONET/SDH Cross Connects SONET/SDH Terminal Multiplexers
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REFERENCES
PMC-Sierra, Inc. PMC-990822, "SPECTRA-4X155 Data Sheet March 2000, Issue PMC-Sierra, Inc. PMC-990522, "TBS Telecombus Serializer", 1999, Issue Technology, Inc. "PCI 9054 Data Book v2.0", August 1999.
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APPLICATION EXAMPLES SPECTRA-4X155 WITH Reference Card implemented multi-service SONET network. Four line side OC-3 channels provide considerable flexibility implementing SONET ring architectures. Figure below outlines typical application. Figure Add/Drop MUX.
SPECTRA-155 QUAD WITH Line Card
DROP RING RING
OC-N
OC-N
OC-M
OC-M
ADD/DROP
DROP
RING
RING
OC-N
SPECTRA-155 QUAD WITH Line Card
OC-N
SPECTRA-4X155 WITH Line Card also implemented SONET/SDH digital cross connect. devices line cards interfaced create simple switch architecture. Note that switch STS-1 granularity only parallel serial serial parallel directions. more complete digital cross-connect implemented utilizing core cross-connect element. Additionally, Line Card implemented Terminal Multiplexer, which similar ADM, except that incoming traffic card dropped. This application would allow four OC-3 streams terminated point-to-point network.
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BLOCK DIAGRAM Figure SPECTRA-4x155 Reference Design Board
MT-RJ MT-RJ MT-RJ MT-RJ
DC1J1V1 AC1J1V1/AFP
IJ0J1 PM5310 OJ0J1 SYSCLK ADDR DATA
PM5316 SPECTRA-155 QUAD
TPWRK TNWRK TPPROT TNPROT RPWRK RNWRK RPPROT RNPROT RJ0FP TJ0FP RWSEL xCMP
SYSCLK
CPLD
19.44
77.76 Osc.
REFCLK ADDR DATA
9054 BRIDGE
CPCI
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FUNCTIONAL DESCRIPTION PM5316 SPECTRA-4X155 receives OC-3 SONET/SDH serial streams from Hewlett Packard MT-RJ optical transceivers recovers clock data. chip processes SONET section, line, path overhead. 77.76 Mbit/s Telecom ADD/DROP SPECTRA-4X155 connects directly Telecom ADD/DROP TBS. extracted payload from incoming data stream placed DROP Telecom routed byte-serial format. receives serializes incoming byte-serial data stream into bit-serial stream. bit-serial stream routed backplane pair working, pair auxiliary, pair protect 777.6 LVDS serial links with 8B/10B-based encoding. system side SPECTRA-4X155 device configured operate single DROP/ADD Telecombus mode 77.76 MHz. this mode, single STS12 byte-serial stream connects Telecom interface device only lower bits TBS's parallel Telecombus required pass traffic. reference board routes signals from backplane which permits further processing other members CHESS chipset. example, S/UNI MACH48 used terminate bit/byte HDLC. system clock source selectable between modes. board provide it's system clock onboard 77.76 oscillator, receive clock signal through backplane from timing card. SPECTRA-4X155 19.44 reference clock provided board oscillator.
PM5316 SPECTRA-4X155 PM5316 SPECTRA-4X155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER terminates transport path overhead four STS-3 Mbit/s streams. SPECTRA-4X155 receives SONET/SDH frames serial interfaces, recovers clock data, terminates SONET/SDH section, line, path. SPECTRA-4X155 performs framing (A1,A2), descrambling, detects alarm conditions, monitors section line interleaved parity (BIP) (B1, B2), accumulating error counts each level performance monitoring purposes. SPECTRA-4X155 interprets received payload pointers (H1, extracts synchronous payload envelope (virtual container).
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SPECTRA-4X155 transmits SONET/SDH frames, serial interfaces. chip performs framing pattern insertion (A1, A2), scrambling, alarm signal insertion, creates section line BIPs (B1, required allow performance monitoring end. addition basic processing transmit SONET/SDH overhead, SPECTRA-4X155 provides convenient access overhead bytes, which inserted serially lower rate interfaces, allowing additional external sourcing overhead, desired. SPECTRA-4X155 implemented 3.3V, CMOS process technology. positive (PECL) compatible inputs outputs. SPECTRA-4X155 configured, controlled monitored generic 8-bit microprocessor interface standard signal JTAG test port boundary scan board test purposes. SPECTRA-4X155 available SBGA package. PM5310 PM5310 Telecom serializer monolithic integrated circuit that implements conversions between parallel Telecom serial Telecom bus. used connect SONET/SDH framer devices ATM/POS processor devices cross-connect devices. also used connect cross-connect devices (like PM5372 TSE) SONET/SDH tributary unit processors mapper devices. connects Parallel-Telecom three sets four serial LVDS links called Working, Protect Auxiliary. Transport payload frame boundaries, pointer justification events alarm conditions marked with 8B/10B control characters. read Working channel selection signal (RWSEL) determines which receive S-TCB port forwarded outgoing P-TCB. Software control allows mixing data outgoing P-TCB from three S-TCB ports. configured, controlled monitored generic 16-bit microprocessor interface standard signal JTAG test port boundary scan board test purposes. available UBGA package. Technology 9054 Interface Technology PCI9054 provides interface between system signals local SPECTRA-4X155 Reference Design board. system signals found connector J1_1. PCI9054 bridge provides data address information local side, interrupt signalling host processor card. PCI9054 device configured 1K-bit serial EEPROM device.
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CPLD CPLD used chip select decoding SPECTRA devices that share LA[31.2] LD[31.0] buses. LA[16] LA[17] bits used select appropriate device access. When LA[17] CPLD will have it's internal register accessed with data LD[0] LD[1]. When LA[17] signals passed LA[16] used decode between chip selects SPECTRA-4X155 TBS. LA[16] will assert CSB_SPECTRA signal, while LA[16] asserts CSB_TBS signal. internal register used select clock source SYSCLK, ACK. LD[0] selects between backplane supplied SYSCLK signal onboard oscillator. CPLD used change local read/write signal from controller (L_WRB) into separate signals microprocessor interface signals WRB. CPLD acts buffer non-LVDS signals that come from backplane show debugging information with LEDs. Some overhead signals from SPECTRA_4X155 routed CPLD debugging/overhead monitoring. Figure details functions CPLD.
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Figure
CPLD Functional Block Diagram
L_ADSB L_WRB LHOLD LHOLDA L_READYB
Micro Interface Control
LCLK
LA[17]
CSB_TBS
CSB_SPECTRA
LA[16]
Registers
LD[2:0]
LOCAL_OSC
Divide
SYSCLK SYSCLK1 SYSCLK2 INTB_SPECTRA INTB_TBS
INTB
Clocks 77.76 system clock signal Telecom clocks SPECTRA-4X155 configured ways: from onboard 77.76 oscillator from backplane. SPECTRA-4X155 19.44 reference with balance supplied either 19.44 oscillator optionally reference clock supplied externally through connector.
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Power Supply Figure Power Supply System Block.
+3.3V
+5V_PCI +3.3V_PCI +12V_PCI -12V_PCI BD_SEL# HEALTHY# PCI_RST#
Swap Controller LT1643L
+12V -12V
Switching Regulator
1.8V
Power Block provides stable voltage supplies delivered over CompactPCI backplane from centralized power supply. Voltage levels +5V, +3.3V, +12V, -12V regulated 1.8V available from this block. 7.6.1 Voltage Regulators Linear regulators supply 3.3V analog 1.8V analog pins SPECTRA4X155 devices respectively. These regulators located power sheets SPECTRA-4X155 TBS. 1.8V switching regulator module used generate supply labelled 1.8V. Only uses this supply. 7.6.2 Swap Controller Swap Controller used allow board safely inserted removed from live cPCI slot. External N-channel MOSFETS control 3.3V supplies, while +12V -12V supplies controlled with on-chip switches. supply voltages ramped programmable rate. swap controller implemented using Linear Technology LTC1643L. typical cPCI Swap circuit shown below Figure Note that only swap controller implemented power block. Additional Swap circuitry including precharge circuitry cPCI included CompactPCI block.
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Figure
cPCI Swap Circuit
0.01 IRF7413
+5V_PCI 0.005 +3.3V_PCI
IRF7413
3.3V 7.6A
V(I/O) CompactPCI Connector 1.2k
3Vin 3Vsense GATE 3Vout 5Vin 5Vsense 5Vout 12Vin VEEin V(I/O) FAULT# 12Vout VEEout 500mA -12V 100mA
+12V_PCI -12V_PCI BD_SELB
LT1643L
HEALTHYB 0.1uF 0.1uF
PWRGD# TIMER 0.01uF
3.3V, +12V, -12V power supplies generated from medium length power pins connector (+5V_PCI, +3.3V_PCI, etc). long power pins which make first connections used generate precharge voltage cPCI pins. circuit above, 3.3V power supplies controlled Nchannel pass transistors Internal circuitry controls +/-12V rails. control overcurrent conditions. provide current control loop compensation. prevent high frequency oscillations pass transistors. Finally, Zener diode protects against power surges -12V rail. During insertion power-up sequence, BD_SEL# final connect board. This connected Swap Controller. When pulled low, pass transistors turned pulling GATE high, current each pass transistor rises rate dv/dt 50µA/C1, until reaching preset limit. there high load capacitance, rate increase will controlled this value. Once supply voltages stabilize PWRGD# signal pulled low. sense resistors Figure above current limit 3.3V supplies. current limit governed following equation:
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53mV sense
circuit Figure above, 3.3V current limit will 10.6A, limit will 5.3A. Upon removal, will pulled high, GATE pass transistors pulled prevent load currents 3.3V rails from instantaneously going zero glitching power supply. /PWRGD pulled high supply voltages moves below threshold. System Interface This board based cPCI (233.35mm 160mm) board size. J1_1 connections standard cPCI pinouts connector carries standard cPCI signals. other connectors implemented this reference design connectors. These connectors used connect 777.6 Mbit/s LVDS signals control signals backplane. Note that columns connector separated ground planes. Column connector does have ground shielding outer side, therefore speed signals placed this column. assignments made low-noise configuration specified AMP. table following page outlines pinout.
Table Column
Working Protect Connector Pinout SYSCLK1P RPPROT4 RPPROT3 RPPROT2 RPPROT1 RPWRK4 RPWRK3 SYSCLK1N RNPROT4 RNPROT3 RNPROT2 RNPROT1 RNWRK4 RNWRK3 SYSCLK2 TPPROT4 TPPROT TPPROT2 TPPROT1 TPWRK4 TPWRK3 SYSCLK2N TNPROT4 TNPROT3 TNPROT2 TNPROT1 TNWRK4 TNWRK3
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Column
RPWRK2 RPWRK1 TJ0FP_OUT
RNWRK2 RNWRK1 RJ0FP_IN
TPWRK2 TPWRK1 RWSEL_I
TNWRK2 TNWRK1 XCMP_IN
Table Column
Auxiliary Connector Pinout TNAUX4 TNAUX3 TNAUX2 TNAUX1 RNAUX4 RNAUX3 RNAUX2 RNAUX1 TPAUX4 TPAUX3 TPAUX2 TPAUX1 RPAUX4 RPAUX3 RPAUX2 RPAUX1
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IMPLEMENTATION DESCRIPTION This section describes hardware implementation SPECTRA-4X155 WITH reference design. Each section references schematics contained Section
Root Drawing, Page This page shows interconnection between functional blocks design.
Optics Block, Page Page shows optical interface reference design. Four HFCT5905E MT-RJ Duplex single mode transceivers used transmit receiver four OC-3 optical streams. HFCT-5905E PECL device 10-pin package. PECL signals connected SPECTRA-4X155 receive transmit pins through controlled impedance lines. receive transmit lines properly terminated SPECTRA-4X155 transceiver devices. resistors provide source terminations PECL outputs from should placed close possible ODL. resistor capacitor networks between TXDP TXDN lines provide biasing SPECTRA-4X155 PECL outputs should also placed close ODL.
Spectra-4x155 Block, Pages 3,4,5,6 SPECTRA_4x155_BLOCK shows SPECTRA-4X155 signals power circuitry. Page contains Block SPECTRA-4X155 device. Block contains line side signals SPECTRA-4X155. PECL receive lines have parallel termination resistors ohms. transmit differential outputs have series capacitors remove component output signal resistors used bring signals PECL signaling levels. 0.22 capacitors used loop filter pins, PECLV pulled ground select optics. REFCLK source must 19.44 ±20ppm clock signal. means header clock source selected between on-board oscillator from external source connector.
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Page contains Blocks SPECTRA-4X155 device. Blocks SPECTRA-4X155 contain ADD/DROP Telecom signals. DROP data signals DROP_DATA[7:0] contain STS-3/3c received SONET/SDH payload data four channels. DROP data signals DROP_DATA[31:8] left floating because data will delivered these bits. Similarly, single interface, data signals ADD_DATA[7:0] contain STS-3/3c SONET/SDH payload data transmit four channels. data signals ADD_DATA[31:8] pulled prevent noise triggering these signals these inputs will receive data. Header provides access TPAIS, TPAISCK, TPAISFP, DPAIS, DPAISCK, DPAISFP signals. Page contains Block SPECTRA-4X155 device. Block contains microprocessor JTAG signals. JTAG implemented this design therefore pins pulled-up maintain appropriate signal state. Page contains Block SPECTRA-4X155 device. Block SPECTRA-4X155 device contains transmit receive overhead signals. signals routed 32X2 header access. four SALM signals routed off-page CPLD alarm indication. transmit inputs pulled-low prevent noise triggering signals. Ring Control signals routed matched impedance connector debugging. Page contains Block SPECTRA-4X155 device. Block contains power pins SPECTRA-4X155. digital power pins have decoupling capacitors placed close possible pins well 10uF bulk capacitors. receive transmit analog power pins filtered filters provide clean voltage pins. VBIAS pins (VBIAS<1.0>) tied 3.3V supply resistor since there devices board. 3.3V regulator shown this page also used supply optics. Block, Pages 9,10, TBS_BLOCK shows signals power circuitry. Page contains Block device. Block shows system side LVDS signals TBS. These signals received from transmitted backplane. LVDS differential signals transmission traces must controlled impedance lines. TCMP OCMP (connection memory page) signals buffered CPLD sourced from backplane. SYSCLK sourced from either on-board 77.77 oscillator external 77.76 clock signal.
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Page contains Blocks device. Blocks contain ADD/DROP Telecom signals which interface SPECTRA4X155. Because SPECTRA-4X155 Telecom configured operate single-drop mode, only OD1[7:0] ID1[7:0] data bits used. Outgoing (ADD) Telecom channels left unconnected well their respective ODP, OPL, OJ0J1, OPAIS, OTV5, OTPL, OTAIS, OCOUT signals. OPAIS, OTV5, OTPL, OTAIS, OCOUT channel routed header access. Incoming (DROP) Telecom channels pulled prevent noise triggering signals well their respective IDP, IPL, IJ0J1, IPAIS, ITV5, ITPL, ITAIS signals. Signals IPAIS, ITV5, ITPL, ITAIS channel routed header access. Page contains Block device. Block contains microprocessor JTAG signals. JTAG implemented this design therefore pins pulled-up maintain appropriate signal state. Page contains Block device regulated 1.8V supply. Block contains power pins TBS. Both Volt Volt supply rails decoupled capacitors well 10uF bulk capacitors. supply CSU_AVDH passed through filter provide clean voltage pin. RESK pins externally attached 3.16K resistor. 1.8V regulator shown this page used supply 1.8V analog pins device. System Interface Block, Page SYS_INTERFACE_BLOCK contains connectors transfer LVDS signals between backplane reference board. transmit receive differential pairs grouped together connector. connector contains LVDS working protect differential signals. differential SYSCLK signals generated reference board also sent through connector. bottom connector used strictly LVDS auxiliary channels. This connector optional populated depending application requirements. LVDS signal traces differential SYSCLK traces controlled impedance lines. CPLD Block, Page CPLD_BLOCK shows signal connections from Xilinx XC9572XL CPLD. CPLD used address decoding, microprocessor access control, signal conversion, signal buffering, clock distribution. PECL differential clock signals, SYSCLK1(P,N) SYSCLK2(P,N), translated into single-ended signals using Motorola MC100EPT23 device. 77.76 local oscillator signal also input CPLD. Through
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software control, CPLD select which clock sources used sends selected signal Pericom 49FCT3807 clock driver device. 49FCT3807 clock distributes 77.76 signal SYSCLK input well Telecom clocks SPECTRA4X155. Maxim power supply monitor device with reset provides manual reset capability with push-button switch attached master reset input. Motorola MC74HC244 driver/buffer chip used drive Lumex LXH5147 arrays. LED's programmed display status alarms from SPECTRA-4X155 device display information debugging. microprocessor interrupt lines also routed LED's device interrupt status. Header provides interface CPLD JTAG pins programming device. cPCI Block, Pages CPCI_BLOCK shows 9054 signal power circuitry connections. PCI9054 3.3V/5V compliant v2.2 32-bit, 33MHz Master Interface Controller, that provides flexible local configurations Swap capability. multiplexed address/data associated control lines connect directly from CPCI J1_1 connector PCI9054 interface device. control lines terminated with stub resistors that should placed close J1_1 connector pins. 9054 operates with 32-bit non-multiplexed (C-mode) local side. lower bits address lines used byte access unused this application. serial EEPROM required device configuration after reset power-up. Fairchild Semiconductor NM93CS46 serial EEPROM used program 9054. Power Block, Page POWER_BLOCK shows power signal connections, Hot-Swap Controller, voltage regulator connections.
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Power Supply System Block provides stable voltage supplies delivered over CompactPCI backplane from centralized power supply. Voltage levels +5V, +3.3V, +12V, -12V regulated 1.8V provided. voltage regulator provided Power Supply System Block. 1.8V switching regulator generates core digital power supply required device. 3.3V SPECTRA devices powered directly from digital sections swap controller.
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SCHEMATICS LAYOUT
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REVISIONS
ZONE DESCRIPTION DATE APPR
PAGE OPTICS_BLOCK
PAGES 3,4,5,6,7 SPECTRA_4X155_BLOCK PAGES 8,9,10,11 TBS_BLOCK RXD_P1 RXD_N1 TXD_P1 TXD_N1 RXD_P2 RXD_N2 TXD_P2 TXD_N2 RXD_P3 RXD_N3 TXD_P3 TXD_N3 RXD_P4 RXD_N4 TXD_P4 TXD_N4 RJ0FP_SPECTRA DROP_DATA<7.0> DC1J1V1 RJ0FP DROP_DATA<7.0> DC1J1V1 DROP_DATA<7.0> DC1J1V1 TAUX<8.1> RAUX<8.1> PAGE SYS_INTERFACE_BLOCK TAUX<8.1> RAUX<8.1>
RXD_P1 RXD_N1 TXD_P1 TXD_N1 RXD_P2 RXD_N2 TXD_P2 TXD_N2 RXD_P3 RXD_N3 TXD_P3 TXD_N3 RXD_P4 RXD_N4 TXD_P4 TXD_N4
RXD_P1 RXD_N1 TXD_P1 TXD_N1
TAUX<8.1> RAUX<8.1>
RXD_P2 RXD_N2 TXD_P2 TXD_N2
RXD_P3 RXD_N3 TXD_P3 TXD_N3
ADD_DATA<7.0> AC1J1V1_AFP
ADD_DATA<7.0> AC1J1V1_AFP
TWRK<8.1> ADD_DATA<7.0> AC1J1V1_AFP RWRK<8.1>
TWRK<8.1> RWRK<8.1>
TWRK<8.1> RWRK<8.1>
TPROT<8.1> RPROT<8.1>
TPROT<8.1> RPROT<8.1>
TPROT<8.1> RPROT<8.1> SYSCLK1P SYSCLK1N SYSCLK2P
RESETB RXD_P4 RXD_N4 TXD_P4 TXD_N4 CSB_SPECTRA INTB_SPECTRA
RESETB CSB_TBS INTB_TBS LD<31.0> LA<31.2> RJ0FP_TBS TJ0FP RWSEL OCMP TCMP SYSCLK RJ0FP_IN TJ0FP_OUT RWSEL_IN XCMP_IN
SYSCLK2N
SYSCLK
RJ0FP_IN TJ0FP_OUT RWSEL_IN XCMP_IN
LD<31.0> LA<31.2> LD<31.0> LA<31.2> PAGE CPLD_BLOCK SALM<4.1> OVERHEAD<18.1> OVERHEAD<18.1> SALM<4.1> INTB_SPECTRA CSB_SPECTRA RESETB CSB_TBS INTB_TBS TCMP OCMP RWSEL TJ0FP RJ0FP_TBS RJ0FP_SPECTRA RJ0FP_IN TJ0FP_OUT RWSEL_IN XCMP_IN SYSCLK SYSCLK1P SYSCLK1N SYSCLK2P SYSCLK2N LD<31.0> LA<31.2> LHOLD LHOLDA L_ADSB L_READYB L_WRB L_USERI L_USERO L_RSTOB L_INTB L_CLK LD<31.0> LA<31.2> LHOLD LHOLDA L_ADSB L_READYB L_WRB L_USERI L_USERO L_RSTOB L_INTB L_CLK
PAGES CPCI_BLOCK LD<31.0> LA<31.2>
INTB_TBS CSB_TBS RESETB CSB_SPECTRA
INTB_SPECTRA SALM<4.1> OVERHEAD<18.1> PWROK_1_8V
LHOLD LHOLDA L_ADSB L_READYB L_WRB L_USERI L_USERO L_RSTOB L_INTB L_CLK PWROK_1_8V
PWROK_1_8V PAGE POWER_BLOCK PWROK_1_8V 5V_PCI 3_3V_PCI 12V_PCI VEE_PCI BD_SELB HEALTHYB VIO_PCI 5V_PCI 3_3V_PCI 12V_PCI VEE_PCI BD_SELB HEALTHYB VIO_PCI 5V_PCI 3_3V_PCI 12V_PCI VEE_PCI BD_SELB HEALTHYB VIO_PCI
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: DRAWING: TITLE=SPECTRA_4X155_ROOT LAST_MODIFIED=Thu 09:37:04 2000 TITLE: SPECTRA 4X155 REFERENCE DESIGN ROOT_DIAGRAM ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:1
REVISIONS
ZONE DESCRIPTION DATE APPR
3.3VA
100NH 0.01UF 0.01UF 10UF
3.3VA TXD_P1\I
100NH
3E8>
0.01UF 10UF 0.01UF
TXD_P2\I
3F8>
3.3VA
49.9 0.1UF
3.3VA
49.9 0.1UF
0.01UF
0.01UF
100NH
100NH
49.9
49.9
TXD_N1\I RXD_P1\I RXD_N1\I SD1\I
VCCT VCCR TXDP TXDN HFCT5905 RXDP RXDN TDIS VEER
VCCT VCCR TXDP TXDN HFCT5905 RXDP RXDN TDIS VEER
3E8> 3E8< 3E8< 3E8<
TXD_N2\I RXD_P2\I RXD_N2\I SD2\I
3F8> 3E8< 3E8< 3E8<
CHASS1 CHASS2 VEET
CHASS1 CHASS2 VEET
3.3VA
100NH 0.01UF 0.01UF
3.3VA
100NH 0.01UF 0.01UF
TXD_P3\I
3F8>
10UF
TXD_P4\I
3G8>
3.3VA
49.9 0.1UF
10UF
3.3VA
49.9
0.1UF
100NH 0.01UF
100NH 0.01UF
49.9
49.9
TXD_N3\I RXD_P3\I RXD_N3\I SD3\I
VCCT VCCR TXDP TXDN HFCT5905 RXDP RXDN TDIS VEER
VCCT VCCR
3F8> 3F8< 3F8< 3F8<
TXDP TXDN HFCT5905 RXDP RXDN TDIS VEER
TXD_N4\I RXD_P4\I RXD_N4\I SD4\I
3G8> 3F8< 3F8< 3F8<
CHASS1 CHASS2 VEET
CHASS1 CHASS2 VEET
DRAWING: TITLE=OPTICS_BLOCK LAST_MODIFIED=Thu 10:02:29 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN OPTICS_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:2
REVISIONS
ZONE DESCRIPTION DATE APPR
2E2< 2D2< 2D2> 2D2> 2D2> 2E6< 2D6<
TXD_P4\I TXD_N4\I RXD_P4\I RXD_N4\I SD4\I TXD_P3\I TXD_N3\I RXD_P3\I RXD_N3\I SD3\I TXD_P2\I TXD_N2\I RXD_P2\I RXD_N2\I SD2\I TXD_P1\I TXD_N1\I RXD_P1\I RXD_N1\I SD1\I
0.1UF 0.1UF
0.1UF 0.1UF
2D6> 2D6> 2D6> 2H2< 2G2< 2F2> 2F2> 2F2>
SOIC SPECTRA4-155 PM5316 TXD4P TXD4N RXD4P RXD4N TXD3P TCLK TXD3N RCLK4 RCLK3 RXD3P RCLK2 RXD3N RCLK1 TXD2P TXD2N RXD2P RXD2N TXD1P TXD1N RXD1P RXD1N REFCLK PGMTCLK PGMRCLK ATP3 ATP2 ATP1 ATP0 PECLV
0.22UF 0.22UF 0.22UF 0.22UF
TCLK RCLK4 RCLK3 RCLK2 RCLK1
POSTION
HEADER_6X2
0.1UF 0.1UF
4.7K
2H6< 2G6< 2F6> 2F6> 2F6>
0.1UF 0.1UF
PGMTCLK PGMRCLK
OVERHEAD<18.1>\I
6G2>
6G9>
13D4<
LINE SIDE
TERMINATION RESISTORS CAPACITORS SHOULD PLACED NEAR
0.1UF
C109
HEADER2 PLACE NEAR REFCLK
JUMPER EXT_REFCLK LOCALCLK
19.44MHZ 20PPM
LOCALCLK
HEADER3
EXT_REFCLK
SUPPLY 19.44 EXTERNAL REFERENCE CLOCK
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: DRAWING: TITLE=SPECTRA_4X155_BLOCK LAST_MODIFIED=Thu 10:02:32 2000 TITLE: SPECTRA 4X155 REFERENCE DESIGN SPECTRA_4X155_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:3
REVISIONS
ZONE DESCRIPTION DATE APPR
RN15 RN13
4.7K 4.7K
RN30 RN30 RN30 RN29 RN11 RN11 RN11 RN11 RN29 RN12 RN12 RN13 RN14 RN14 RN28 RN14 RN14 RN28 RN15
4.7K
4.7K
4.7K
4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
9E9>
ADD_DATA<7.0>\I
AD31 AC28 AC29 AC30 AC31 AB27 AB28 AB29
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10
SPECTRA4-155 PM5316 AC1J1V1_4/AFP4 AC1J1V1_3/AFP3 AC1J1V1_2/AFP2 AC1J1V1_1/AFP1 ADP4 ADP3 ADP2 ADP1 APL4 APL3 APL2 APL1 TPAIS TPAISCK TPAISFP
AB30 AD30 AB31
RN10 RN12 RN15 RN10 RN28 RN10 RN12 RN15
4.7K 4.7K 4.7K
AC1J1V1_AFP\I
4.7K 4.7K 4.7K
9F3>
ADP\I
4.7K 4.7K 4.7K
9G3>
APL\I ACK\I
9F3> 13D1>
TELECOM
DROP_DATA<7.0>\I
9B9<
TP15 TP16 TP17 TP18 TP19 TP10 TP21 TP20 TP22 TP11 TP23 TP24 TP12 TP13 TP25 TP26 TP14
AG31 AF29 AF30 AE27 AE28 AE29 AE30 AE31 AA29 AA30 AF28 AA28
SPECTRA4-155 PM5316 DD31 DC1J1V1_4 DD30 DC1J1V1_3 DD29 DC1J1V1_2 DD28 DC1J1V1_1 DD27 DD26 DPL4 DD25 DPL3 DD24 DPL2 DD23 DPL1 DD22 DD21 DD20 DD19 DPAIS DD18 DPAISCK DD17 DPAISFP DD16 DD15 DD14 DD13 DD12 DD11 DD10 DDP4 DDP3 DDP2 DDP1 DROP TELECOM
AD27 AD28 AH30 AG29
RN30 RN29 RN13 RN10 RN13
4.7K 4.7K 4.7K
DC1J1V1\I
4.7K 4.7K 4.7K
9C3<
DPL\I DCK\I RJ0FP_SPECTRA\I
9C3< 13D1>
4.7K
4.7K
4.7K
RN29 RN28
9C3<
4.7K 4.7K 4.7K
DDP\I
DRAWING: TITLE=SPECTRA_4X155_BLOCK LAST_MODIFIED=Thu 10:02:36 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN SPECTRA_4X155_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:4
REVISIONS
ZONE DESCRIPTION DATE APPR
LA<31.2>\I SPECTRA4-155 PM5316
14D4>
4.7K
TRSTB
INTB MBEB RDB/E RSTB WRB/RWB
4.7K
4.7K
LD<31.0>\I
10F4<> 13G1>
14H4<> 13H10<
INTB_SPECTRA\I RDB\I RESETB\I WRB\I CSB_SPECTRA\I
13E7< 13E1> 13B1> 13E1> 13E1>
4.7K
4.7K
MICRO
DRAWING: TITLE=SPECTRA_4X155_BLOCK LAST_MODIFIED=Thu 10:02:38 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN SPECTRA_4X155_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:5
REVISIONS
ZONE DESCRIPTION DATE APPR
13D4< 6G2>
3E3>
OVERHEAD<18.1>\I
OVERHEAD<18.1>\I
3E3>
6G9>
13D4<
SALM<4.1>\I
13D10<
AK12 AK10 AL12 AL10 AJ12 AJ10 AL18 AL17 AG15 AG14 AK18 AK17 AH15 AH14
RTOHCLK4 RTOHCLK3 RTOHCLK2 RTOHCLK1 RTOH4 RTOH3 RTOH2 RTOH1 RTOHFP4 RTOHFP3 RTOHFP2 RTOHFP1 RSLDCLK4 RSLDCLK3 RSLDCLK2 RSLDCLK1 RSLD4 RSLD3 RSLD2 RSLD1 RPOHCLK RPOHFP RPOH RPOHEN RALM SALM4 SALM3 SALM2 SALM1
SPECTRA4-155 PM5316
TTOHCLK4 TTOHCLK3 TTOHCLK2 TTOHCLK1 TTOH4 TTOH3 TTOH2 TTOH1 TTOHFP4 TTOHFP3 TTOHFP2 TTOHFP1 TTOHEN4 TTOHEN3 TTOHEN2 TTOHEN1 TSLDCLK4 TSLDCLK3 TSLDCLK2 TSLDCLK1 TSLD4 TSLD3 TSLD2 TSLD1 TPOHCLK TPOHFP TPOH TPOHEN TPOHRDY TAFP TACK
AG13 AH11 AK13 AG12 AH13 AJ11 AJ13 AK11 AG10 AJ18 AJ17 AJ15 AJ14 AH18 AH17 AK15 AK14
RECEIVE_OVERHEAD<32.1>
TRANSMIT_OVERHEAD<32.1>
LRDI4/RRCPCLK4 LRDI3/RRCPCLK3 LRDI2/RRCPCLK2 LRDI1/RRCPCLK1 LOS4/RRCPFP4 LOS3/RRCPFP3 LOS2/RRCPFP2 LOS1/RRCPFP1 LAIS4/RRCPDAT4 LAIS3/RRCPDAT3 LAIS2/RRCPDAT2 LAIS1/RRCPDAT1 LOF4 LOF3 LOF2 LOF1
RLAIS4/TRCPCLK4 RLAIS3/TRCPCLK3 RLAIS2/TRCPCLK2 RLAIS1/TRCPCLK1 TLRDI4/TRCPFP4 TLRDI3/TRCPFP3 TLRDI2/TRCPFP2 TLRDI1/TRCPFP1 TLAIS4/TRCPDAT4 TLAIS3/TRCPDAT3 TLAIS2/TRCPDAT2 TLAIS1/TRCPDAT1
RING_CONTROL<24.1>
4.7K 4.7K 4.7K 4.7K
4.7K 4.7K 4.7K 4.7K
4.7K 4.7K 4.7K 4.7K
4.7K 4.7K 4.7K 4.7K
PLACE NEAR
RN27 RN27 RN27 RN27
4.7K
RTCEN RTCOH
RX/TX OVERHEAD
4.7K 4.7K 4.7K 4.7K
RING_CONTROL<24.1>
MICTOR
RING_CONTROL<24.1>
RECEIVE_OVERHEAD<32.1>
A<32.1> B<32.1>
TRANSMIT_OVERHEAD<32.1>
HEADER 32X2
RING_CONTROL<24.1>
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: DRAWING: TITLE=SPECTRA_4X155_BLOCK TITLE: SPECTRA 4X155 REFERENCE DESIGN SPECTRA_4X155_BLOCK ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:6
LAST_MODIFIED=Thu 10:02:41 2000MB ENGINEER:
REVISIONS
ZONE DESCRIPTION DATE APPR
AA31 AF31 AH31 AJ30 AJ31 AK16 AK29 AK31 AL11 AL16 AL21 AL26 AL28 AL29 AL30
QAVS1 QAVS0 TAVS1_A TAVS1_B RAVS1_A RAVS1_B RAVS1_C RAVS2_A RAVS2_B RAVS2_C RAVS3_A RAVS3_B RAVS3_C RAVS4_A RAVS4_B RAVS4_C
0.1UF 0.1UF 0.1UF 0.1UF
SPECTRA4-155 PM5316
AA27 AG11 AG16 AG21 AG27 AH16 AH28 AH29 AJ16 AJ28 AJ29 AK30 AL31 AK28 47UF 47UF 0.1UF
0.1UF
0.1UF
0.1UF
C118 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C100 0.1UF
3.3VA AVD<9.0>
47UF 47UF 47UF 0.1UF
C119
C115
C102
C103
3.3VA
0.1UF
PLACE 0.1UF CAPACITOR CLOSE POWER POSSIBLE
0.1UF
C108 0.1UF
C105 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C114 0.1UF
C112
C107
C104
C116
C113
3.3VA
0.1UF 47UF 47UF
0.1UF
C106
0.1UF
PLACE DECOUPLING CAPS CLOSE FOLLOWING PINS: AA27 AG21 AG11 AH28 AH16 AK30
3.3VA
47UF 47UF 0.1UF 0.1UF 47UF
47UF
1.0K
0.1UF C101
VBIAS0 VBIAS1 QAVD0 QAVD1 TAVD1_A TAVD1_B RAVD1_A RAVD1_B RAVD1_C RAVD2_A RAVD2_B RAVD2_C RAVD3_A RAVD3_B RAVD3_C RAVD4_A RAVD4_B RAVD4_C
10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
3.3VA POWER
PLACE CAPS CLOSE EACH RAVD_A PINS
PLACE EDGE AROUND SPECTRA 4X155
3.3V LM1085 INPUT OUTPUT
ADJ/GND
3.3VA
10UF
10UF
3.3V_REGULATED DRAWING: TITLE=SPECTRA_4X155_BLOCK
LAST_MODIFIED=Thu 10:02:46 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN SPECTRA_4X155_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:7
REVISIONS
ZONE DESCRIPTION DATE APPR
UBGA TWRK<8.1>\I PM5310 RPWRK[4] TPWRK[4] RNWRK[4] TNWRK[4] TPWRK[3] TNWRK[3] TPWRK[2] TNWRK[2] TPWRK[1] TNWRK[1] RPWRK[3] RNWRK[3] RPWRK[2] RNWRK[2] RPWRK[1] RNWRK[1] RWRK<8.1>\I
12F10<
TPWRK4 TNWRK4 TPWRK3 TNWRK3 TPWRK2 TNWRK2 TPWRK1 TNWRK1 TPPROT4 TNPROT4 TPPROT3 TNPROT3 TPPROT2 TNPROT2 TPPROT1 TNPROT1 TPAUX4 TNAUX4 TPAUX3 TNAUX3 TPAUX2 TNAUX2 TPAUX1 TNAUX1 TJ0FP\I TCMP\I
AA26 AA25 AA24 AA23 AC22 AB25 AB23
AD23 AD12
RPWRK4 RNWRK4 RPWRK3 RNWRK3 RPWRK2 RNWRK2 RPWRK1 RNWRK1 RPPROT4 RNPROT4 RPPROT3 RNPROT3 RPPROT2 RNPROT2 RPPROT1 RNPROT1 RPAUX4 RNAUX4 RPAUX3 RNAUX3 RPAUX2 RNAUX2 RPAUX1 RNAUX1 RJ0FP_TBS\I OCMP\I SYSCLK\I RWSEL\I
12F10>
12G10<
TPROT<8.1>\I
TPPROT[4] RPPROT[4] TNPROT[4] RNPROT[4] TPPROT[3] RPPROT[3] TNPROT[3] RNPROT[3] TPPROT[2] RPPROT[2] TNPROT[2] RNPROT[2] TPPROT[1] RPPROT[1] TNPROT[1] RNPROT[1] TPAUX[4] TNAUX[4] TPAUX[3] TNAUX[3] TPAUX[2] TNAUX[2] TPAUX[1] TNAUX[1] TJ0FP TCMP RPAUX[4] RNAUX[4] RPAUX[3] RNAUX[3] RPAUX[2] RNAUX[2] RPAUX[1] RNAUX[1] RJ0FP OCMP SYSCLK RWSEL
RPROT<8.1>\I
12G10>
12C10<
RAUX<8.1>\I
12A10>
TAUX<8.1>\I
13D8< 13D8>
ATB1 ATB0 SERIAL TELECOMBUS
13D8> 13D8> 13D1> 13D8>
DRAWING: TITLE=TBS_BLOCK LAST_MODIFIED=Thu 10:02:48 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN TBS_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:8
REVISIONS
ZONE DESCRIPTION DATE APPR
UBGA PM5310 OD[4][7] ODP[4] OD[4][6] ODP[3] OD[4][5] ODP[2] OD[4][4] ODP[1] OD[4][3] OD[4][2] OPL[4] OD[4][1] OPL[3] OD[4][0] OPL[2] OPL[1] OD[3][7] OD[3][6] OJ0J1[4] OD[3][5] OJ0J1[3] OD[3][4] OJ0J1[2] OD[3][3] OJ0J1[1] OD[3][2] OD[3][1] OPAIS[4] OD[3][0] OPAIS[3] OPAIS[2] OD[2][7] OPAIS[1] OD[2][6] OD[2][5] OTV5[4] OD[2][4] OTV5[3] OD[2][3] OTV5[2] OD[2][2] OTV5[1] OD[2][1] OD[2][0] OTPL[4] OTPL[3] OD[1][7] OTPL[2] OD[1][6] OTPL[1] OD[1][5] OD[1][4] OTAIS[4] OD[1][3] OTAIS[3] OD[1][2] OTAIS[2] OD[1][1] OTAIS[1] OD[1][0] OCOUT[4] OCOUT[3] OCOUT[2] OCOUT[1]
OUTGOING TELECOMBUS
TP61 TP60 TP71 TP70 TP69 TP59 TP67 TP68 TP43 TP53 TP52 TP48 TP51 TP50 TP49 TP40 TP37 TP33 TP41 TP30 TP32 TP28 TP29 TP36
AF16 AD15 AE15 AF15 AD14 AE13 AD13 AF12
AF17 AC12 AE11 AD16 AD17 AF18 AE17 AC15
TP74 TP47 TP34 TP57 TP44 TP31 TP58 TP46 TP27 TP72 TP55 TP45 TP63 TP56 TP42 TP64 TP65 TP39 TP73 TP66 TP38 TP62 TP54 TP35
ADP\I
4F2<
APL\I
4F2<
AC1J1V1_AFP\I
4G2<
4E10<
ADD_DATA<7.0>\I
HEADER5
4.7K1 RN20 4.7K4 RN19 4.7K1 RN23
UBGA PM5310 PLACE RESISTORS CLOSE RN24 RN33 RN24 RN24 RN24 RN23 RN33 RN23 RN34 RN34 RN21 RN21 RN21 RN34 RN20 RN20 RN18 RN18 RN18 RN32 RN17 RN32 RN17 RN32
PINS 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
AD21 AC20 AF22 AE21 AF21 AE20 AD19 AF20 AC10
ID[4][7] ID[4][6] ID[4][5] ID[4][4] ID[4][3] ID[4][2] ID[4][1] ID[4][0] ID[3][7] ID[3][6] ID[3][5] ID[3][4] ID[3][3] ID[3][2] ID[3][1] ID[3][0]
IDP[4] IDP[3] IDP[2] IDP[1] IPL[4] IPL[3] IPL[2] IPL[1] IJOJ1[4] IJOJ1[3] IJOJ1[2] IJOJ1[1]
AE22 AD18 AF19 AF23 AD10 AF24 AD11 AE23 AE10 AC21
4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
RN25 RN22 RN18 DDP\I RN33 RN21 RN17 DPL\I RN23 RN20 RN17 DC1J1V1\I RN25 RN34 RN19 RN25 RN22 RN19 RN25 RN22 RN19 RN33 RN22 RN32 4.7K 4.7K 4.7K 4.7K
4C10>
4D2>
4D2>
4C10>
DROP_DATA<7.0>\I
IPAIS[4] IPAIS[3] IPAIS[2] ID[2][7] IPAIS[1] ID[2][6] ITV5[4] ID[2][5] ITV5[3] ID[2][4] ITV5[2] ID[2][3] ITV5[1] ID[2][2] ID[2][1] ITPL[4] ID[2][0] ITPL[3] ITPL[2] ID[1][7] ITPL[1] ID[1][6] ID[1][5] ID[1][4] ITAIS[4] ID[1][3] ITAIS[3] ID[1][2] ITAIS[2] ID[1][1] ITAIS[1] ID[1][0]
INCOMING TELECOMBUS
HEADER4
DRAWING: TITLE=TBS_BLOCK
LAST_MODIFIED=Thu 10:02:52 2000
RN16 RN16 RN16 RN16
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN TBS_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:9
REVISIONS
ZONE DESCRIPTION DATE APPR
UBGA LA<31.2>\I PM5310 A[11]/TRS D[15] D[14] A[10] A[9] D[13] A[8] D[12] A[7] D[11] A[6] D[10] A[5] D[9] A[4] D[8] A[3] D[7] A[2] D[6] A[1] D[5] A[0] D[4] D[3] D[2] D[1] D[0] RSTB INTB TRSTB LD<31.0>\I
14D4>
RN31 4.7K
4.7K RN31
RN31
13B1> 13E1> 13E1> 13E1> 13E7<
RESETB\I CSB_TBS\I WRB\I RDB\I INTB_TBS\I
RN315
4.7K
MICRO JTAG
4.7K
5E4<>
13G1>
14H4<> 13H10<
DRAWING: TITLE=TBS_BLOCK LAST_MODIFIED=Thu 10:02:55 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN TBS_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:10
REVISIONS
ZONE DESCRIPTION DATE APPR
3.3VA
UBGA PM5310 VDDO0 VSS39 VDDO1 VSS38 VDDO2 VSS37 VDDO3 VSS36 VDDO4 VSS35 VDDO5 VSS34 VDDO6 VSS33 VDDO7 VSS32 VDDO8 VSS31 VDDO9 VSS30 VDDO10 VSS29 VDDO11 VSS28 VDDO12 VSS27 VDDO13 VSS26 VDDO14 VSS25 VDDO15 VSS24 VDDO16 VSS23 VDDO17 VSS22 VDDO18 VSS21 VDDO19 VSS20 VDDO20 VSS19 VSS18 VDDI19 VSS17 VDDI18 VSS16 VDDI17 VSS15 VDDI16 VSS14 VDDI15 VSS13 VDDI14 VSS12 VDDI13 VSS11 VDDI12 VSS10 VDDI11 VSS9 VDDI10 VSS8 VDDI9 VSS7 VDDI8 VSS6 VDDI7 VSS5 VDDI6 VSS4 VDDI5 VSS3 VDDI4 VSS2 VDDI3 VSS1 VSS0 VDDI2 VDDI1 VDDI0 CSU_AVDH AVDH6 AVDH5 AVDH4 AVDH3 AVDH2 AVDH1 AVDH0 AVDL5 AVDL4 AVDL3 AVDL2 AVDL1 AVDL0 POWER RESK
0.1UF
C134 0.1UF
C166 0.1UF
C123 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C143 0.1UF
C160 0.1UF
0.1UF
C163 0.1UF
C162 0.1UF
C145
C154
C165
C158
C177
C149
C168
AE25 AD24 AC23 AC19 AC14 AD20 AD22 AE12 AE18
0.1UF
C127 0.1UF
C139 0.1UF
C172 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C151 0.1UF
0.1UF
0.1UF
C159 0.1UF
3.3VA
C126
AB26 AC25 AC26 AD25 AD26 AE24 AE26 AF13 AF14 AF25 AF26 3.16K
0.1UF
C164 0.1UF
C140 0.1UF
C138 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C157 0.1UF
C161 0.1UF
0.1UF
C122 0.1UF
C170 0.1UF
C130
C135
C169
C131
C137
C124
C125
LM1085 INPUT OUTPUT
ADJ/GND
10UF
44.2 10UF 10UF
C155
C128
C136
C141
C173
C167
C129
3.3VA
0.1UF C148 47UF
AB24 AC24
0.1UF
C147 0.1UF
C150 0.1UF
C152 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C133 0.1UF
0.1UF
C153
C156
C142
C174
C175
C176
C171
0.1UF
C144
PLACE DECOUPLING CAPS CLOSE EACH POWER
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
DRAWING: TITLE=TBS_BLOCK PLACE EDGE AROUND LAST_MODIFIED=Thu 10:02:58 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN TBS_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:11
REVISIONS
ZONE DESCRIPTION DATE APPR
WORKING PROTECT LVDS LINKS
8F8> 8F3<
FEMALE_RA
AB10
TPROT<8.1>\I RPROT<8.1>\I
FEMALE_RA
AB10 AMP_HS3_6X10
FEMALE_RA
FEMALE_RA
AMP_HS3_6X10
RPPROT4 RPPROT3 RPPROT2 RPPROT1 RPWRK4 RPWRK3 RPWRK2 RPWRK1
RNPROT4 RNPROT3 RNPROT2 RNPROT1 RNWRK4 RNWRK3 RNWRK2 RNWRK1
AMP_HS3_6X10
TPPROT4 TPPROT3 TPPROT2 TPPROT1 TPWRK4 TPWRK3 TPWRK2 TPWRK1
TNPROT4 TNPROT3 TNPROT2 TNPROT1 TNWRK4 TNWRK3 TNWRK2 TNWRK1
AMP_HS3_6X10
FEMALE_RA
CD10
CD10 AMP_HS3_6X10
FEMALE_RA
8F3< 8F8>
RWRK<8.1>\I
TWRK<8.1>\I
13D8> 13F10<
TJ0FP_OUT\I SYSCLK1P\I SYSCLK1N\I RJ0FP_IN\I RWSEL_IN\I SYSCLK2P\I SYSCLK2N\I XCMP_IN\I
EF10
EF10 AMP_HS3_6X10
13F10< 13D8< 13D8< 13F10< 13F10< 13D8<
TPROT<8.1>, TWRK<8.1>, RWRK<8.1>, RPROT<8.1>, TAUX<8.1> RAUX<8.1> CONSIST DIFFERENTIAL LVDS PAIRS. EACH PAIR SHOULD ROUTED TOGETHER SAME LAYER HAVE SAME LENGTH. LVDS TRACES SHOULD OHM.
FEMALE_RA AUXILLARY LVDS LINKS POPULATE CONNECTOR AUXILLARY LVDS LINKS REQUIRED
8E8>
AB10
TAUX<8.1>\I
AB10 AMP_HS3_6X10
FEMALE_RA
FEMALE_RA
FEMALE_RA
FEMALE_RA
CD10
AMP_HS3_6X10
AMP_HS3_6X10
TNAUX4 TNAUX3 TNAUX2 TNAUX1 RNAUX4 RNAUX3 RNAUX2 RNAUX1
TPAUX4 TPAUX3 TPAUX2 TPAUX1 RPAUX4 RPAUX3 RPAUX2 RPAUX1
AMP_HS3_6X10
CD10 AMP_HS3_6X10
FEMALE_RA
EF10
DRAWING: TITLE=SYS_INTERFACE_BLOCK LAST_MODIFIED=Thu 10:02:22 2000
8E3<
RAUX<8.1>\I
EF10 AMP_HS3_6X10
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN SYSTEM_INTERFACE_BLOCK ENGINEER: ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:12
REVISIONS
ZONE
DESCRIPTION
DATE
APPR
LED_1 LED_2 LED_3
14H4<> 13G1> 10F4<> 5E4<> 14D4>
OEA*
SSF-LXH5147
0.1UF
LD<31.0>\I LA<31.2>\I
LED_4
PLACE NEAR DRIVER
MC74AHC244ADW
LED_5 LED_6 LED_7
OEB*
SSF-LXH5147
LED_8
DEBUGGING LD<31.0>\I LA<31.2>\I
5E4<> 10F4<> 14H4<> 13H10< 14D4>
EXTERNAL SYSCLK
LVPECL
12E10> 12E10>
SYSCLK1P\I SYSCLK1N\I SYSCLK2P\I SYSCLK2N\I
SYSCLK1 SYSCLK2
MC100LVELT23
12E10> 12E10>
0.1UF
0.1UF
C110 0.1UF
0.1UF
C120 0.1UF
C121 0.1UF
C117 0.1UF
C111 10UF
10UF
10UF
10UF
0.1UF
0.1UF C146
VCCINT VCCINT VCCINT
VCCIO VCCIO VCCIO VCCIO
LOCAL SYSCLK
14F2> 14F2> 14E2> 5E4> 10D9>
77.76MHZ 100PPM
0.1UF
0.1UF
14F2> 14E2<
L_WRB\I L_ADSB\I L_USERO\I INTB_SPECTRA\I INTB_TBS\I SYSCLK1 SYSCLK2 LOCAL_OSC L_WRB\I L_CLK\I
VCCA
6G9>
SALM<4>\I SALM<3>\I SALM<2>\I SALM<1>\I
12E10> 12E10< 12E10> 12D10> 8D4< 8D7> 8D4< 8D7< 8D4<
RJ0FP_IN\I TJ0FP_OUT\I RWSEL_IN\I XCMP_IN\I RJ0FP_TBS\I TJ0FP\I RWSEL\I TCMP\I OCMP\I
14F2> 14F2< 14F2< 16D8>
LHOLD\I LHOLDA\I L_READYB\I PWROK_1_8V\I
VCCB
SALM<4.1>\I
IO1/GCK1 IO1/GCK2 IO1/GCK3 XC9572XL TQ100 10NS IO2/GTS1 IO2/GTS2 IO2/GSR
RDB\I WRB\I CSB_SPECTRA\I CSB_TBS\I L_USERI\I L_INTB\I LED_1 LED_2 LED_3 LED_4 LED_5 LED_6 LED_7 LED_8 RJOFP_SPECTRA\I OVERHEAD<18.1>\I
3E3> 6G2> 6G9>
5E4< 10E9< 5E4< 10E9< 5E4< 10E9< 14E2< 14E2<
RN26 RN26 RN26
SYSCLK\I ACK\I DCK\I
8D4< 4F2< 4D2<
PI49FCT3805
GNDA GNDB GNDQ
14E2>
L_RSTOB\I
HEADER
0.1UF
PBNO
74HC08
MAX811T
PLACE 49FCT3805 CLOSE CPLD OUTPUT
RESETB\I
5E4< 10E9<
RESET
74HC08
0.1UF
74HC08
DRAWING: TITLE=CPLD_BLOCK LAST_MODIFIED=Thu 10:02:25 2000
PLACE NEAR 74HC08
74HC08
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN CPLD_BLOCK ENGINEER:
ISSUE DATE: 00/06/09 REVISION NUMBER: PAGE:13
REVISIONS
CPCI BRIDGE
4.7K R7_1
ZONE
DESCRIPTION
DATE
APPR
LD<31.0>\I
5E4<> 13G1>
10F4<> 13H10<
4.7K 4.7K 4.7K 4.7K
4.7K 4.7K 4.7K 4.7K
4.7K 4.7K 4.7K 4.7K
4.7K 4.7K 4.7K 4.7K
15H8<>
AD<31.0>
LD<31> LD<30> LD<29> LD<28> LD<27> LD<26> LD<25> LD<24> LD<23> LD<22> LD<21> LD<20> LD<19> LD<18> LD<17> LD<16> LD<15> LD<14> LD<13> LD<12> LD<11> LD<10> LD<9> LD<8> LD<7> LD<6> LD<5> LD<4> LD<3> LD<2> LD<1> LD<0>
15H8<>
C/BE<3.0>
AD<31> AD<30> AD<29> AD<28> AD<27> AD<26> AD<25> AD<24> AD<23> AD<22> AD<21> AD<20> AD<19> AD<18> AD<17> AD<16> AD<15> AD<14> AD<13> AD<12> AD<11> AD<10> AD<9> AD<8> AD<7> AD<6> AD<5> AD<4> AD<3> AD<2> AD<1> AD<0> C/BE<3> C/BE<2> C/BE<1> C/BE<0> P_ENUMB P_PAR P_DEVSELB P_STOPB P_SERRB P_PERRB P_LOCKB P_FRAMEB P_TRDYB P_IRDYB P_IDSEL P_REQB P_RSTB P_GNTB P_CLK P_INTAB
39.2
RN8_1 RN8_1 RN8_1 RN9_1 RN9_1 RN9_1 RN9_1 RN10_1 RN10_1 RN11_1 RN11_1 RN11_1 RN11_1 RN12_1 RN12_1 RN17_1 RN17_1 RN17_1 RN18_1 RN18_1 RN18_1 RN18_1 RN19_1 RN19_1 RN19_1 RN20_1 RN20_1 RN20_1 RN20_1 RN21_1 RN21_1 RN21_1 RN10_1 RN12_1 RN17_1 RN19_1 RN21_1 RN14_1 RN13_1 RN13_1 RN14_1 RN14_1 RN14_1 RN12_1 RN13_1 RN13_1 RN10_1
R16_1
ADX31 ADX30 ADX29 ADX28 ADX27 ADX26 ADX25 ADX24 ADX23 ADX22 ADX21 ADX20 ADX19 ADX18 ADX17 ADX16 ADX15 ADX14 ADX13 ADX12 ADX11 ADX10 ADX9 ADX8 ADX7 ADX6 ADX5 ADX4 ADX3 ADX2 ADX1 ADX0 CBEX3 CBEX2 CBEX1 CBEX0 ENUMX PARX DEVSELX STOPX SERRX PERRX LOCKX FRAMEX TRDYX IRDYX IDSELX REQX
AD<31> AD<30> AD<29> AD<28> AD<27> AD<26> AD<25> AD<24> AD<23> AD<22> AD<21> AD<20> AD<19> AD<18> AD<17> AD<16> AD<15> AD<14> AD<13> AD<12> AD<11> AD<10> AD<9> AD<8> AD<7> AD<6> AD<5> AD<4> AD<3> AD<2> AD<1> AD<0>
VDD15 VDD14 VDD13 VDD12 VDD11 VDD10 VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 DP<3> DP<2> DP<1> DP<0>
4.7K 4.7K 4.7K 4.7K RN4_1 RN5_1 RN5_1 RN4_1
RES_ARRAY_4
RN2_1 RN2_1 RN2_1 RN1_1
RN1_1 RN5_1 RN3_1 RN3_1
RN1_1 RN3_1 RN2_1 RN1_1
RN4_1 RN3_1 RN5_1 RN4_1
PART#PCI9054-AB50PI
U2_1
BTERM* BIGEND* LHOLDA LHOLD BLAST* LW/R* BREQO READY* LSERR* ADS* LBE2* LBE3* DMPAF/EOT* WAIT* BREQI CCS* LCLK LEDON/LEDIN LINT* LRESETO* USERI/DACK0/LLOCKI* USERO/DREQ0/LLOCKO* MODE<1> MODE<0> TEST VSS12 VSS11 VSS10 VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
LHOLDA\I LHOLD\I L_WRB\I L_READYB\I L_ADSB\I
13E7<
13D7> 13D7<
13D7> 13E7<
PCI9054 C-MODE
C/BE<3>* C/BE<2>* C/BE<1>* C/BE<0>* PME* ENUM* DEVSEL* STOP* SERR* PERR* LOCK* FRAME* TRDY* IRDY* IDSEL REQ* RST* GNT* PCLK INTA* EEDI/O EESK EECS
15C5< 15C5<> 15F5<> 15C5<> 15F5< 15A5<>
L_CLK\I L_INTB\I L_RSTOB\I L_USERI\I L_USERO\I
13E7> 13E1> 13C10< 13E1> 13E7<
15B5> 15C5> 15G5<
RN7_1
INTAX RSTX
LBE0* LBE1* LA<2> LA<3> LA<4> LA<5> LA<6> LA<7> LA<8> LA<9> LA<10> LA<11> LA<12> LA<13> LA<14> LA<15> LA<16> LA<17> LA<18> LA<19> LA<20> LA<21> LA<22> LA<23> LA<24> LA<25> LA<26> LA<27> LA<28> LA<29> LA<30> LA<31>
RN15_1 RN15_1 RN15_1 RN15_1
RN6_1 RN6_1 RN6_1 RN6_1
16D8>
15B5<> 15E5<> 15B5<> 15D5<> 15E5> 15G5< 15D5>
RN8_1
LBE0 LBE1
LBE0 LBE1
PWROK_1_8V\I
0.1UF C16_1 0.1UF C17_1 0.1UF C15_1 0.1UF 0.1UF C14_1 0.1UF C19_1 0.1UF C22_1 0.1UF C13_1 C23_1 10UF C24_1 10UF
LA<31.2>\I
5E9< 10F8<
13G1<
13G10<
C20_1 0.1UF
C21_1
R14_1
10UF
4.7K
U1_1
NM93CS66LEN
PLACE AROUND
2.2K R13_1
PLACE NEAR
4.7K
R15_1
C25_1
PRECHARGE
D1_1
DL4148
U3_1
LT1117CST
1V_PRECHG
R12_1
VOUT
3_3V_LONG
15H7>
VIO_LONG
15H7>
0.1UF
R11_1
C4_1
R10_1
100K
R8_1
RN22_1 RN22_1 RN22_1 RN23_1 RN23_1 RN23_1 RN23_1 RN24_1 RN24_1 RN24_1 RN25_1 RN25_1 RN25_1 RN25_1 RN26_1 RN26_1 RN26_1 RN30_1 RN30_1 RN31_1 RN31_1 RN31_1 RN31_1 RN32_1 RN32_1 RN33_1 RN33_1 RN33_1 RN33_1 RN34_1 RN34_1 RN34_1
RN24_1 RN26_1 RN30_1 RN32_1 RN30_1 RN29_1 RN29_1 RN29_1 RN29_1 RN32_1 RN28_1 RN28_1 RN28_1 RN28_1
RN34_1 RN22_1 RN27_1 RN27_1
CBEX0 CBEX1 CBEX2 CBEX3 FRAMEX IRDYX TRDYX DEVSELX STOPX IDSELX LOCKX PARX PERRX SERRX
DRAWING: TITLE=CPCI_BLOCK ABBREV=CPCI_BLOCK LAST_MODIFIED=Thu 10:02:12 2000 P_GNTB
ADX0 ADX1 ADX2 ADX3 ADX4 ADX5 ADX6 ADX7 ADX8 ADX9 ADX10 ADX11 ADX12 ADX13 ADX14 ADX15 ADX16 ADX17 ADX18 ADX19 ADX20 ADX21 ADX22 ADX23 ADX24 ADX25 ADX26 ADX27 ADX28 ADX29 ADX30 ADX31
RSTX ENUMX INTAX REQX
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991413 DOCUMENT ISSUE NUMBER: TITLE: CPCI_BLOCK CPCI_BLOCK ENGINEER: ISSUE DATE: YY/MM/DD REVISION NUMBER: PAGE:N
NOTES:
STUBS WITHIN 0.6" SIGNAL TRACES 1.5" P_CLK TRACE MUST 2.5" +/CPCI TRACES OHM. STUB RESISTOR REQB
EXCEPT P_CLK 0.1" PLACED NEAR BRIDGE
REVISIONS
AD<31.0>
14H10<>
ZONE
DESCRIPTION
DATE
APPR
C/BE<3.0>
14F10<>
16F8<
16G8<
14C5<
14C3<
16F8<
4.7K 4.7K 4.7K 4.7K
3_3V_PCI\I
5V_PCI\I
3_3V_LONG
VIO_LONG
RN16_1 RN16_1 RN16_1 RN16_1
CPCI
J1_1 ZPACK5X22A CPCI
AD<30> AD<26> C/BE<3> AD<21> AD<18> AD<12> AD<7> AD<1> AD<29> AD<17> AD<15> AD<9> AD<4> AD<28> AD<23> AD<16> AD<14> AD<8> AD<3> AD<25> AD<20> AD<11> AD<6> AD<0> AD<31> AD<27> AD<24> AD<22> AD<19> C/BE<2> C/BE<1> AD<13> AD<10> C/BE<0> AD<5> AD<2>
VIO_PCI\I
PLACE DECOUPLING CAPS CLOSE CONNECTOR 5V_PCI\I
0.1UF C10_1 10UF
3_3V_PCI\I
0.1UF C5_1 0.1UF C12_1 10UF
VIO_PCI\I
0.1UF C9_1 10UF C11_1 10UF C8_1
C6_1
C7_1
P_INTAB P_REQB
14E9> 14E9>
0.1UF 0.1UF C18_1 10UF
12V_PCI\I P_DEVSELB P_SERRB
14E9<> 14E9>
VEE_PCI\I
C1_1 10UF
C3_1
C2_1
VEE_PCI\I HEALTHYB\I
16E8< 16E8>
P_IDSEL
14E9< 14E9<>
P_FRAMEB
P_RSTB
P1_1
14E9<
STRIP3
R2_1
HOLE_SIZE=
MOUNTING HOLE
P_IRDYB
STRIP2
14E9<>
STRIP
R3_1
TP2_1 CHASSIS TP1_1 CHASSIS
STRIP1
CPCI STRIP
R1_1
P_ENUMB 12V_PCI\I
14E9> 16E8<
P_CLK
14E9<
BD_SELB\I P_STOPB P_PAR
16E8< 14E9<> 14E9<>
P_GNTB
14E9<
P_TRDYB P_LOCKB P_PERRB
14E9<> 14E9<> 14E9<>
DRAWING: TITLE=CPCI_BLOCK ABBREV=CPCI_BLOCK LAST_MODIFIED=Thu 10:02:16 2000
PMC-Sierra, Inc.
DOCUMENT NUMBER: PMC-991245 DOCUMENT ISSUE NUMBER: TITLE: SPECTRA 4X155 REFERENCE DESIGN CPCI_BLOCK ENGINEER: ISSUE DATE: YY/MM/DD REVISION NUMBER: PAGE:15
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
BILL MATERIAL
Table
Item Ref.
Bill Material
Description Manufactures Part
QUAD GATE SOIC14 NARROW BODY Z-PACK BACKPLANE CONNECTOR, RIGHT ANGLE RECEPTACLE C67-C78, C7_2 CERAMIC 0603 0.01UF C8_2 CERAMIC 1206 0.047UF C10_1, CERAMIC 0603 C13-C20, C35, 0.1UF C36, C39, C44, C51, C63-C66, C80-C84, C88C119, C11_1, C120-C129, C12_1, C130, C131, C133-C139, C13_1, C140C149, C14_1, C150-C159, C15_1, C160C169, C16_1, C170-C177, C17_1, C18_1, C19_1, C1_1, C21_1, C22_1, C23_1, C4_1, C5_2, C6_2, C9_1 C79, C85-C87 SERAMIC 0805 0.22UF C20_1, TANCAPC 10UF C24_1, C25_1, C29, C2_1, C30C34, C37, C38, C3_1, C40-C43,
MM74HC08M 120673-1 ECU-V1H103KBV ECU-V1H473KBW ECJ-1VB1C104K
ECJ-1VB1C224K ECS-H1CC106R
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
Item
Ref.
Description
Manufactures Part
C45-C49, C52C55, C57-C59, C5_1, C60-C62, C6_1, C7_1, C8_1 C2_2, C3_2 TANCAPC 2.2UF ECS-H1VC225R C1_2, C4_2, C9_2 ELECTRO ECE-V1AA221P 220UF C10-C12, C21CAP TANCAPD 47UF ECS-H1AD476R C28, SIGNAL CONNECTOR, 2-767004-2 MATCHED IMPEDANCE, 0.025, P1_1 COMPACT STRIP, PART CREATE LAYOUT D1_1 DIODE RECT 150MA DL4148MS MINIMELF CONN HEADER STRAIGHT PZC36SAAN 36POS MALE SINGLE CONN HEADER STRAIGHT PZC36SAAN 36POS MALE SINGLE CONN HEADER STRAIGHT PZC36SAAN 36POS MALE SINGLE CONN HEADER STRAIGHT PZC36SAAN 36POS MALE SINGLE CONN HEADER STRAIGHT PZC36SAAN 36POS MALE SINGLE SPACING HEADER (150 SAMTEC HTMSPOS PART) 150-25-G-S-1 HEADER MALE 87267-0850 CONNECTOR HEADER PZC36DAAN U1-U4 MT-RJ DUPLEX SINGLE MODE HFCT-5905E TRANSCEIVER HFCT-5905E L1-L8 1.81 DIGI-KEY -PCD1172CT-ND Q1_2, Q2_2 MOSFET POWER IRF7413 REGULATOR VARIABLE LM1085 MICROPOWER DROPOUT 3.3V REGULATOR VARIABLE LM1085IS-ADJ MICROPOWER DROPOUT ADJUSTABLE U3_1 REGULATOR ADJUSTABLE LT1117CST SOT223 800MA OUTPUT
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
Item
Ref.
Description
Manufactures Part
U2_2 U3_2
M1_1 U1_1 U2_1 R14_2, R15_2, R5_2 R67, R2_2 R6_2, R8_2 R10, R10_1, R13, R29, R31, R32, R64, R9_2 R16_2, R8_1 R1_1, R2_1, R3_1 R12_1 R10_2, R50-R61 R1_2 R3_2, R4_2 R13_1
CPCI SWAP CONTROLLER VOLTAGE MONITOR WITH MANUAL RESET INPUT 3.08V SOT143 VOLTAGE MONITOR WITH MANUAL RESET INPUT 2.63V SOT143 HCMOS/TTL HALF SIZE 19.44MHZ 20PPM HCMOS/TTL HALF SIZE 77.76MHZ 100PPM DUAL DIFFERENTIAL LVPECL TRANSLATOR SOIC8 OCTAL 3-STATE NONINVERTING BUFFER/LINE DRIVER/LINE RECEIVER SO20WB MOUNTING HOLE .150" 4096 SERIAL EEPROM DATA PROTECT READ DIP8 VERT MOUNT SPST PUSH BUTTOM PCI-TO-LOCAL 3.3V 2X1:5 CMOS CLOCK DRIVER QSOP20 2512 0.01 0603 1/16W 0603 1/16W 0603 1/16W 0603 1/16W 1.0K 1.2K
LTC1643LCGN MAX811TEUS-T MAX812REUS-T MB3020H4819.44MH MB3100H77.76MHZ MC100LVELT23D MC74HC244ADW
MOUNTING HOLE NM93CS66LEN DIGIKEY -P8009S-ND PCI9054-AB50PI PI49FCT3805CQ WSL2512-R01-1 ERJ-3GSYJ102V ERJ-3GSYJ122V ERJ-3GSYJ100V ERJ-3EKF1000V
0603 1/16W 100K 1206 1/8W 0603 1/16W 0603 1/16W 0603 1/16W 0603 1/16W 2.0K 0603 1/16W 2.2K
ERJ-3GSYJ104V ERJ-8GEYJ106V ERJ-3EKF1500V ERJ-3GSYJ151V ERJ-3EKF1820V ERJ-3GSYJ202V ERJ-3GSYJ222V
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
Item
Ref.
Description
Manufactures Part
R35, R37, R39, R11_1 R34, R36, R38, R16_1 R14_1, R20-R25, R62, R65, R66, R68, R7_1, R7_2 R42-R49 R26-R28, R12_2, R13_2 R11_2 RN10_1, RN11_1, RN12_1, RN13_1, RN14_1, RN17_1, RN18_1, RN19_1, RN20_1, RN21_1, RN7_1, RN8_1, RN9_1 RN22_1, RN23_1, RN24_1, RN25_1, RN26_1, RN27_1, RN28_1, RN29_1, RN30_1, RN31_1, RN32_1, RN33_1, RN34_1 RN15_1, RN6_1 RN3-RN16, RN16_1, RN17RN19, RN1_1, RN20-RN25, RN27-RN29, RN2_1, RN30RN34, RN3_1, RN4_1, RN5_1 RN26 U1_2
0805 1/10W 0603 1/16W 0805 1/10W 0603 1/16W 3.16K 0603 1/16W 0603 1/16W 39.2 0603 1/16W 4.7K 0603 1/16W 0603 1/16W 0603 1/16W 0603 1/16W 49.9 63.4
ERJ-6RQF2R7V ERJ-3GSYJ221V ERJ-6GEYJ240V ERJ-3EKF3161V ERJ-3GSYJ331V ERJ-3EKF39R2V ERJ-3GSYJ472V ERJ-3EKF49R9V ERJ-3GSYJ560V ERJ-3GSYJ561V ERJ-3EKF63R4V PANASONIC -EXB-V8V100JV
PANASONIC -EXB-V8V103JV
PANASONIC -EXB-V8V102JV PANASONIC -EXB-V8V472JV
PANASONIC -EXB-V8V560JV REGULATOR 3.3V 1.8V SIE501.8R WATTS
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
Item
Ref.
Description
Manufactures Part
D2_2 TP1_1, TP2_1 D1_2 J1_1
VERTICAL GOLD MONOLITHIC FOUR CHANNEL SONET/SDH PAYLOAD EXTRACTOR/ALIGNER QUAD GREEN HORIZONTAL QUAD HORIZONTAL QUAD YELLOW HORIZONTAL TELECOMBUS SERIALIZER CONNECTOR HEADER STRAIGHT SINGLE CPLD 3.3V 10NS
ARF1244-ND PM5316 SSF-LXH5147LGD SSF-LXH5147LID SSF-LXH5147LYD PM5310
XC9572XL10TQ100I DIGI-KEY ZM4742ACT-ND CONNECTOR ZPACK CPCI 352068-1 POS. TYPE WITH SHIELD SINGLE 2-INPUT POSITIVE SN74AHC1G08DC GATE
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
NOTES
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PRELIMINARY REFERENCE DESIGN PMC-1991245 ISSUE
PM5316/PM5310
SPECTRA-4X155 WITH REFERENCE DESIGN
CONTACTING PMC-SIERRA, INC. PMC-Sierra, Inc. 105-8555 Baxter Place Burnaby, Canada Tel: Fax: (604) 415-6000 (604) 415-6200 document@pmc-sierra.com info@pmc-sierra.com apps@pmc-sierra.com (604) 415-4533 http://www.pmc-sierra.com
Document Information: Corporate Information: Application Information: Site:
None information contained this document constitutes express implied warranty PMC-Sierra, Inc. sufficiency, fitness suitability particular purpose such information fitness, suitability particular purpose, merchantability, performance, compatibility with other parts systems, products PMC-Sierra, Inc., portion thereof, referred this document. PMC-Sierra, Inc. expressly disclaims representations warranties kind regarding contents information, including, limited express implied warranties accuracy, completeness, merchantability, fitness particular use, non-infringement. event will PMC-Sierra, Inc. liable direct, indirect, special, incidental consequential damages, including, limited lost profits, lost business lost data resulting from reliance upon information, whether PMC-Sierra, Inc. been advised possibility such damage. 2000 PMC-Sierra, Inc. PMC-1991245 (P1) Issue date: March 2000
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL

PM5316/PM5310 SPECTRA-4X155 WITH REFERENCE DESIGN PM5316/PM5

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