SN54 74LS107A Dual Flip-Flop with individual Direct Clear Clock Pulse

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SN54 74LS107A Dual Flip-Flop with individual Direct Clear Clock Pulse

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SN54/74LS107A DUAL NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN54 74LS107A Dual Flip-Flop with individual Direct Clear Clock Pulse inputs. Output changes initiated HIGH-to-LOW transition clock. signal input overrides other inputs makes output LOW. SN54 74LS107A same SN54 74LS73A corner power pins.
DUAL NEGATIVE EDGE-TRIGGERED FLIP-FLOP
POWER SCHOTTKY
CONNECTION DIAGRAM (TOP VIEW)
NOTE: Flatpak version same pinouts (Connection Diagram) Dual In-Line Package.
SUFFIX CERAMIC CASE 632-08
SUFFIX PLASTIC CASE 646-06
LOGIC SYMBOL
SUFFIX SOIC CASE 751A-02
ORDERING INFORMATION
SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC
GUARANTEED OPERATING RANGES
Symbol Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Parameter 4.75 5.25 Unit
FAST DATA
SN54/74LS107A
CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol Parameter Input HIGH Voltage Input Voltage Input Clamp Diode Voltage Output HIGH Voltage Output Voltage Clear Clock Input HIGH Current Clear Clock Input Current Short Circuit Current (Note Power Supply Current Clear Clock -100 MAX, 0.35 0.25 0.65 Unit Test Conditions Guaranteed Input HIGH Voltage Inputs Guaranteed Input Voltage Inputs MIN, MIN, MAX, Truth Table MIN, Truth Table
MAX,
MAX,
Note more than output should shorted time, more than second.
CHARACTERISTICS 25°C,
Limits Symbol fMAX tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay, Clock Output Unit Test Conditions
SETUP REQUIREMENTS 25°C,
Limits Symbol Parameter Clock Pulse Width Clear Pulse Width Setup Time Hold Time Unit Test Conditions
FAST DATA

SN54 74LS107A Dual Flip-Flop with individual Direct Clear Clock Pulse

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