Semiconductor MSM9200-xx This version: Nov. 1997 MSM9200-xx Previ

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Semiconductor MSM9200-xx This version: Nov. 1997 MSM9200-xx Previ

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E2C0035-27-Y4 Semiconductor
Semiconductor MSM9200-xx
This version: Nov. 1997 MSM9200-xx Previous version: Jul. 1996
Character 16-Digit Display Controller/Driver with Character
MSM9200-xx matrix vacuum fluorescent display tube controller driver which displays characters, numerics symbols. matrix vacuum fluorescent display tube drive signals generated serial data sent from microcontroller. display system easily realized internal character display. MSM9200-xx power consumption because munufactured CMOS process technology. available general codes. Custom codes provided necessary.
FEATURES
Logic power supply (VDD) V±10%/5.0 V±10% Fluorescent display tube drive power supply (VDISP) V±10%/5.0 V±10% Fluorescent display tube drive power supply (VFL) driver output current (VFD driver output directly connected fluorescent display tube. pull-down resistor required.) Segment driver (SEG1 SEG35) (VFL=-60V) Segment driver (AD1 AD8) (VFL=-60V) Grid driver (COM1 COM16) (VFL=-60V) General output port output current Output driver (P1-4) (VDD=3.3V±10%) (VDD=5.0V±10%) Content display CGROM dots, types (character data) CGRAM dots, types (character data) ADRAM (display digit) bits (symbol data) DCRAM (stored digit) bits (register character data display) General output port bits (static mode) Display control function Display digit digits Display duty (contrast adjustment) stages Display blink position specification Blinking time input externally Display shift (left right) only output lights ON/OFF interfaces with microcontroller BLINK interfaces when RESET added) byte instruction execution (excluding data write display blink position specification) Oscillation circuit included (external Package: 80-pin plastic (QFP80-P-1414-0.65-K) (Product name: MSM9200-xxGS-K) indicated code number. 1/34
Semiconductor
MSM9200-xx
BLOCK DIAGRAM
VDISP
BLINK DCRAM CGROM Segment Driver RESET 8-bit Shift Register CGRAM ADRAM SEG35 Driver SEG1
DCRAM Address Counter
Address Selector Command Decoder Control Circuit Write Address Counter Read Address Counter
Port Driver Digit Control Duty Control COM1 Grid Driver COM16
Timing Generator OSC0 Oscillator OSC1
Timing Generator
2/34
Semiconductor
MSM9200-xx
INPUT OUTPUT CONFIGURATION
Schematic Diagrams Logic Portion Input Output Circuits Input
INPUT
Output
OUTPUT
Schematic Diagram Driver Output Circuit
VDISP VDISP
OUTPUT
3/34
Semiconductor
CONFIGURATION (TOP VIEW)
VDISP1 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11
connection
80-Pin Plastic
MSM9200-xx
VFL2 VDISP3 OSC0 OSC1 RESET BLINK VDISP2 VFL1
COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 SEG35 SEG34 SEG33 SEG32
SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31
4/34
Semiconductor
MSM9200-xx
DESCRIPTION
Symbol SEG1-35 Type Connects tube grid electrode COM1-16 tube grid electrode AD1-8 tube grid electrode drive P1-4 VDISP1-3 VFL1-2 Microcontroller Microcontroller Microcontroller control terminals Power supply Description Directly connected fluorescent display tube pull-down resistor necessary. IOH>-5 Directly connected fluorescent display tube pull-down resistor necessary. IOH>-30 Directly connected fluorescent display tube pull-down resistor necessary. IOH>-10 General port output. Output these pins static mode, control driving performed through these pins. VDD-GND power supplies internal logic. VDISP-VFL power supplies driving fluorescent tubes. same power supply VDISP. Apply after VDISP applied. Serial data input (positive logic). Input from LSB. Shift clock input. Serial data shifted rising edge Chip select input. disables serial data transfer. Display blink frequency input (square wave). Only position specified display blink position command BLINK Microcontroller validated. time "High" (light "Low" (light OFF) level signal frequency input BLINK blink time. BLINK when display blink control used.
Fluorescent Fluorescent display tube anode electrode drive output.
Fluorescent Fluorescent display tube grid electrode drive output.
Fluorescent Fluorescent display tube grid electrode drive output.
5/34
Semiconductor
MSM9200-xx
Symbol
Type Connects
Description Reset input (pull-up resistor included). "Low" initializes functions. Initial status follows. Address each Data each address "00"H Content undefined digits 0/16 Blinking disabled outputs mode "Low" level (Circuit when connected externally) Application Circuit.
Micro69 RESET
Display digit Display blink lights outputs RESET
controller Contrast adjusment
External oscillation. OSC0 OSC1 Connect externally. time constant depends voltage used. target oscillation frequency MHz. OSC0 OSC1 oscillation circuit) Application Circuit.
6/34
Semiconductor
MSM9200-xx
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Supply Voltage Input Voltage Power Dissipation Storage Temperature Symbol VDISP TSTG Output Current Condition (*1) (*1) COM1-COM16 AD1-AD8 SEG1-SEG35 P1-P4 Rating -0.3 -0.3 VDISP+0.3 VDD+0.3 -4.0 Unit
same power supply VDISP.
RECOMMENDED OPERATING CONDITIONS-1
When power supply voltage (typ).
Parameter Supply Voltage Supply Voltage High Level Input Voltage Level Input Voltage Frequency Oscillation Frequency Frame Frequency RESET Input Time Operating Temperature Symbol VDISP fOSC tRSON Condition input pins excluding OSC0 R1=3.3kW, C1=47pF
DIGIT=1-16, R1=3.3kW, C1=47pF
Min.
Typ.
Max. 0.3VDD
Unit
input pins excluding OSC0 0.7VDD
R2=1.0kW, C2=0.1PF
7/34
Semiconductor
MSM9200-xx
RECOMMENDED OPERATING CONDITIONS-2
When power supply voltage 3.3V (typ).
Parameter Supply Voltage Supply Voltage High Level Input Voltage Level Input Voltage Frequency Oscillation Frequency Frame Frequency RESET Input Time Operating Temperature Symbol VDISP fOSC tRSON Condition input pins excluding OSC0 R1=3.3kW, C1=39pF
DIGIT=1-16, R1=3.3kW, C1=39pF
Min.
Typ.
Max. 0.2VDD
Unit
input pins excluding OSC0 0.8VDD
R2=1.0kW, C2=0.1µF
8/34
Semiconductor
MSM9200-xx
ELECTRICAL CHARACTERISTICS
Characteristics-1
(VDD=VDISP=5.0V±10%, VFL=-60V, Ta=-40 +85°C, unless otherwise specified) Parameter High Level Input Voltage Level Input Voltage High Level Input Current Level Input Current Symbol VOH1 High Level Output Voltage VOH2 VOH3 VOH4 Level Output Voltage VOL2 IDD1 Current Consumption IDD2 VDD, VDISP VOL1 Applied BLINK, RESET BLINK, RESET BLINK, RESET BLINK, RESET COM1-16 AD1-8 SEG1-35 P1-4 COM1-16 AD1-8 SEG1-35 P1-4 IOL1=2mA Duty=15/16 fOSC= 2MHz load Digit=1-16 output lights Duty=8/16 Digit=1-9 output lights VFL+1.0 Condition VIH=VDD VIL=0.0V IOH1=-30mA IOH2=-10mA IOH3=-5mA IOH4=-2mA Min. 0.7VDD -1.0 -1.0 VDISP-1.5 VDISP-1.5 VDISP-1.5 VDD-1.0 Max. 0.3VDD Unit
9/34
Semiconductor Characteristics-2
MSM9200-xx
(VDD=VDISP=3.3V±10%, VFL=-60V, Ta=-40 +85°C, unless otherwise specified) Parameter High Level Input Voltage Level Input Voltage High Level Input Current Level Input Current Symbol VOH1 High Level Output Voltage VOH2 VOH3 VOH4 Level Output Voltage VOL2 IDD1 Current Consumption IDD2 VDD, VDISP VOL1 Applied BLINK, RESET BLINK, RESET BLINK, RESET BLINK, RESET COM1-16 AD1-8 SEG1-35 P1-4 COM1-16 AD1-8 SEG1-35 P1-4 IOL1=1mA Duty=15/16 fOSC= 2MHz load Digit=1-16 output lights Duty=8/16 Digit=1-9 output lights VFL+1.0 Condition VIH=VDD VIL=0.0V IOH1=-30mA IOH2=-10mA IOH3=-5mA IOH4=-1mA Min. 0.8VDD -1.0 -1.0 VDISP-1.5 VDISP-1.5 VDISP-1.5 VDD-1.0 Max. 0.2VDD Unit
10/34
Semiconductor Characteristics-1
MSM9200-xx
(VDD, VDISP=5.0V±10%, VFL=-60V, Ta=-40 +85°C, unless otherwise specified) Parameter Symbol Condition R1=3.3kW, C1=47PF R1=3.3kW, C1=47PF Min. tR=20% tF=80% Max. Unit
Frequncy
Pulse Width Setup Time Hold Time Setup Time Hold Time Wait Time Data Processing Time RESET Pulse Width Waite Time Output Slow Rate Rise Time Time
tCSS tCSH tCSW tDOFF tRSON tRSOFF tPRZ tPOF Cl=100pF
When RESET signal input externally
When mounted unit When mounted unit, VDD=0.0V
Characteristics-2
(VDD, VDISP=3.3V±10%, VFL=-60V, Ta=-40 +85°C, unless otherwise specified) Parameter Frequncy Pulse Width Setup Time Hold Time Setup Time Hold Time Wait Time Data Processing Time RESET Pulse Width Wait Time Output Slew Rate Rise Time Time Symbol tCSS tCSH tCSW tDOFF tWRES tRSOFF tPRZ tPOF Cl=100pF Condition R1=3.3kW, C1=39PF R1=3.3kW, C1=39PF When RESET signal input externally tR=20% tF=80% Min. Max. Unit
When mounted unit When mounted unit, VDD=0.0V
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Semiconductor
MSM9200-xx
TIMING DIAGRAM
Data Timing
tCSS VALID VALID tDOFF VALID VALID tCSH tCSW
Reset Timing
RESET
tPRZ tRSON tRSOFF
When input externally
tWRES
When external connected.
tRSOFF
Output Timing
outputs
VDISP
Symbol
VDD=3.3V±10%
VDD=5.0V±10%
12/34
Semiconductor
MSM9200-xx
FUNCTIONAL DESCRIPTION
Command List
Command DCRAM data write DCRAM data write DCRAM data write DCRAM data write
byte
byte
CGRAM data write
CGRAM data write
byte byte byte byte byte byte byte byte byte byte
ADRAM data write Display blink position
byte
byte
DCRAM address shift DCRAM address reset Display duty Number digits lights ON/OFF Test mode
General output port
When data written (DCRAM, CGRAM, ADRAM) continuously, addresses internally incremented automatically. Therefore necessary specify byte write data later bytes. Note: test mode used inspection before shipment. user function.
Don't care Address specification each Character code specification each display area specification display area specification Display blink position specification Left right display shift specification General output port status specification Display duty specification Number digits specification lights instruction lights instruction
13/34
Semiconductor Positional Relationship Between SEGn (one digit)
MSM9200-xx
Area ADRAM data output
SEG5
SEG1
SEG2
SEG3
SEG4
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
CGRAM written data. Corresponds byte CGRAM written data. Corresponds byte CGRAM written data. Corresponds byte
CGRAM written data. Corresponds byte CGRAM written data. Corresponds byte
14/34
Semiconductor Data Transfer System Command Write System Display control command data written 8-bit serial transfer. Write timing shown figure below.
MSM9200-xx
Setting "Low" level enables data transfer. Data bits sequentially input into from (LSB first). shown figure below, data read shift register rising edge shift clock, which input into pin. 8-bit data input, internal load signals automatically generated data written each register RAM. Therefore necessary input load signals from outside. Setting "High" disables data transfer. Data input from point when changes from "High" "Low" recognized 8-bit units.
tDOFF tCSH
byte
byte
byte
When data written DCRAM* Command address data
Character code data
Character code data next address
When data written (DCRAM, ADRAM, CGRAM) continuously, addresses internally incremented automatically. Therefore necessary specify byte write data later bytes.
Reset Function Reset executed when RESET "L", (when turning power example,) initializes functions. Initial status follows. Address each address "00"H Data each contents undefined Display blink Blinking disabled outputs General output port general output ports "Low" Display digit digits Contrast adjustment 0/16 display lights mode Segment output segment outputs "Low" output outputs "Low" Reset again according "Initial Setting Flowchart" after reset.
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Semiconductor Description Commands Functions
MSM9200-xx
DCRAM data write (Specifies address (00H 0FH) DCRAM writes character code CGROM CGRAM.) DCRAM data write (Specifies address (10H 1FH) DCRAM writes character code CGROM CGRAM.) DCRAM data write (Specifies address (20H 2FH) DCRAM writes character code CGROM CGRAM.) DCRAM data write (Specifies address (30H 3FH) DCRAM writes character code CGROM CGRAM.) DCRAM (Data Control RAM) 6-bit address store character code CGROM CGRAM. bits user bits side automatically set.) character code specified DCRAM converted matrix character pattern CGROM CGRAM. capacity bits, which store characters. Note: addresses DCRAM automatically incremented. [Command format]
byte (1st)
selects DCRAM data write mode specifies DCRAM address (Ex: Specifies DCRAM address 00H) specifies character code CGROM CGRAM written into DCRAM address
byte (2nd)
specify character code CGROM CGRAM continuously next address, specify only character code follows. addresses DCRAM automatically incremented. Specification address unnecessary.
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Semiconductor
MSM9200-xx
byte (3rd)
specifies character code CGROM CGRAM written into DCRAM address
byte (4th) specifies character code CGROM CGRAM written into DCRAM address
byte (17th)
specifies character code CGROM CGRAM written into DCRAM address
byte (18th) specifies character code CGROM CGRAM written into DCRAM address
byte (65th)
specifies character code CGROM CGRAM written into DCRAM address
byte (66th) specifies character code CGROM CGRAM DCRAM address rewritten
(LSB) (MSB): DCRAM addresses bits: characters) Note: total characters four specifications (LSB) (MSB): Character code CGROM CGRAM bits: character) [COM positions DCRAM addresses] states when RESET input DCRAM address reset commands executed
Command COM15 COM16 position COM1 COM2 Command position
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Semiconductor
MSM9200-xx
CGRAM data write (Specifies addresses CGRAM writes character pattern data.) CGRAM data write (Specifies addresses CGRAM writes character pattern data.) CGRAM (Character Generator RAM) 5-bit address store matrix character patterns. bits user automatically set.) character pattern stored CGRAM displayed specifying character code (address) DCRAM. address CGRAM assigned 1FH. (All other addresses CGROM addresses.) Capacity bits, which store types character patterns. Note: addresses CGRAM automatically incremented. [Command format]
byte (1st)
selects CGRAM data write mode specifies CGRAM address. (Ex: specifies CGRAM address 00H) specifies column data rewritten into CGRAM address
byte (2nd)
byte (3rd)
specifies column data rewritten into CGRAM address
byte (4th)
specifies column data rewritten into CGRAM address
byte (5th)
specifies column data rewritten into CGRAM address
byte (6th)
specifies column data rewritten into CGRAM address
specify character pattern data continuously next address, specify only character pattern data follows. addresses CGRAM automatically incremented. Specification address therefore unnecessary. byte (character pattern data) regarded data item, sufficient tDOFF time between bytes.
18/34
Semiconductor
MSM9200-xx
byte (7th)
specifies column data rewritten into CGRAM address
byte (11th) byte (12th)
specifies column data rewritten into CGRAM address specifies column data rewritten into CGRAM address
byte (16th)
specifies column data rewritten into CGRAM address
byte (77th)
specifies column data rewritten into CGRAM address
byte (81th) byte (82th)
specifies column data rewritten into CGRAM address specifies column data rewritten into CGRAM address
byte (86th)
specifies column data rewritten into CGRAM address
byte (157th)
specifies column data rewritten into CGRAM address
byte (161th) byte (162th)
specifies column data rewritten into CGRAM address specifies column data (CGRAM address rewritten)
byte (167th)
specifies column data (CGRAM address rewritten)
(LSB) (MSB): CGRAM addresses bits: characters) Note: total characters specifications. (LSB) (MSB): Character pattern data bits: outputs digit) 19/34
Semiconductor
MSM9200-xx
Positional relationship between output area CGROM that CGRAM
area that corresponds byte (1st column) area that corresponds byte (2nd column) area that corresponds byte (5th column) area that corresponds byte (4th column) area that corresponds byte (3rd column)
Note: CGROM (Character Generator ROM) 8-bit address generate matrix character patterns. capacity bits, which store types character patterns. types general-purpose code availble (see CODE list) custom codes provided customer's request.
[CGROM addresses CGRAM addresses] Refer ROMCODE table
Command CGROM address RAM00(00000000B) RAM01(00000001B) RAM02(00000010B) RAM03(00000011B) RAM04(00000100B) RAM05(00000101B) RAM06(00000110B) RAM07(00000111B) RAM08(00001000B) RAM09(00001001B) Command CGROM address RAM10(00010000B) RAM11(00010001B) RAM12(00010010B) RAM13(00010011B) RAM14(00010100B) RAM15(00010101B) RAM16(00010110B) RAM17(00010011B) RAM18(00011000B) RAM19(00011001B)
RAM0A(00001010B) RAM0B(00001011B) RAM0C(00001100B) RAM0D(00001101B) RAM0E(00001110B) RAM0F(00001111B)
RAM1A(00011010B) RAM1B(00011011B) RAM1C(00011100B) RAM1D(00011101B) RAM1E(00011110B) RAM1F(00011111B)
20/34
Semiconductor ADRAM data write (specifies address ADRAM writes symbol data)
MSM9200-xx
ADRAM (Additional Data RAM) 4-bit address store symbol data. Symbol data specified ADRAM directly output without CGROM CGRAM. capacity bits, which store types symbol patterns each digit. terminal which contents ADRAM output used cursor. [Command format]
byte (1st)
selects ADRAM data write mode specifies ADRAM address (Ex: specifies ADRAM address sets symbol data (written into ADRAM address
byte (2nd)
specify symbol data continuously next address, specify only symbol data follows. address ADRAM automatically incremented. Specification addresses therefore unnecessary.
byte (3rd) byte (4th)
sets symbol data (written into ADRAM address sets symbol data (written into ADRAM address
byte (17th) byte (18th)
sets symbol data (written into ADRAM address sets symbol data (ADRAM address rewritten.)
(LSB) (MSB): ADRAM addresses bits: characters) (LSB) (MSB): Symbol data (8-symbol data digit)
21/34
Semiconductor [COM positions ADRAM addresses]
position COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8
MSM9200-xx
position COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
Display blink position (sets blink position area area COMn. Display blink position separately area area. this case, select command which COMn area area made blink. blink disabled state entered this setting when power turned when RESET signal input. display blink cycle determined frequency input BLINK pin. [Command format]
byte (1st)
selects either output area segment output area specifies digit
byte (2nd)
specifies blink position COM1 COM8
byte (3rd) specifies blink position COM9 COM16
bytes (COM1 COM16 position specification) regarded data item, sufficient tDOFF time between bytes. Specifies area Specifies area Specifies blinks
22/34
Semiconductor
MSM9200-xx
[SEG display data]
SG/AD display Does blink (current state) Does bilnk (current state) Specified positions blink Specified positions blink (The state when power applied when RESET input)
Note: both command, both area area specified.
DCRAM address shift (Shifts output left right.) DCRAM address shift shifts output digit left right using data. output cannot shifted. [Command format]
byte
selects DCRAM address shift sets shift value (left, right)
Specifies direction shift [Set data shift direction display]
Shift direction display Shift left Shift right
23/34
Semiconductor [DCRAM address shift positions] When (shift left) performed from initial state.
Command position COM2 COM3 COM16 Command
MSM9200-xx
position
COM1
When (shift right) performed from initial state.
Command position COM1 COM14 COM15 COM16 Command position
24/34
Semiconductor DCRAM address reset (returns display status initial setting status)
MSM9200-xx
DCRAM address reset returns status where DCRAM address shift executed initial status. [Command format]
byte
selects DCRAM address reset
Relation between DCRAM address shifts outputs
Initial status status where display address reset executed (DCRAM address 00H) output DCRAM address (HEX)
When left shift executed initial status output DCRAM address (HEX)
When right shift executed initial status output DCRAM address (HEX)
General output port (specifies general output port status) general output port output 4-bit static operation. used control other devices turn LED. When "High" level, this output becomes voltage, when "Low" level, becomes ground potential. Therefore, fluorescent display tube cannot driven. [Command format]
byte selects general output port specifies output status
P1-P4: general output port [Set data state general output port]
Display state general output port Sets output Sets output High (The state when power applied when RESET input.)
25/34
Semiconductor Display duty (writes display duty value duty cycle register)
MSM9200-xx
Display duty adjusts contrast stages using 4-bit data. When power turned when RESET signal input, duty cycle register value "0". Always execute this instruction before turning display then desired duty value. [Command format]
byte selects display duty mode sets duty value
(LSB) (MSB): display duty data bits: stages) [Relation between setup data controlled duty]
duty 0/16 1/16 2/16 3/16 4/16 5/16 6/16 7/16 duty 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16
state when powered when RESET signal inputs.
26/34
Semiconductor Number digits (writes number display digits display digit register)
MSM9200-xx
number digits display maximum digits using 4-bit data. When power turned when RESET signal input, number digit register value "0". Always execute this instruction change number digits before turning dispaly [Command format]
byte selects number digit mode specifies number digit value
(LSB) (MSB): number digit data bits: digits) [Relation between setup data controlled COM]
Number digits COM1-16 COM1-1 COM1-2 COM1-3 COM1-4 COM1-5 COM1-6 COM1-7 Number digits COM1-8 COM1-9 COM1-10 COM1-11 COM1-12 COM1-13 COM1-14 COM1-15
display lights ON/OFF (turns dispaly lights OFF) display lights used primarily display testing. display lights primarily used prevent malfunction when power turned [Command format]
byte
selects display lights mode sets lights value
[Set data display state
Display state outputs maintain current states Sets outputs Sets outputs High Sets outputs High (All lights mode priority.) (The state when power applied when RESET input.)
27/34
Semiconductor Initial Setting Flowchart
MSM9200-xx
Apply
display lights
Status outputs RESET signal input
General output port
Number digits
Display duty Select used
DCRAM Data write mode (with address set)
Address automatically incremented
CGRAM Data write mode (with address set)
Address automatically incremented
ADRAM Data write mode (with address set)
Address automatically incremented
DCRAM Character code DCRAM character code write ended?
CGRAM Character code CGRAM character code write ended?
ADRAM Character code ADRAM character code write ended?
Another set?
Releases display lights mode
Display operation mode
28/34
Semiconductor
MSM9200-xx
APPLICATION CIRCUIT
Heater transformer matrix fluorescent display tube
ANODE ANODE GRID (SEGMENT) (SEGMENT) (DIGIT) Output port BLINK RESET VDD, AD1-8 VDISP1-3 SEG1-35 COM1-16 P1-4 VFL1-2 OSC0 OSC1
MSM9200-xx
Notes: value depends power supply voltage microcontroller used. Adjust values constants power supply voltage used. value depends fluorescent display tube used. Adjust values constants power supply voltage used.
29/34
Semiconductor Reference data
MSM9200-xx
figure below shows relationship between voltage output current each driver. Take care that total power consumtion used does exceed power dissipation.
[VFL Voltage-Output Current Each Driver] (mA)
COM1 COM16 (Condition: VOH=VDISP-1.5
[Output Current] (mA)
(Condition: VOH=VDISP-1.5 SEG1 SEG35 (Condition: VOH=VDISP-1.5
[VFL Voltage (VDD-n)
30/34
Semiconductor
MSM9200-xx
MSM9200-01 Code
00000000B (00H) 00011111B (1FH) CGRAM addresses.
0000 0000 RAM00 RAM10 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
0001 RAM01 RAM11
0010 RAM02 RAM12
0011 RAM03 RAM13
0100 RAM04 RAM14
0101 RAM05 RAM15
0110 RAM06 RAM16
0111 RAM07 RAM17
1000 RAM08 RAM18
1001 RAM09 RAM19
1010 RAM0A RAM1A
1011 RAM0B RAM1B
1100 RAM0C RAM1C
1101 RAM0D RAM1D
1101 RAM0E RAM1E
1111 RAM0F RAM1F
31/34
Semiconductor
MSM9200-xx
MSM9200-02 Code
00000000B (00H) 00011111B (1FH) CGRAM addresses.
0000 0000 RAM00 RAM10 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
0001 RAM01 RAM11
0010 RAM02 RAM12
0011 RAM03 RAM13
0100 RAM04 RAM14
0101 RAM05 RAM15
0110 RAM06 RAM16
0111 RAM07 RAM17
1000 RAM08 RAM18
1001 RAM09 RAM19
1010 RAM0A RAM1A
1011 RAM0B RAM1B
1100 RAM0C RAM1C
1101 RAM0D RAM1D
1101 RAM0E RAM1E
1111 RAM0F RAM1F
32/34
Semiconductor Digit Output Timing (for 16-digit display, duty 15/16)
MSM9200-xx
T=8/ fOSC
Frame cycle t1=1024T Display timing t2=60T Blank timing t3=4T
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 AD1-8 SEG1-35
(t1=4.096 when fosc=2.0 MHz) (t2=240 when fosc=2.0 MHz) (t3=16 when fosc=2.0 MHz)
VDISP
VDISP
33/34
Semiconductor
MSM9200-xx
PACKAGE DIMENSIONS
(Unit QFP80-P-1414-0.65-K
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 0.85 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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Semiconductor MSM9200-xx This version: Nov. 1997 MSM9200-xx Previ

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