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HC908JB16AD/D Rev. 8/2002 Addendum MC68HC908JB16 Technical Data
This addendum provides update additional information MC68HC908JB16 Technical Data, Rev. (Motorola document number MC68HC908JB16/D), pertaining following: MC68HC908JB16 Update VREG trip point 20-pin SOIC package MC68HC908JB12 MC68HC08JB16
MC68HC908JB16
This section updates data sheet information introduces 20-pin SOIC package MC68HC908JB16.
VREG Trip Point
Page 318, entry minimum VREG trip point voltage been updated.
From:
Characteristic VREG trip point voltage Symbol VLVR Unit
VREG trip point voltage VLVR
Motorola, Inc., 2003
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HC908JB16AD/D
20-Pin SOIC
Order Number: MC68HC908JB16JDW
OSC1 OSC2 VREG PTD0/1
Pins available 20-pin package:
PTA0/KBA0 PTA1/KBA1 PTA2/KBA2 PTA3/KBA3 PTA4/KBA4 PTA5/KBA5 PTA6/KBA6 PTA7/KBA7
PTC1/RxD
PTE0/TCLK PTE2/T2CH01
PTD2 PTD3 PTD4 PTD5
CGMXFC1 CGMOUT1 VREGA0 VSSA0
CGMXFC2 CGMOUT2 VREGA1 VSSA1
PTE1/T1CH01 PTE3/D+ PTE4/D- PTC0/TxD
VDDA
Internal pads unconnected. PTD0/1 pin: PTD0 PTD1 internal pads bonded together PTD0/1 pin, 50mA sink capability when configured output. direction must configured such that DDRD0 DDRD1.
Figure 20-Pin SOIC Assignment
0.010 (0.25)
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.150 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.13 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 0.25 0.32 0.10 0.25 10.05 10.55 0.25 0.75 INCHES 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 0.010 0.012 0.004 0.009 0.395 0.415 0.010 0.029
0.010 (0.25)
SEATING PLANE
Figure 20-Pin SOIC Mechanical Dimensions (Case 751D)
Addendum MC68HC908JB16 Technical Data
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HC908JB16AD/D MC68HC908JB12
MC68HC908JB12
This section introduces MC68HC908JB12, derivative MC68HC908JB16. entire MC68HC908JB16 data book, including updates this addendum, applies this device, with exceptions outlined below. Table Summary MC68HC908JB12 MC68HC908JB16 Differences
MC68HC908JB12 MC68HC908JB16 16,384 bytes ($BA00-$F9FF) Available 32-pin LQFP only. 32-pin LQFP 28-pin SOIC 20-pin SOIC
FLASH Memory Dual Clock Generator Module
12,288 bytes ($CA00-$F9FF) implemented. $0051-$0059 unimplemented. 28-pin SOIC 20-pin SOIC
Available Packages(1)
Notes: assignments identical both devices; data sheet.
Block Diagram
Figure shows structure MC68HC908JB12.
Memory
Figure shows memory MC68HC908JB12.
Dual Clock Generator Module
dual 27-MHz clock generator module MC68HC908JB16 designed MC68HC908JB12, hence, register locations from $0051 $0059 unimplemented. Information data book relating apply MC68HC908JB12.
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Addendum MC68HC908JB16 Technical Data
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INTERNAL M68HC08 ARITHMETIC/LOGIC UNIT (ALU) DDRA KEYBOARD INTERRUPT MODULE
HC908JB16AD/D
DDRC
OSC2
COMPUTER OPERATING PROPERLY MODULE 2-CHANNEL TIMER INTERFACE MODULE
DDRD
OSCILLATOR
DDRE
Addendum MC68HC908JB16 Technical Data
POWER-ON RESET MODULE 2-CHANNEL TIMER INTERFACE MODULE SYSTEM INTEGRATION MODULE MODULE ENDPOINT TRANSCEIVER MODULE POWER INTERNAL VOLTAGE REGULATORS Pins have logic. Pins have integrated pullup device. Pins have software configurable pullup device. Pins open-drain when configured output.
PTA7/KBA7 PTA0/KBA0 BREAK MODULE SERIAL COMMUNICATIONS INTERFACE MODULE VOLTAGE INHIBIT MODULE PTD5 (4), PTD4 (4), PTD3 (4), PTD2 (4), PTD1 (4), PTD0 (4), PTC1/RxD (3), PTC0/TxD PTE4/D- (3), PTE3/D+
(3),
REGISTERS
CONTROL STATUS REGISTERS BYTES
USER FLASH MEMORY 12,288 BYTES
USER BYTES
MONITOR 1,472 BYTES
USER FLASH VECTORS BYTES
OSC1
PTE2/T2CH01 (3), PTE1/T1CH01 PTE0/TCLK (3),
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VREG (3.3V)
Pins available 28-pin package only. 20-pin package, PTD0 PTD1 bonded single PTD0/1 pin.
MOTOROLA
Figure MC68HC908JB12 Block Diagram
HC908JB16AD/D MC68HC908JB12
$0000 $007F $0080 $01FF $0200 $C9FF $CA00 $F9FF $FA00 $FDFF $FE00 $FE01 $FE02 $FE03 $FE04 $FE05 $FE06 $FE07 $FE08 $FE09 $FE0A $FE0B $FE0C $FE0D $FE0E $FE0F $FE10 $FFCF $FFD0 $FFFF
Registers Bytes Bytes Unimplemented 51,200 Bytes FLASH Memory 12,288 Bytes Monitor 1,024 Bytes Break Status Register (SBSR) Reset Status Register (SRSR) Reserved Break Flag Control Register (SBFCR) Interrupt Status Register (INT1) Interrupt Status Register (INT2) Reserved Reserved FLASH Control Register (FLCR) FLASH Block Protect Register (FLBPR) Reserved Reserved Break Address Register High (BRKH) Break Address Register (BRKL) Break Status Control Register (BRKSCR) Reserved Monitor Bytes FLASH Vectors Bytes
Figure MC68HC908JB12 Memory
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Addendum MC68HC908JB16 Technical Data
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HC908JB16AD/D
Pullup PTE3/D+ PTE4/D- Pins
MC68HC908JB12, control over pullup devices PTE3/D+ PTE4/D- pins shown Table Table Pullup Control PTE3/D+ PTE4/D- Pins
PULLEN ($001A)
USBEN ($0038)
PTExP ($001D)
PTE4IE ($001C)
PTE3/D+ pullup pullup
PTE4/D- pullup pullup pullup 1.5k pullup VREG 1.5k pullup VREG
Notes:
this configuration.
External interrupt function also enabled PTE4/D- pin.
Electrical Specifications
State
Electrical specifications MC68HC908JB16 apply MC68HC908JB12, except reset timing:
Signaling Levels Transmit Receive (max) (MC68HC908JB16) (max) 125µs (MC68HC908JB12)
Reset
Order Numbers
These order numbers MC68HC908JB12. Table MC68HC908JB12 Order Numbers
Order Number MC68HC908JB12JDW MC68HC908JB12DW Package 20-pin SOIC 28-pin SOIC Operating Temperature Range
Addendum MC68HC908JB16 Technical Data
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HC908JB16AD/D MC68HC08JB16
MC68HC08JB16
This section introduces MC68HC08JB16, part equivalent MC68HC908JB16. entire MC68HC908JB16 data book applies this device, with exceptions outlined below. Table Summary MC68HC08JB16 MC68HC908JB16 Differences
MC68HC08JB16 MC68HC908JB16 16,384 bytes FLASH bytes FLASH FLASH related registers. $FE08 FLCR $FE09 FLBPR Used testing FLASH programming/erasing. Available 32-pin LQFP only. 32-pin LQFP 28-pin SOIC 20-pin SOIC
Memory ($BA00-$F9FF) User vectors ($FFD0-$FFFF) Registers $FE08 $FE09 Monitor ($FA00-$FDFF) Monitor ($FE10-$FFCF) Dual Clock Generator Module Available Packages(1)
16,384 bytes bytes used; locations reserved Unimplemented Used testing purposes only. Currently available. 32-pin LQFP currently available. 28-pin SOIC 20-pin SOIC
Notes: assignments identical both devices; data sheet.
Block Diagram
Figure shows block diagram MC68HC08JB16.
Memory
Figure shows memory MC68HC08JB16.
Reserved Registers
registers $FE08 $FF09 reserved locations MC68HC08JB16. MC68HC908JB16, these locations FLASH control register FLASH block protect register respectively.
Monitor
monitor program (monitor ROM, $FE10-$FFCF) MC68HC08JB16 device testing only.
MOTOROLA
Addendum MC68HC908JB16 Technical Data
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INTERNAL M68HC08 ARITHMETIC/LOGIC UNIT (ALU) DDRA KEYBOARD INTERRUPT MODULE
HC908JB16AD/D
DDRC
OSC2
COMPUTER OPERATING PROPERLY MODULE
DDRD
OSCILLATOR
DDRE
Addendum MC68HC908JB16 Technical Data
POWER-ON RESET MODULE DUAL CLOCK GENERATOR MODULE 2-CHANNEL TIMER INTERFACE MODULE 2-CHANNEL TIMER INTERFACE MODULE SYSTEM INTEGRATION MODULE MODULE ENDPOINT TRANSCEIVER MODULE POWER INTERNAL VOLTAGE REGULATORS Pins have logic. Pins have integrated pullup device. Pins have software configurable pull-up device. Pins open-drain when configured output. Pins available 32-pin package only. Pins available 28-pin package only.
PTA7/KBA7 PTA0/KBA0 BREAK MODULE SERIAL COMMUNICATIONS INTERFACE MODULE VOLTAGE INHIBIT MODULE PTD5 (4), PTD4 (4), PTD3 (4), PTD2 (4), PTD1 (4), PTD0 PTC1/RxD PTC0/TxD PTE4/D- (3), PTE3/D+
(3),
REGISTERS
CONTROL STATUS REGISTERS BYTES
USER 16,384 BYTES
USER BYTES
MONITOR BYTES
USER VECTORS BYTES
OSC1
CGMXFC1 (1), CGMOUT1 CGMXFC2 (1), CGMOUT2
PTE2/T2CH01 PTE1/T1CH01 PTE0/TCLK
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VREG (3.3V)
VSSA0
SSA1
VREGA0 (3.3V) REGA1 (3.3V)
Shaded blocks indicate differences MC68HC908JB16
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Figure MC68HC08JB16 Block Diagram
HC908JB16AD/D MC68HC08JB16
$0000 $007F $0080 $01FF $0200 $B9FF $BA00 $F9FF $FA00 $FDFF $FE00 $FE01 $FE02 $FE03 $FE04 $FE05 $FE06 $FE07 $FE08 $FE09 $FE0A $FE0B $FE0C $FE0D $FE0E $FE0F $FE10 $FFCF $FFD0 $FFFF
Registers Bytes Bytes Unimplemented 47,104 Bytes 16,384 Bytes Unimplemented 1,024 Bytes Break Status Register (SBSR) Reset Status Register (SRSR) Reserved Break Flag Control Register (SBFCR) Interrupt Status Register (INT1) Interrupt Status Register (INT2) Reserved Reserved Reserved Reserved Reserved Reserved Break Address Register High (BRKH) Break Address Register (BRKL) Break Status Control Register (BRKSCR) Reserved Monitor Bytes Vectors Bytes
Figure MC68HC08JB16 Memory
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Addendum MC68HC908JB16 Technical Data
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HC908JB16AD/D
Electrical Specifications FLASH Memory Characteristics
Electrical specifications MC68HC908JB16 apply MC68HC08JB16, except following: FLASH memory electrical characteristics apply MC68HC08JB16 device.
Order Numbers
These part numbers generic numbers only. place order, code must submitted Processing Center (RPC). Table Order Numbers
Order Number MC68HC08JB16JDW MC68HC08JB16DW Package 20-pin SOIC 28-pin SOIC Operating Temperature Range
Addendum MC68HC908JB16 Technical Data
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HC908JB16AD/D NOTES
NOTES
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Addendum MC68HC908JB16 Technical Data
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REACH USA/EUROPE/LOCATIONS LISTED: Motorola Literature Distribution P.O. 5405, Denver, Colorado 80217 1-800-521-6274 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre, King Street Industrial Estate, N.T., Hong Kong 852-26668334 HOME PAGE:
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HC908JB16AD/D Rev. 8/2003
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