This addendum provides update additional information MC68HC908JL8 Tech

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HC908JL8AD/D Rev. 5/2002 Addendum MC68HC908JL8 Technical Data
This addendum provides update additional information MC68HC908JL8 Technical Data, Rev. (Motorola document number MC68HC908JL8/D)
MC68HC08JL8 MC68HC08JK8
MC68HC08JL8 part equivalent MC68HC908JL8. entire MC68HC908JL8 data book apply this device, with exceptions outlined this addendum. Table Summary MC68HC08JL8 MC68HC908JL8 Differences
MC68HC08JL8 Memory ($DC00-$FBFF) User vectors ($FFDC-$FFFF) Registers $FE08 $FFCF Mask option register ($FFD0) Monitor ($FC00-$FDFF $FE10-$FFCE) 8,192 bytes bytes used; locations reserved. Defined mask; read only. $FC00-$FDFF: used. $FE10-$FFCE: Used testing purposes only. 20-pin PDIP (MC68HC08JK8) 20-pin SOIC (MC68HC08JK8) 28-pin PDIP 28-pin SOIC 32-pin SDIP 32-pin LQFP MC68HC908JL8 8,192 bytes FLASH bytes FLASH FLASH related registers. $FE08 FLCR $FFCF FLBPR Read/write FLASH register. Used testing FLASH programming/erasing. 20-pin PDIP (MC68HC908JK8) 20-pin SOIC (MC68HC908JK8) 28-pin PDIP 28-pin SOIC 32-pin SDIP 32-pin LQFP
Available Packages
Motorola, Inc., 2003
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HC908JL8AD/D
Block Diagram Memory
Figure shows block diagram MC68HC08JL8. MC68HC08JL8 8,192 bytes user from $DC00 $FBFF, bytes user vectors from $FFDC $FFFF. MC68HC908JL8, these memory locations FLASH memory. Figure shows memory MC68HC08JL8.
INTERNAL
M68HC08
REGISTERS
ARITHMETIC/LOGIC UNIT (ALU)
KEYBOARD INTERRUPT MODULE PORTA DDRA
CONTROL STATUS REGISTERS BYTES
8-BIT ANALOG-TO-DIGITAL CONVERTER MODULE
USER 8,192 BYTES
2-CHANNEL TIMER INTERFACE MODULE
PTA7/KBI7** PTA5/KBI5** PTA4/KBI4** PTA3/KBI3** PTA2/KBI2** PTA1/KBI1** PTA0/KBI0** PTB7/ADC7 PTB6/ADC6 PTB5/ADC5 PTB4/ADC4 PTB3/ADC3 PTB2/ADC2 PTB1/ADC1 PTB0/ADC0 ADC12/T2CLK
USER BYTES PORTB DDRB 2-CHANNEL TIMER INTERFACE MODULE
MONITOR BYTES
USER VECTORS BYTES
BREAK MODULE
OSC1
CRYSTAL OSCILLATOR OSCILLATOR INTERNAL OSCILLATOR
OSC2/RCCLK
SERIAL COMMUNICATIONS INTERFACE MODULE PORTD
POWER-ON RESET MODULE
SYSTEM INTEGRATION MODULE EXTERNAL INTERRUPT MODULE
LOW-VOLTAGE INHIBIT MODULE DDRE
PTD7/RxD** PTD6/TxD** PTD5/T1CH1 PTD4/T1CH0 PTD3/ADC8 PTD2/ADC9 PTD1/ADC10 PTD0/ADC11
DDRD
PTE1/T2CH1
COMPUTER OPERATING PROPERLY MODULE
PTE0/T2CH0
POWER REFERENCE
contains integrated pull-up device. contains programmable pull-up device. 25mA open-drain output pin. direct sink pin. Shared pin: OSC2/RCCLK/PTA6/KBI6. Pins available 32-pin packages only. Pins available 28-pin 32-pin packages only. Shaded blocks indicate differences MC68HC908JL8
Figure MC68HC08JL8 Block Diagram
Addendum MC68HC908JL8 Technical Data
MOTOROLA
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HC908JL8AD/D MC68HC08JL8 MC68HC08JK8
$0000 $003F $0040 $005F $0060 $015F $0160 $DBFF
REGISTERS BYTES RESERVED BYTES BYTES UNIMPLEMENTED 55,968 BYTES 8,192 BYTES UNIMPLEMENTED BYTES BREAK STATUS REGISTER (BSR) RESET STATUS REGISTER (RSR) RESERVED BREAK FLAG CONTROL REGISTER (BFCR) INTERRUPT STATUS REGISTER (INT1) INTERRUPT STATUS REGISTER (INT2) INTERRUPT STATUS REGISTER (INT3) RESERVED RESERVED RESERVED BREAK ADDRESS HIGH REGISTER (BRKH) BREAK ADDRESS REGISTER (BRKL) BREAK STATUS CONTROL REGISTER (BRKSCR) RESERVED MONITOR BYTES RESERVED MASK OPTION REGISTER (MOR) READ ONLY RESERVED BYTES USER VECTORS BYTES
$DC00 $FBFF $FC00 $FDFF $FE00 $FE01 $FE02 $FE03 $FE04 $FE05 $FE06 $FE07 $FE08 $FE09 $FF0B $FE0C $FE0D $FE0E $FE0F $FE10 $FFCE $FFCF $FFD0 $FFD1 $FFDB $FFDC $FFFF
Figure MC68HC08JL8 Memory
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Addendum MC68HC908JL8 Technical Data
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HC908JL8AD/D
Reserved Registers
registers $FE08 $FFCF reserved locations MC68HC08JL8. MC68HC908JL8, these locations FLASH control register FLASH block protect register respectively.
Mask Option Register
mask option register $FFD0 read only. value defined mask option (hard-wired connections) specified time code submission. MC68HC908JL8, implemented FLASH, which programmed, erased, read.
Monitor
monitor program (monitor ROM: $FE10-$FFCE) MC68HC08JL8 device testing only. $FC00-$FDFF unused. Electrical specifications MC68HC908JL8 apply MC68HC08JL8, except parameters indicated below.
Electrical Specifications Electrical Characteristics
Table Electrical Characteristics (5V)
Characteristic(1) supply current, 8MHz oscillator option Low-voltage inhibit, trip falling voltage Low-voltage inhibit, trip rising voltage Symbol VTRIPF VTRIPR Typ(2) Unit
Values same characterized from MC68HC908JL8, tested. 3.55 (3.60)(3) 3.66 (3.75) 4.02 (4.25) 4.13 (4.40) 4.48 (4.48) 4.59 (4.63)
Vdc, Vdc, unless otherwise noted. Typical values reflect average measurements midpoint voltage range, only. numbers parenthesis MC68HC908JL8 values.
Table Electrical Characteristics (3V)
Characteristic(1) supply current, 4MHz oscillator option Low-voltage inhibit, trip voltage hysteresis implemented LVI) Symbol VLVI3 Typ(2) Unit
Values same characterized from MC68HC908JL8, tested. (2.18)(3) (2.49) 2.69 (2.68)
Vdc, Vdc, unless otherwise noted. Typical values reflect average measurements midpoint voltage range, only. numbers parenthesis MC68HC908JL8 values.
Addendum MC68HC908JL8 Technical Data
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HC908JL8AD/D MC68HC08JL8 MC68HC08JK8
frequency, fRCCLK (MHz) Resistor, REXT
MC68HC908JL8 MC68HC08JL8
CEXT OSC1
REXT
CEXT
Figure Frequency
frequency, fRCCLK (MHz) Resistor, REXT
MC68HC908JL8 MC68HC08JL8
CEXT OSC1
REXT
CEXT
Figure Frequency Memory Characteristics Table Memory Characteristics
Characteristic data retention voltage Symbol VRDR Unit
Notes: Since MC68HC08JL8 device, FLASH memory electrical characteristics apply.
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Addendum MC68HC908JL8 Technical Data
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HC908JL8AD/D
MC68HC08JL8 Order Numbers
These part numbers generic numbers only. place order, code must submitted Processing Center (RPC). Table MC68HC08JL8 Order Numbers
Order Number MC68HC08JK8CP MC68HC08JK8MP MC68HC08JK8CDW Operating Temperature Range +125 +125 +125 +125 +125 +125 Package
20-pin PDIP
20-pin SOIC
MC68HC08JK8MDW MC68HC08JL8CP MC68HC08JL8MP MC68HC08JL8CDW MC68HC08JL8MDW MC68HC08JL8CSP MC68HC08JL8MSP MC68HC08JL8CFA MC68HC08JL8MFA
28-pin PDIP
28-pin SOIC
32-pin SDIP
32-pin LQFP
NOTE: Temperature grade available only.
Addendum MC68HC908JL8 Technical Data
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HC908JL8AD/D AMENDMENTS MC68HC908JL8/D, REV.
AMENDMENTS MC68HC908JL8/D, REV.
Keyboard Interrupt Page 243, Figure 15-2. Keyboard Interrupt Block Diagram Replace with following block diagram:
NOTE: prevent false interrupts, user should software debounce keyboard interrupt inputs.
INTERNAL
KBI0 KBIE0 PULLUP ENABLE KBI7
ACKK RESET
VECTOR FETCH DECODER KEYF SYNCHRONIZER KEYBOARD INTERRUPT REQUEST
KEYBOARD INTERRUPT
IMASKK
MODEK KBIE7 PULLUP ENABLE
Computer Operating Properly (COP)
Page 254, 16.8.2 Stop Mode Replace paragraphs:
From:
Stop mode turns ICLK input STOP_ICLKDIS configuration register (CONFIG2). Service immediately before entering after exiting stop mode ensure full timeout period after entering exiting stop mode. After reset, STOP_ICLKDIS clear default ICLK enabled during stop mode.
Stop mode turns ICLK input clears prescaler. Service immediately before entering after exiting stop mode ensure full timeout period after entering exiting stop mode. prevent inadvertently turning with STOP instruction, configuration option available that disables STOP instruction. When STOP configuration register STOP instruction disabled, execution STOP instruction results illegal opcode reset.
MOTOROLA
Addendum MC68HC908JL8 Technical Data
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REACH USA/EUROPE/LOCATIONS LISTED: Motorola Literature Distribution P.O. 5405, Denver, Colorado 80217 1-800-521-6274 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre, King Street Industrial Estate, N.T., Hong Kong 852-26668334 HOME PAGE:
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Motorola Stylized Logo registered U.S. Patent Trademark Office. digital trademark Motorola, Inc. other product service names property their respective owners. Motorola, Inc. Equal Opportunity/Affirmative Action Employer. Motorola, Inc. 2003
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HC908JL8AD/D Rev. 5/2003

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