Mapping Control Registers Michael Mann Contents Introdu

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Order AN1940/D (Motorola Order Number) Rev. 3/02
Mapping Control Registers
Michael Mann
Contents
Introduction. Registers
Control Register (ADCR1) Control Register (ADCR2) Zero Crossing Range Limit Registers Channel List Sample Disable Registers (ADLST1, ADLST2, ADSDIS)
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Introduction
does defined Section Manual Targeting Motorola 56F80X Platform relate description operation discussed Section DSP56F80X User's Manual? First, Manual describes from software perspective while User's Manual describes from hardware point view. Manual describes from language perspective while User's Manual tells reader what bits what memory map. This application note provides bridge between these perspectives.
Programming Examples.
Tell Whether Example Works.9 3.1.1 Loop Mode Examples.10 3.1.2 Once Mode Examples.10 3.1.3 Triggered Mode Examples Suitability Other EVMs.11 3.2.1 56F805 3.2.2 56F803
Deeper Look
Registers
Mapping Control Registers
There different register types, with separate registers. most setup module accomplished settings (mostly appconfig.h) different types #define tokens. There also data structure defined Table 5-26 Targeting Manual, that used open function. Parameters determined appconfig.h static application, while those parameters determined open statement changed. addition these parameters open statement, primitive ioctl used start/stop ADC, clock, enable/disable callbacks, more. Table shows eleven types registers. Let's begin exploration between register with Control Register
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Registers
Table 2-1. Registers DSP56F80x
Name Control Registers Zero Crossing Register Channel List Registers Sample Disable Register Status Register Limit Status Register Zero Crossing Status Register Result Registers Limit Registers Offset Registers Acronym ADCR1 ADCR2 ADZCC ADLST1 ADLST2 ADSDIS ADSTAT ADLSTAT ADZCSTAT ADRSTL0-7 ADCLLMT0-7 ADOFS0-7
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Control Register (ADCR1)
ADC_BASE+$0
STOP
START
Read Write Reset
SYNC EOSIE ZCIE LLMTIE HLMTIE
CHNCFG[3:0]
SMODE[2:0]
each register field shown above, will discuss equivalent construct SDK's driver.:
Register Field SMODE[2:0] (reserved) (reserved) CHNCFG[3:0] Equivalent #define ADC{|A|B}_SCANMODE= ADC_SEQUENTIAL_ONCE ADC_ONCE_SIMULTANEOUS ADC_SEQUENTIAL_LOOP ADC_SIMULTANEOUS_LOOP ADC_SEQUENTIAL_TRIGGERED ADC_SIMULTANEOUS_TRIGGERED
#define ADC{|A|B}_DIFFERENTIAL_01 #define ADC{|A|B}_DIFFERENTIAL_23 #define ADC{|A|B}_DIFFERENTIAL_45 #define ADC{|A|B}_DIFFERENTIAL_67
Note: Braces denote options naming define token. 56F801/3/5 DSPs each have single analog digital converter (ADC) module named ADCA, while 56F807 modules, named ADCA ADCB. Since must support theses DSPs, many token names have multiple forms. Typically token form ADC_name `801-805 ADCA_name plus ADCB_name `807. example ADC{|A|B}_SCANMODE represents three tokens: ADC_SCANMODE, ADCA_SCANMODE, ADCB_SCANMODE. Since equivalents shown above form "#define TOKEN" appconfig.h file, these configurations static done once build application.
Register Field HLMTIE HLMTIE Equivalent default #define ADC_RAW_HIGH_LIMIT_CALLBACK HighCallbackFunction
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While #define ADC_RAW_HIGH_LIMIT_CALLBACK appconfig.h file equivalent "HLMTIE does more than simply turn HLMTIE. also installs interrupt vector executive that handles Zero Crossing, High Threshold, Threshold interrupts. This ISR, installed vector table address $0072 (ADCA) $0070 (ADCB) checks which type interrupts active checking HLMTI, LLMTI, bits Status Register (ADCSTAT). function prototype callback functions
myCallbackFunction( adc_eCallbackType Type, adc_tSampleMask CausedSampleMask) typedef enum{ ADC_ZERO_CROSSING, ADC_LOW_LIMIT, ADC_HIGH_LIMIT, ADC_CONVERSION_COMPLETE, adc_eCallbackType typedef UWord16 adc_tCallbackType void
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least significant byte CausedSampleMask identifies which analog channel(s) caused interrupt(s). This information taken from Limit Status Register (ADLSTAT) Zero Crossing Status Register (ADZCSTAT). when coding callback function used, check first argument Type, using enumeration define above, what type event occurred. different call back functions each call back type don't need check this argument. service more than event with same call back function, example both high thresholds, then must check this argument. Check second argument, CausedSampleMask, determine which channel channels caused interrupts. support limit interrupt, equivalent high limit interrupt, given
Register Field LLMTIE LLMTIE Equivalent default #define ADC_RAW_LOW_LIMIT_CALLBACK LowCallBackFunction
with high level callback, definition level callback also installs same interrupt executive discussed above.
Support zero crossing interrupt given
Register Field ZCIE ZCIE Equivalent default #define ADC_RAW_ZERO_CROSSING_CALLBACK ZeroCrossCallBack
with high level callbacks, definition zero crossing callback also installs same interrupt executive discussed above. these interrupts serviced through same entry interrupt table:
$0072 $0070 ADCA Zero Crossing Limit Error ADCB Zero Crossing Limit Error (DSP56F807 only)
default interrupt priority level other priorities appconfig.h support interrupt nesting including additional lines
#define #define GPR_INT_PRIORITY_57 //ADCA GPR_INT_PRIORITY_56 //ADCB (DSP56F807 only)
where integer between
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Processing after completion scan supported
Register Field Equivalent EOSIE default EOSIE #define EndofScanCallbackFunction
This callback served ISRs vector locations (ADCA) (ADCB):
$0055 $0054 ADCA Conversion Complete ADCB Conversion Complete (DSP56F807 only)
default priority level other priorities appconfig.h
#define #define GPR_INT_PRIORITY_55 //ADCA GPR_INT_PRIORITY_54 //ADCB (DSP56F807 only)
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where integer between Callback functions evoked using SDK's interrupt dispatcher. This interrupt dispatcher provides full context saving interrupt service routines that they written Users desiring minimize interrupt latency while using SDK's superfast interrupt support defining token appconfig.h file:
#define #define //DSP56F807
Then #pragma interrupt must appear callback code, including only callback routines, also routines called them. more information interrupt support within Chapter Embedded Programmer's Guide. bypass SDK's interrupt dispatcher programing call back function installing call back directly into interrupt table superfast interrupt. examples this source code Simultaneous Triggered example discussed below. support SYNC, START, STOP fields given
Register Field SYNC SYNC START START STOP STOP Equivalent #define ADC_INITIATE_SCAN_ON_START //default #define ADC_INITIATE_SCAN_ON_SYNC also ioctl(ADC_FD, {ADC_SYNC_OFF ADC_SYNC_ON}, NULL) this only start scan ioctl(ADC_FD, ADC_START, NULL) ioctl(ADC_FD, ADC_STOP, NULL) this stop scan
Where file descriptor, ADC_FD been assigned open call. Note that file descriptor, ADC_FD, relates single analog input. This call ioctl changes behavior other channels that have been opened! This call affects open channels even though ADC_FD argument only applies single input channel. There corresponding call un-stop once been stopped. only un-stop this periphBitSet close then reopen input channels.
Mapping Control Registers
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Registers
Control Register (ADCR2)
ADC_BASE+$1
Read Write Reset
DIV[3:0]
Register Field Equivalent DIV[3:0] (default value SDK) (default value field reset) #define ADC_CLOCK_DIVISOR ioctl(ADC_FD, ADC_SET_DIVISOR,
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Please note that ioctl call affects open channels (all file descriptors) even though first argument file descriptor channel. Clock divisors should range 1-15, either integer constant #define argument ioctl call.
Zero Crossing Range Limit Registers
Name Zero Crossing Control Register Offset Registers Limit Registers High Limit Registers Acronym ADZCC ADOFS0-7 ADLLMT0-7 ADHLMT0-7 Fields ZCEi[1:0], i=0,.,7 OFFSET[11:0] LLMT[11:0] HLMT[11:0]
These fields determined adc_sState data structure passed third argument open call. typical declaration this data structure
static const adc_sState sAdc1 /*Analog Channel ADC_CHANNEL_6, /*Open SampleMask /*Channel Offset FRAC16(0.5), /*Low Limit FRAC16(0.25), /*High Limit FRAC16(0.75), /*Zero Crossing Type ADC_ZC_DISABLE //Channel used //Assigned Sample scan //OFFSET[11:0] ADOFS0 //LLMT[11:0] ADLLMT0 //HLMT[11:0] ADHLMT0 //ZCE0[1:0] ADCZCC
Possible values Analog Channel tokens form ADC_CHANNEL_N where 2.7. (The example above This member state data structure identifies which input mapped file descriptor returned open call. Possible values zero crossing type are:
Register Field Equivalent ZCEi[1:0] /*Zero Crossing Type ADC_ZC_DISABLE ADC_ZC_POSITIVE_NEGATIVE ADC_ZC_NEGATIVE_POSITIVE ADC_ZC_ANY
module capture eight single-ended inputs four differential inputs. mapping input pin(s) sample totally arbitrary save rules:
Differential inputs consecutive pins. E.G.: pins AN1(-) support differential input. simultaneous sampling mode, same can't assigned both inputs sample pair. Each sample service just input. It's impossible otherwise when programming ADC's Channel List Registers, possible misprogram SDK's API. When duplicate sample assignment encountered, open routine will return file descriptor showing that open unsuccessful.
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Registers
Channel List Sample Disable Registers (ADLST1, ADLST2, ADSDIS)
explore relationship between SAMPLEi:[2:0] fields Channel List Registers (ADLST1, ADLST2), Sample Disable Register (ADSDIS), OpenSampleMask values each open call, helps relationship between analog input sample order. Excel spreadsheet "Pin SampleMap.xls"1 provides tool that determine OpenSampleMasks based Pin-Sample assignments (see Figure 2-1). spreadsheet added "smarts" prevent problems such premature termination scans because disabled samples. spreadsheet does not, however, flag when same analog assigned both samples simultaneous sample pair.
Pin-Sample Map:
Sample Sample Assignment OK?: TRUE SAMPLEi [2:0]: Sample Enabled?: TRUE Sample Enabled?: TRUE Analog Input
Input assign channel, blank zero otherwise
TRUE
TRUE TRUE
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TRUE
TRUE TRUE
TRUE
TRUE TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
Open Sample Mask
appconfig.h:
#define #define #define #define #define #define #define #define
N.B.:Replace with E.G.: INCLUDE_ADCA_SAMPLE_1 INCLUDE_ADC?_SAMPLE_0 INCLUDE_ADC?_SAMPLE_1 INCLUDE_ADC?_SAMPLE_2 INCLUDE_ADC?_SAMPLE_3 INCLUDE_ADC?_SAMPLE_4 INCLUDE_ADC?_SAMPLE_5 INCLUDE_ADC?_SAMPLE_6 INCLUDE_ADC?_SAMPLE_7
Figure 2-1. Example Pin-Sample rows this table indicate analog input while columns indicate sample number. column index differs depending whether sequential simultaneous sampling mode. Sequential samples indexed from while simultaneous samples come pairs, here indexed from suffix means first sample sample pair marks second. (input pin, sample) row-column intersection user input allocate that sample number that row's analog input pin. Figure shows that possible capture eight samples from same input pin. Note that this valid configuration simultaneous mode operation, since same input (AN0) used both halves sampling pair
find this spreadsheet examples mentioned Programming Examples searching through 56800 FAQs using category Converter Module. Mapping Control Registers MOTOROLA
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Registers
in-Sam
ssignm [2:0]: nabled?: nabled?: Analog Input
Input assign channel, blank zero otherw
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appconfig.h:
fine fine fine fine fine fine fine fine fine
eplace INCLUD E_ADCA_S AMPLE_1 QUEUE DEPTH 16*8) CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL CLUDE_AD C?_SAMPL
Figure 2-2. Pin-Sample Eight Samples Input
ssign Analog Input
Input assign channel, blank zero otherw
TRUE
TRUE
TRUE TRUE
TRUE
TRUE
TRUE TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
#define #define #define #define #define #define #define #define #define
ADC? QUEUE DEPTH (16*4) INCLUDE_ADC?_SAMPLE_0 INCLUDE_ADC?_SAMPLE_1 INCLUDE_ADC?_SAMPLE_2 INCLUDE_ADC?_SAMPLE_3 INCLUDE_ADC?_SAMPLE_4 INCLUDE_ADC?_SAMPLE_5 INCLUDE_ADC?_SAMPLE_6 INCLUDE_ADC?_SAMPLE_7
Figure 2-3. Simultaneous Sampling Mode Equivalent Figure Four Samples Each Input
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ssignm [2:0]: nable nable Analog Input
Input assign channel, blank zero otherw
TRUE
TRUE
TRUE
TRUE
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config.h
place INCLU DE_ADC A_SAM PLE_1
#def NCLUD E_ADC? _SAMP LE_0
Figure 2-4. Single Input Sample Captured
Pin-Sample Map:
Sample Sample Assignment OK?: TRUE SAMPLEi [2:0]: Sample Enabled?: TRUE Sample Enabled?: TRUE Analog Input
Input assign channel, blank zero otherwise
Open Sample Mask
TRUE
FALSE FALSE
TRUE
FALSE FALSE
TRUE
FALSE FALSE
TRUE
FALSE
TRUE
FALSE
TRUE
FALSE
TRUE
FALSE
appconfig.h:
N.B.:Replace with E.G.: INCLUDE_ADCA_SAMPLE_1
#define INCLUDE_ADC?_SAMPLE_0
#define INCLUDE_ADC?_SAMPLE_4
Figure 2-5. Simultaneous Sampling Mode Case Equivalent Figure 2-4.
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Programming Examples
Note, however, possible capture simultaneous mode samples once. This shown Figure 2-3. this interest? operating clock rate much faster than targeted signal, oversample then average. Assuming that white noise predominates targeted signal opposed coherent noise), averaging four samples improve ADC's Averaging samples improve nearly sample input more than once each scan must increase ADC's queue depth. default bits, sufficient only sample. your appconfig.h file should increase this default accordingly:
#define NUM_SAMPLES //for Figure 2-2, Figure #define ADCA_QUEUE_DEPTH 16*NUM_SAMPLES
Then each read statement should pass vector NUM_SAMPLES long instead scalar.
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WARNING: driver does support storing samples from past scans some sort FIFO buffering. only buffering provided case that same input sampled more than once. Figure Figure show simplest channel assignments sequential simultaneous modes, respectively.
Programming Examples
There twelve examples SDK's drivers. obtain source code them website. Examples classified mode used: Loop Mode Once Mode Triggered Mode each mode category there examples both sequential simultaneous sampling methods.
Tell Whether Example Works
Each sample lights when input channel high (+3.3V) turns when input channel (ground). directly jumper +3.3V ground each input EVM's switches (GP1, GP2, Run/Stop Switch). switches normally high; depressing them will bring input turn LED. Run/Stop switch bring input high depending state. three switches available from Connector 56F807 EVM. assignments ADC-A (J9) ADC-B (J12) are:
+3.3VA AN10 AN11 AN12 AN13 AN14 AN15 +3.3VA
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Programming Examples
assignments interest Port (J23) are:
+3.3V
3.1.1 Loop Mode Examples
Sequential Loop test case "Sequential Loop" demonstrates operation using driver `loop sequential' mode. this mode, sample cycle runs continually asynchronously from application code which reads samples. interrupts function callbacks used. primitive ioctl used read samples instead read. Analog input pins used. Simultaneous Loop test case "Simultaneous Loop" demonstrates operation using driver `loop simultaneous' mode. this mode, sample cycle runs continually asynchronously from application code which reads samples. interrupts function callbacks used. primitive ioctl used read samples instead read. Analog input pins simultaneously sampled.
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3.1.2 Once Mode Examples
Once Simultaneous This test case demonstrates operation using driver `once simultaneous' mode this mode sample cycle started with explicit START command. interrupt signals cycle boolean flag ScanComplete. Samples read when ScanComplete true. Analog input pins simultaneously sampled. Simultaneous Once Pair This example provides simultaneous samples different signal pairs. sample cycle started with explicit START command. interrupt signals cycle boolean flag ScanComplete. Samples read when ScanComplete true. Analog input pins AN0/AN4 AN2/AN5 simultaneously sampled. Simultaneous Once Different Pair reprise previous example using different input signals. Sequential Once Three Channel This example provides sequential sampling three input pins: AN0, green, yellow, LEDs show state each input pin.
3.1.3 Triggered Mode Examples
Simultaneous Triggered This test case demonstrates operation using driver `triggered simultaneous' mode. this mode, Quad Timer drives SYNC pulse rate order demonstrate basic operation triggered simultaneous mode. driver callback (interrupt service routine, ISR) used call function which reads samples after each scan. while(1) loop main program merely monitors state sampled values global variables shared with ISR. Analog input pins used.
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Sequential Triggered Three Channels variation previous case, where three input pins (AN0, sampled sequentially. Simultaneous Sequential Triggered Simultaneous samples taken from ADC-A while sequential samples taken from ADC-B. different ISRs (one each ADC) used read data into global variables after each scan. Input pins sampled ADC-A input sampled ADC-B. Simultaneous Triggered This test case demonstrates operation using `triggered simultaneous' mode running sampling period. structure this test case very much like Simultaneous Triggered test case, however changes have been made improve performance:
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Running from Flash instead External Increasing clock rate (PLL_MUL) from Using superfast written Assembly read samples Using level driver calls (not strictly necessary, does reduce memory footprint) Moving constant data into Flash using appconst.c (good programming practice) Changing clock divisor from (please examine appconfig.h parameters)
Sequential Triggered With Average This example shows oversample input channel scan rate, averaging eight samples reduce noise. triggered clock period. Input sampled. Simultaneous Triggered With Average This example variant Simultaneous Triggered case. Here, four samples taken each input signal simultaneous signal pair samples averaged assembly produce single pair output signals teach scan. triggered clock period (1000 sample rate). Input pins AN0/AN4 used.
Suitability Other EVMs
3.2.1 56F805
Only "3-Simultaneous Sequential Triggered" project requires ADCs EVM, others easily ported 56F805 EVMs just moving appconfig.h, appconst.c main.c equivalent) into 56F805 stationary project. assignments ADC-A (J9) Port (J4) are:
+3.3VA Switch +3.3VA
3.2.2 56F803
Since these projects more than LED, difficult them 56F803 EVMs because there only (green).
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Deeper Look
File config.c config.h
interested driver implemented should look these files:
Table Driver Support Files
Comments Definition buffer space each input channel based INCLUDE_ADC?_SAMPLE_N tokens. Defines default static configurations INCLUDE_ADC defined (cleans after appconfig.h). Sets ISRs callbacks. user does statically install ISRs vector table then takes care this within context SDK. callbacks defined then config.h also provides extern declarations callback routines that they seen during link. Builds Samle Disable Register (ADSDIS) from defined INCLUDE_ADC?_SAMPLE_N tokens found appconfig.h. Creates array data structures used control each open channel. Declares data structures extern that they available outside const.c source file. Provides typedefs defines needed driver software. Defines typedef structure arch_sADC that provides structure that mimics memory peripheral registers.
const.c
const.h adc.h arch.h
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Other files that support ADC: \bsp\adcdrv.h, \bsp\adcdrv.c, \bsp\adcdrvIO.h, \bsp\adcdrvIO.h
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola Stylized Logo registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
MOTOROLA Stylized Logo registered Patent Trademark Office. other product service names property their respective owners. Motorola, Inc. 2002. reach USA/EUROPE/Locations Listed: Motorola Literature Distribution; P.O. 5405, Denver, Colorado 80217. 1-303-675-2140 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu. Minato-ku, Tokyo 106-8573 Japan. 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, King Street, Industrial Estate, N.T., Hong Kong. 852-26668334 Technical Information Center: 1-800-521-6274 HOME PAGE:
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AN1940/D

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