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ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
FEATURES
differential 3.3V LVPECL output Crystal oscillator interface designed 18pF parallel resonant crystals frequency range: 580MHz 700MHz phase jitter @312.5MHz (1.875MHz 20MHz): 0.5ps (typical) 3.3V operating supply 70°C ambient operating temperature Industrial temperature information available upon request
GENERAL DESCRIPTION
ICS843031 Gigabit Ethernet Clock Generator member HiPerClocksHiPerClockSfamily high performance devices from ICS. ICS843031 synthesize Gigabit Ethernet, SONET, Serial reference clock frequencies with appropriate choice crystal output divider. ICS843031 excellent phase jitter performance packaged small 8-pin TSSOP, making ideal systems with limited board space.
FREQUENCY TABLE
Inputs Crystal Frequency (MHz) 25.92 26.04166 26.5625 Ratio (Multiplier) Output Frequency (MHz) 311.04 312.5 318.75
BLOCK DIAGRAM
ASSIGNMENT
XTAL_OUT XTAL_IN
XTAL_IN
XTAL-OUT
Phase Detector
ICS843031
8-Lead TSSOP 4.40mm 3.0mm 0.925mm package body Package View
(fixed)
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843031AG REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Type Power Input Power Input Pullup Description Core supply pin. ystal oscillator interface. XTAL_IN input, XTAL_OUT output. Negative supply pin. Output enable pin. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels.
TABLE DESCRIPTIONS
Number Name XTAL_OUT, XTAL_IN nQ0,
Output
NOTE: Pullup refers internal input resistors. Table Characterristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLUP Parameter Input Capacitance Input Pullup Resistor Test Conditions Minimum Typical Maximum Units
843031AG
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
4.6V -0.5V 0.5V 50mA 100mA 101.7°C/W mps) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Storage Temperature, TSTG
TABLE POWER SUPPLY CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol Parameter Core Supply Voltage Power Supply Current Test Conditions Minimum 3.135 Typical Maximum 3.465 Units
TABLE LVCMOS/LVTTL CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol Parameter Input High Voltage Input Voltage Input High Current Input Current 3.465V 3.465V, -150 Test Conditions Minimum -0.3 Typical Maximum Units
TABLE LVPECL CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions Minimum Typical Maximum Units
NOTE Outputs terminated with
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Test Conditions Minimum Typical Fundamental Maximum Units
TABLE CHARACTERISTICS, 3.3V±5%, TA=0°C 70°C
Symbol fOUT Parameter Output Frequency Phase Jitter (Random); NOTE Output Rise/Fall Time Test Conditions Integration Range: 1.875MHz 20MHz Minimum Typical 312.5 Maximum Units
REV. NOVEMBER 2004
Output Duty Cycle NOTE Please refer Phase Noise Plot.
843031AG
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
TYPICAL PHASE NOISE 312.5MHZ
Gigabit Ethernet Filter
312.5MHz
Phase Jitter (Random) 1.875Mhz 20MHz 0.50ps (typical)
NOISE POWER
-100
Phase Noise Data
-110 -120 -130 -140 -150 -160 -170 -180 -190
Phase Noise Result adding Gigabit Ethernet Filter data
100k 100M
OFFSET FREQUENCY (HZ)
843031AG
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
Phase Noise Plot
LVPECL
Offset Frequency
-1.3V 0.165V
Jitter Area Under Offset Frequency Markers
3.3V OUTPUT LOAD TEST CIRCUIT
PHASE JITTER
Pulse Width
PERIOD
Noise Power
SCOPE
Clock Outputs
PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
843031AG
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR APPLICATION INFORMATION
CRYSTAL INPUT INTERFACE
ICS843031 been characterized with 18pF parallel resonant crystals. capacitor values, shown Figure below were determined using 26.04167MHz, 18pF parallel resonant crystal were chosen minimize error. optimum values slightly adjusted different board layouts.
XTAL_OUT
18pF Parallel stal
XTAL_IN
Figure CRYSTAL INPUt INTERFACE
TERMINATION 3.3V LVPECL OUTPUT
clock layout topology shown below typical termination LVPECL outputs. different layouts mentioned recommended only guidelines. FOUT nFOUT impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors current path ground) current sources must used functionality. These outputs designed drive transmission lines.Matched impedance techniques should used maximize operating frequency minimize signal distortion. Figures show different layouts which recommended only guidelines. Other suitable clock layouts exist would recommended that board designers simulate guarantee compatibility across printed circuit clock component process variations.
3.3V
FOUT
FOUT
((VOH VOL) (VCC
FIGURE LVPECL OUTPUT TERMINATION
843031AG
FIGURE LVPECL OUTPUT TERMINATION
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR POWER CONSIDERATIONS
This section provides information power dissipation junction temperature ICS843031. Equations example calculations also provided.
Power Dissipation. total power dissipation ICS843031 core power plus power dissipated load(s). following power dissipation 3.3V 3.465V, which gives worst case results. NOTE: Please refer Section details calculating power dissipated load.
Power (core)MAX VCC_MAX IEE_TYP 3.465V 65mA 225.2mW Power (outputs)MAX 30mW/Loaded Output pair
Total Power_MAX (3.465V, with outputs switching) 225.2mW 30mW 255.2mW
Junction Temperature. Junction temperature, temperature junction bond wire bond directly affects reliability device. maximum recommended junction temperature HiPerClockSdevices 125°C.
equation follows: Pd_total Junction Temperature Junction-to-Ambient Thermal Resistance Pd_total Total Device Power Dissipation (example calculation section above) Ambient Temperature order calculate junction temperature, appropriate junction-to-ambient thermal resistance must used. Assuming moderate flow meter second multi-layer board, appropriate value 90.5°C/W Table below. Therefore, ambient temperature 70°C with outputs switching 70°C 0.255W 90.5°C/W 93.1°C. This well below limit 125°C. This calculation only example. will obviously vary depending number loaded outputs, supply voltage, flow, type board (single layer multi-layer).
TABLE THERMAL RESISTANCE
8-PIN TSSOP, FORCED CONVECTION
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 101.7°C/W
90.5°C/W
89.8°C/W
843031AG
REV. NOVEMBER 2004
Calculations Equations. purpose this section derive power dissipated into load. LVPECL output driver circuit termination shown Figure
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
VOUT
FIGURE LVPECL DRIVER CIRCUIT
TERMINATION
calculate worst case power dissipation into load, following equations which assume load, termination voltage
logic high, VOUT
CCO_MAX
OH_MAX
CC_MAX
0.9V
OH_MAX
0.9V 1.7V
logic low, VOUT
CCO_MAX
OL_MAX
CC_MAX
OL_MAX
1.7V
Pd_H power dissipation when output drives high. Pd_L power dissipation when output drives low. Pd_H
OH_MAX
CC_MAX
2V))/R
CC_MAX
OH_MAX
[(2V
CC_MAX
OH_MAX
))/R
CC_MAX
OH_MAX
[(2V 0.9V)/50] 0.9V 19.8mW
Pd_L
OL_MAX
CC_MAX
2V))/R
CC_MAX
OL_MAX
[(2V
CC_MAX
OL_MAX
))/R
CC_MAX
OL_MAX
[(2V 1.7V)/50] 1.7V 10.2mW Total Power Dissipation output pair Pd_H Pd_L 30mW
843031AG
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR RELIABILITY INFORMATION
TABLE
JAVS. FLOW TABLE LEAD TSSOP
Velocity (Meters Second)
90.5°C/W
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
TRANSISTOR COUNT
transistor count ICS843031 2360
843031AG
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
LEAD TSSOP
PACKAGE OUTLINE SUFFIX
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication MO-153
843031AG
REV. NOVEMBER 2004
ICS843031
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Marking 3031A 3031A Package lead TSSOP lead TSSOP Tape Reel Count tube 2500 Temperature 70°C 70°C
TABLE ORDERING INFORMATION
Part/Order Number ICS843031AG ICS843031AGT
aforementioned trademarks, HiPerClockSand FemtoClocksare trademark Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843031AG
REV. NOVEMBER 2004

FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR FEATURES di

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