Semiconductor MSC1200-xx/1200V-xx This version: Nov. 1997 MSC1200
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E2C0016-27-Y4
Semiconductor MSC1200-xx/1200V-xx
This version: Nov. 1997 MSC1200-xx/1200V-xx Previous version: Jul. 1996
30-Bit Duplex Controller/Driver with Digital/Analog Dimming Keyscan Functions
GENERAL DESCRIPTION
MSC1200-xx/1200V-xx Bi-CMOS display driver 1/2-duty vacuum fluorescent display tube. This device consists 64-bit shift register, latches, analog dimming circuit, digital dimming circuit, keyscan circuit, drivers. interface with microcomputer done only with four signal lines (CS, DATA I/O, CLOCK, INT). Also, DATA CLOCK signal lines shared with other peripherals using chip select function. Also available MSC1200-01/1200V-01, model with general purpose code "-01". Products with custom code manufactured according customer orders.
FEATURES
Power supply voltage (built-in regulator logic) Operating temperature range -40°C +85°C 30-segment driver outputs (IOH -6mA 0.8V) Built-in analog dimming circuit (PWM: 12.5% 6-bit resolution) Built-in digital dimming circuit (11-bit resolution) Built-in keyscan circuit Built-in oscillation circuit (external Built-in power-on-reset circuit. Shift register outputs segment outputs arbitrary. 32-bit that programmable mask option built product name differs depending bonding option selected: OUT/BLANK MSC1200-xx DATA MSC1200V-xx Package 56-pin plastic (QFP56-P-910-0.65-2K) (Product name: indicates code number.
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MSC1200-xx/1200V-xx
BLOCK DIAGRAM
SEG1 Regulator &POR Segment Drivers Grid Driver SEG30 GRID1 GRID2
Matrix)
TEST1
Multiplexer
Latch
Mode Selector
OSC0 OSC1
64-Bit Shift Register
DATA (Optional)
Timing Generator
VPARK VDIM
Analog Dimming Selector Digital Dimming OUT/ BLANK (Optional)
DATAI/O CLOCK
Control Circuit
Keyscan Circuit
COLUMN
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MSC1200-xx/1200V-xx
INPUT OUTPUT CONFIGURATION
Schematic Diagrams Logic Portion Input Circuit
Reg.)
INPUT
Schematic Diagrams Logic Portion Input Schematic Diagrams Logic Portion Input/ Circuit Output Circuit
TEST1 COLn Reg.)
Reg.)
Reg.)
DATAI/O
Schematic Diagrams Logic Portion Output Schematic Diagrams Driver Output Circuit Circuit
Reg.) Reg.)
OUTPUT
OUTPUT
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CONFIGURATION (TOP VIEW)
SEG30 SEG29 GRID2 GRID1
VPARK VDIM
CLOCK DATA TEST1
COLUMN0 COLUMN1 COLUMN2 COLUMN3 COLUMN4
Bonding option (DATA OUT/BLANK
MSC1200-xx/1200V-xx
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21 SEG4
SEG20
SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6
COLUMN5
ROW0
ROW1
ROW2
ROW3
ROW4
OSC0
OSC1
SEG1
SEG2
SEG3
56-Pin Plastic
SEG5
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MSC1200-xx/1200V-xx
DESCRIPTIONS
Symbol VPARK Type Power Supply Day/night switching pin. When high level input, enters night mode value determined analog digital dimming circuit used output duty. When level input, enters mode output duty about 100%. Analog voltage input determining analog dimming value. When analog dimming circuit used, output duty determined analog voltage input this pin. When only digital dimming circuit used, pull down this GND. Chip select input. Only when high level input this pin, interfacing with microcomputer available through "CLOCK" "DATA I/O" pins. Therefore, signal lines "CLOCK" "DATA I/O" shared with other peripherals. Serial clock input. Data input-output through "DATA I/O" rising edge serial clock. Serial data input-output. This enters output mode only when keyscan mode selected. enters input mode when other mode selected. Interrupt signal output microcomputer. When pressed released, scanning started. After completion cycle, this goes high level keeps high level until keyscan stop mode selected. Test signal input. this built-in pull-up resistor, must left open pulled normal operation mode. When level input this pin, SEG1-30 high level, GRID1 GRID2 level. (All segments on.) Serial data output. Selecting this specifies MSC1200V-xx. data from DATA shifted rising edge shift clock with delay bits shift register. This used connecting with driver series. When VPARK high level, pulse with duty ratio determined analog digital dimming circuit output through this pin. When this level, pulse with duty ratio determined external circuit input this pin. This internal active pull-up resistor, which becomes active only when VPARK level. When VPARK level, this receives blanking signal from external circuits, that output duty cycle controlled. Selecting this specifies MSC1200-xx. Description
VDIM
CLOCK DATA
TEST1
DATA (Option)
OUT/ BLANK (Option)
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MSC1200-xx/1200V-xx
10-15
Symbol COLUMN
Type
Description Return inputs from matrix switch. pull-up resistor internally connected each these pins that they high level except when level input depression key. These pins active. switch scanning outputs. Normally level output through these pins. When depressed released, keyscanning started continued until keyscan stop mode selected. When keyscan stop mode selected then keyscanning stopped, outputs ROW0-4 back level. Ground Connecting pins oscillation circuit. Connect resistor between OSC1 OSC0, capacitor between OSC0 ground. Segment signal output. Signals driving display tube output through these pins. Grid signal output. Signals driving display tube output through these pins. Signals inverted with respect grid signals output. Normally, these pins connected external grid driver (PNP transistor etc.) inputs.
16-20
ROW0-4
24-48, 50-54
OSC0 OSC1 SEG1-30
GRID1,2
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MSC1200-xx/1200V-xx
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Input Voltage Storage Temperature Power Dissipation Symbol VIN1 VIN2 TSTG Condition inputs except VPARK VPARK 85°C Rating -0.3 -0.3 -0.3 +0.3 +150 Unit
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage High Level Input Voltage High Level Input Voltage High Level Input Voltage Level Input Voltage Level Input Voltage Clock Frequency Frequency Frame Frequency Operating Temperature Symbol VIH1 VIH2 VIH3 VIL1 VIL2 fOSC Condition inputs except VPARK OSC0 VPARK OSC0 inputs except OSC0 OSC0 4.7kW, C=10pF fOSC=3MHz Min. Typ. Max. Unit
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MSC1200-xx/1200V-xx
ELECTRICAL CHARACTERISTICS
Characteristics
+85°C, 18V) Parameter High Level Input Voltage High Level Input Voltage High Level Input Voltage Level Input Voltage Level Input Voltage High Level Input Current High Level Input Current High Level Input Current Level Input Current Level Input Current Level Input Current Input Leakage Current Symbol VIH1 VIH2 VIH3 VIL1 VIL2 IIH1 IIH2 IIH3 IIL1 IIL2 IIL3 VOH1 VOH2-1 VOH2-2 VOL1-1 Level Output Voltage Level Output Voltage Power Supply Current VOL1-2 VOL1-3 VOL2 Condition VIH1 5.0V VIH2 5.0V VIH3 5.0V VIL1 VIL2 VIL3 5.5V 9.5V, IOH1 -6mA 9.5V, IOH2 -200mA 9.5V, Output Open 9.5V, IOL1-1 500mA 9.5V, IOL1-2 200mA 9.5V, IOL1-3 9.5V, IOL2 200mA fOSC 3.3MHz, load Min. -160 -0.6 -0.8 Max. Unit
High Level Output Voltage High Level Output Voltage
Applicable input pins (except VPARK OSC0 pins) Applicable OSC0 Applicable CLOCK, DATA I/O, VPARK pins Applicable COLUMN0 COLUMN5 OUT/BLANK pins Applicable TEST1 Applicable VDIM Applicable SEG1 SEG30, GRID1, GRID2 pins Applicable ROW0 ROW4, DATA I/O, PWMOUT/BLANK DATAOUT, pins. Applicable VPARK Applicable input pins (except OSC0)
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Semiconductor Characteristics
MSC1200-xx/1200V-xx
+85°C, 18V) Parameter Oscillation Frequency Input Frequency OSC0 from Outside Frame Frequency Frequency Clock Frequency Clock Pulse Width Data Setup Time Data Hold Time Pulse Width Time Setup Time Clock Time Hold Time Clock Time Data Output Delay Clock Data output Time GRID Output Delay from Slew Rate (All Drivers) Time Power-on Hold Time Power-off Rise Time Power-on Symbol fOSC fOSCI fPWM tCSW tCSL tCSH tCSH tODS tPCS tPOF tPRZ Condition 4.7kW±1%, 10pF±5% External input only 100pF 100pF, When mounted unit VDD=0.0V When mounted unit Min. Max. 4.66 Unit
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MSC1200-xx/1200V-xx
Dimming Characteristics characteristics
+85°C, 18V) Parameter Output Voltage Error Reference Voltage Accuracy Condition Note Min. Typ. Max. Unit
Note:
Reference voltage 6.6V typical.
Keyscan Characteristics
+85°C, 18V) Parameter Keyscan Cycle Time Keyscan Pulse Width Condition fOSC=3.3 fOSC=3.3 Min. Typ. Max. Unit
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MSC1200-xx/1200V-xx
TIMING DIAGRAM
tCSW tCSL
3.8V 0.8V tCSS CLOCK 3.8V 0.8V 3.8V DATA (INPUT) 0.8V VALID VALID
tCSH
Figure Data Input Timing
3.8V 0.8V tCSS tCSH
CLOCK
3.8V 0.8V
DATA 3.8V (OUTPUT) DATA 0.8V
Figure Data Output Timing
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MSC1200-xx/1200V-xx
TIMING DIAGRAM (Continued)
tPCS tPOF tPRZ
3.8V 0.8V
Figure Power-On Timing
tCSW
3.8V 0.8V tODS tODS
SEG1-30 GRID1,
Figure GRID Output Timing
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MSC1200-xx/1200V-xx
FUNCTIONAL DESCRIPTION
Power-on Reset initialized built-in power-on reset circuit power-on. status internal circuit after initialization follows; Shift registers latches reset. Analog dimming selected. Digital dimming data register reset. Display data input mode selected. Data Input Data input valid only when high level applied "CS" pin. Input data input into shift register through "DATA I/O" rising edge CLOCK. data automatically loaded latches falling edge "CS" signal. [Data Format] Display Data Input Mode Input data bits display data bits Mode select data bits
First Display Data bits) Display Data bits)
Mode Data bits)
Correspondence between segment outputs shift register bits correspondence differs depending code. This table shows example when using product with general purpose code "-01". changing code, segment output position changed correspondence cannot changed.
SEGn GRID1 GRID2
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Semiconductor Digital Dimming Data Input Mode Input data bits Digital dimming data bits Mode select data bits
MSC1200-xx/1200V-xx
First
Dimming Data
Mode Data
(MSB)
INPUT DATA
(LSB)
DUTY CYCLE 0/2048 1/2048 2032/2048 2032/2048
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Semiconductor Function Mode
Mode Display Data Input Analog Dimming Select Digital Dimming Select
MSC1200-xx/1200V-xx
Function
Digital Dimming Data Input Digital Dimming Select Keyscan Data Output Display Data Input Keyscan Data Output Display Data Input Analog Dimming Select Display Data Input Digital Dimming Select Keyscan Data Output Keyscan Stop Keyscan STOP
Note: Other combinations used test modes.
Analog Dimming Mode Analog dimming automatically selected when VPARK high level after power-on. Therefore, when digital dimming used, mode setting required before VPARK high level. output duty ratio analog dimming 12.5% maximum. correspondence between threshold voltage output duty ratio programmed mask. table given later model, showing correspondence between threshold dimming voltage pulse width modulation (PWM) duty cycle when using product with general purpose code "-01". Note following when setting analog dimming with general purpose code: number steps when output duty ratio maximum 12.5%. setting value threshold voltage (input voltage VDIM) must exceed voltage greater than input, operate normally. setting voltage each step ranges from 20mV 150mV. However, only step different range 20mV
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MSC1200-xx/1200V-xx
Setting Voltage
Analog Input Voltage (VDIM) (variable) Setting Value: 20mV 150mV Must exceed Setting Value: 20mV
Pulse Step Number
Output Duty Time 16/2048=0.78 17/2048=0.83
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Semiconductor Keyscan
MSC1200-xx/1200V-xx
Keyscanning started only when depression release detected order minimize noise caused scanning signal. Then, keyscanning continued until keyscan stop mode signal sent from microcomputer. goes high level completion 1-cycle scanning after keyscan start, (high level) signal sent from used interrupt signal. [Keyscan Timing]
Cycle
Depress/Release
Keyscan stop mode selected.
Note: Keyscanning cannot stopped selecting keyscan stop mode only once keyscanning started after depression release detected, then depressed released again before keyscan stop mode selected. stop keyscanning, required select keyscan stop mode once again.
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Semiconductor [Example] When Input Status Changed
Depress Release
MSC1200-xx/1200V-xx
Keyscan
Keyscan stop
Keyscan
Keyscan stop
Keyscan stop
Keyscan data output Keyscan stop
Keyscan data output
When Input Status Changed before Keyscan Stop Mode Select
Depress
Release
Keyscan Keyscan Keyscan Stop
Keyscan stop
Keyscan data output Keyscan stop
Keyscan data output
Keyscanning resumes after short period keyscan stop.
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Semiconductor Keyscan Data Output
MSC1200-xx/1200V-xx
When keyscan data output mode selected, "DATA I/O" changed output mode. Then, bits keyscan data come from "DATA I/O" synchronizing with rising edge clock. After completion bits data output, returns display data input mode synchronizing with falling edge [Data Format] Keyscan Data Stop Mode Since DATA goes output mode after keyscan stop mode signal received, sure output keyscan data. Input data bits Mode select data bits
First
Mode Data
Keyscan Data Output Mode Input data bits Output data bits
CLOCK First Keyscan Data
COLUMN switch matrix COLUMN input output
ROW0 ROW1 ROW2 ROW3 ROW4 COLUMN0 COLUMN1 COLUMN2 COLUMN3 COLUMN4 COLUMN5
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MSC1200-xx/1200V-xx
GRID/SEG Driver Operation Digital/Analog Dimming Operation Figure shows output timing GRID driver when VPARK level. Figure shows output timing GRID drivers digital diming mode operation. Figure shows output timing GRID drivers analog dimming mode operation.
Frame 4096 times GRID1 times GRID2 2032 times times
SEG1-30 2038 times times
Figure GRID Output Timing (VPARK="H") Note: time TOSC (4/fOSC) 1.2ms (typ.)
Frame 4096 times
GRID1
times GRID2 2032 times times
SEG1-30 2038 times times
Figure GRID Output Timing (Digital Dimming Mode) Notes: Shown above timing digital dimming mode with duty cycle 2032/ 2048 VPARK "L". length time that grids segments turned specified with respect bits ditigal dimming data. time TOSC (4/fOSC) 1.2ms (typ.) 20/26
MSC1200-xx/1200V-xx
Frame 4096 times GRID1
2048 times GRID2 Max. times
SEG1-30
Figure GRID Output Timing (Analog Dimming Mode) Notes: Shown above timing GRID Drivers analog dimming mode VPARK "L". time TOSC (4/fOSC) 1.2ms (typ.)
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Semiconductor Code Table
MSC1200-01 MSC1200V-01
MSC1200-xx/1200V-xx
NAME SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10
BIT10, BIT11, BIT12, BIT13, BIT14, BIT15, BIT16, BIT17, BIT18, BIT19, BIT20, BIT21, BIT22, BIT23, BIT24, BIT25, BIT26, BIT27, BIT28, BIT29, BIT30,
OUTPUT
NAME SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20
OUTPUT
NAME SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30
OUTPUT
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MSC1200-xx/1200V-xx
VDIM Threshold Dimming Voltage Duty Cycle (Typical Value)
Duty Cycle Pulse Count 256/2048 240/2048 224/2048 208/2048 192/2048 184/2048 176/2048 168/2048 160/2048 152/2048 144/2048 136/2048 128/2048 120/2048 112/2048 104/2048 96/2048 92/2048 88/2048 84/2048 80/2048 76/2048 72/2048 68/2048 64/2048 60/2048 12.5 11.7 10.9 10.2 9.38 8.98 8.59 8.20 7.81 7.42 7.03 6.64 6.25 5.86 5.47 5.08 4.69 4.49 4.30 4.10 3.91 3.71 3.52 3.32 3.13 2.93 Threshold Pulse Step Duty Cycle Voltage Number Pulse Count Vref 56/2048 2.73 4.200 52/2048 2.54 4.130 48/2048 2.34 4.070 46/2048 2.25 4.000 44/2048 2.15 3.930 42/2048 2.05 3.890 40/2048 1.95 3.850 38/2048 1.86 3.810 36/2048 1.76 3.770 1.66 34/2048 3.725 1.56 32/2048 3.680 1.46 30/2048 3.625 28/2048 1.37 3.580 26/2048 1.27 3.525 24/2048 1.17 3.460 23/2048 1.12 3.400 22/2048 1.07 3.340 21/2048 1.03 3.305 20/2048 0.98 3.270 19/2048 0.93 3.240 18/2048 0.88 3.200 17/2048 0.83 3.160 16/2048 0.78 3.120 15/2048 0.73 3.080 14/2048 0.68 3.040 13/2048 0.63 2.93 VDD=12.8V Threshold Voltage 3.000 2.950 2.900 2.850 2.820 2.800 2.770 2.740 2.710 2.680 2.650 2.615 2.580 2.540 2.500 2.470 2.450 2.430 2.410 2.390 2.370 2.340 2.320 2.295 2.270 2.245 0.000
Pulse Step Number
Note: threshold voltage more than cannot set.
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MSC1200-xx/1200V-xx
APPLICATION CIRCUITS
Digital Dimming
1/2-Duty Display Tube
Driver SEG1 SEG30 COLUMN5 COLUMN4 COLUMN3 COLUMN2 COLUMN1 COLUMN0 MSC1200-xx ROW0 ROW1 ROW2 ROW3 VPARK VDIM ROW4 Keyboard
Microcomputer
DATAI/O CLOCK OSC1
Luminance Control Small Parking Resistor Lamp
OSC0
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MSC1200-xx/1200V-xx
Analog Dimming
1/2-Duty Display Tube
Driver SEG1 SEG30 COLUMN5 COLUMN4 COLUMN3 COLUMN2 COLUMN1 COLUMN0 MSC1200-xx ROW0 ROW1 ROW2 ROW3 VPARK VDIM Dashboard Lamp setting voltage must exceed ROW4 Keyboard
Microcomputer
DATAI/O CLOCK OSC1
Small Parking Lamp
OSC0
Luminance Control Resistor
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MSC1200-xx/1200V-xx
PACKAGE DIMENSIONS
(Unit
QFP56-P-910-0.65-2K
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 0.43 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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