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10-bit Gsps With DMUX AT84AS003 Summary Performances Full-po
Top Searches for this datasheet10-bit Resolution Gsps Sampling Rate Selectable Demultiplexed Output mVpp Differential Single-ended Analog Input Differential Single-ended Clock input LVDS Output Compatibility Functions: Gain Adjust Sampling Delay Adjust Demultiplexed Simultaneous Staggered Digital Outputs Data Ready Output with Asynchronous Reset Out-of-range Output (11th Bit) Power Consumption 6.5W Power Supplies: -5V, -2.2V, 3.3V VPLUSD Output Power Supply Package Cavity Down EBGA (Enhanced Ball Grid Array) Overall Dimensions 10-bit Gsps With DMUX AT84AS003 Summary Performances Full-power Analog Input Bandwidth ±0.4 Gain Flatness from Single-tone Performance Gsps, Full Nyquist Zone ENOB Effective Bits, SFDR dBFS, Fin1 MHz, Fin2 MHz: IMD3 dBFS Fin1 1244 MHz, Fin2 1255 MHz: IMD3 dBFS Dual-tone Performance (IMD3) Gsps dBFS each tone) Screening Temperature Range: 0°C; 90°C (Commercial Grade) -20°C; 110°C (Industrial Grade) Applications Direct Down Conversion Ultra Wide Band Satellite Receivers Radars Countermeasures High-speed Acquisition Systems High Energy Physics Automatic Test Equipment Description AT84AS003 combines 10-bit Gsps analog-to-digital converter with DMUX, designed accurate digitization broadband signals. features Effective Number Bits (ENOB) dBFS Spurious Free Dynamic Range (SFDR) Gsps over full first Nyquist zone. 5403AS-BDC-10/04 This summary document. complete document available this time. more information, please contact your local Atmel sales office. demultiplexed digital outputs LVDS logic compatible, allowing easy interfacing with standard FPGAs DSPs .The AT84AS003 operates Gsps, without additional tuning synchronization between DMUX. AT84AS003 comes EBGA317 package. This package same boards, offering excellent reliability when subjected large thermal variations. Figure Block Diagram BIST ASYNRST PGEB DRRB CLK/CLKN Port AOR/AORN Port BOR/BORN Port COR/CORN Port DOR/DORN DR/DRN LVDS Buffers Logic Block Quantizer VINN Demultiplexer B/GB SLEEP STAGG DRTYPE AT84AS003 5403AS-BDC-10/04 AT84AS003 Functional Description AT84AS003 10-bit Gsps combined with high-speed demultiplexer (DMUX) used lower LVDS output stream (10-bit data out-of range bit) factor works fully differential mode from analog input digital outputs. provides on-chip differential termination clock input. analog input mVpp differential input impedance. reverse terminations required analog input. They should placed close possible EBGA package input pins maximum). output clock output data LVDS compatible (100 differentially terminated). AT84AS003 features asynchronous resets: DRRB, which ensures that first digitized data corresponds first acquisition ASYNCRST, which initializes DMUX gain control used finely adjust gain unity gain. control B/GB provided select either binary gray data output format. Sampling Delay Adjust function (SDA, activated SDAEN signal) used fine-tune aperture delay approximately around nominal value. This function useful when interleaving multiple ADCs. control B/GB provided select either binary Gray data output format. tunable delay cell (controlled CLKDACTRL) integrated between DMUX clock path fine-tune data according clock alignment interface between DMUX. This delay tuned from -250 around default center value, featuring typical tuning range. tuning should necessary operating frequencies Gsps. extra stand-alone delay cell also provided. controlled analog DACTRL control input activated DAEN. tuning range typically pattern generator (PGEB) integrated block debugging purposes acquisition setup. Similarly, Built-in Self Test (BIST) provided quick debug DMUX block. demultiplexer ratio selected using (1:2 ratio). modes output clock (via DRTYPE) selectable: mode: only output clock's rising egde active, output clock rate same output data rate DR/2 mode: both output clock's rising falling edges active, output clock rate half output data rate Staggered: even bits output with half data period delay Simultaneous: even bits output same time AT84AS003's data output different modes: sleep mode provided lower power consumption DMUX block. junction temperature monitoring also provided facilitate management junction temperature, sensing voltage drop across diodes implemented DMUX respectively, close chip's point. AT84AS003 delivered Enhanced Ball Grid Array (EBGA). TCE, which similar that material, makes highly suitable applications exposed large thermal variations. 5403AS-BDC-10/04 Table Description Functions Name VCCA VCCD VMINUSD VPLUSD AGND DGND CLK, CLKN VIN, VINN DRRB ASYNCRST DR/DRN A0.A9 A0N.A9N AOR, AORN B0.B9 B0N.B9N BOR, BORN C0.C9 C0N.C9N COR, CORN D0.D9 D0N.D9N Function Analog 3.3VV power supply Digital 3.3V power supply Analog power supply Digital -2.2V power supply Output power supply Analog ground Digital ground Input clock signals Analog input data reset DMUX asynchronous reset Output clock signals Output data port Additional output port Output data port Additional output port Output data port Additional output port Output data port Name DOR, DORN CLKDACTRL DACTRL DAEN DAI, DAIN DAO, DAON SDAEN PGEB B/GB SLEEP STAGG CLKTYPE DRTYPE BIST DIODE DIODE DMUX Function Additional output port DMUX ratio selection signal Control signal clock delay cell Control signal standalone delay cell Enable signal standalone delay cell Input signals standalone delay cell Output signals standalone delay cell gain adjust sampling delay adjust enable pattern generator Binary gray output code selection Sleep mode selection signal Staggered mode selection data outputs Input clock type selection signal Output clock type selection signal Built-in self test Diode junction temperature monitoring (ADC) Diode junction temperature monitoring (DMUX) AT84AS003 5403AS-BDC-10/04 AT84AS003 Figure Device Pinout VCCA VMINUSD VCCD VPLUSD 3.3V -2.2V 3.3V 2.5V AT84AS003 VIN, VINN CLK, CLKN DRRB ASYNCRST SDAEN PGEB B/GB DACTRL CLKDACTRL DAI, DAIN SLEEP STAGG CLKTYPE DAEN BIST DRTYPE [A0.A9] [A0N.A9N] AOR, AORN [B0.B9] [B0N.B9N] BOR, BORN [C0.C9] [C0N.C9N] COR, CORN [D0.D9] [D0N.D9N] DOR, DORN DAO, DAON DIODE DIODE DMUX AGND DGND 5403AS-BDC-10/04 Package Information Figure EBGA Package Outline (Bottom View) AT84AS003 5403AS-BDC-10/04 AT84AS003 Ordering Information Part Number AT84XAS003TP Package EBGA Temperature Range Ambient Commercial 0°C; 90°C Industrial -20°C; 110°C Ambient Screening Prototype Comments Prototype version Please contact your local Atmel sales office AT84AS003CTP AT84AS003VTP AT84AS003TP-EB EBGA EBGA EBGA Standard Standard Prototype Evaluation 5403AS-BDC-10/04 Atmel Corporation 2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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