Semiconductor MSM6722 Semiconductor Pitch Control Speech Signal

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Semiconductor MSM6722 Semiconductor Pitch Control Speech Signal

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E2D0046-39-21
Semiconductor MSM6722
Semiconductor Pitch Control Speech Signal
This version: Feb. 1999 MSM6722 Previous version: May. 1997
GENERAL DESCRIPTION
MSM6722 converts real-time pitch speech signal range octave upward downward. pitch control methods selected. change pitch steps switch inputs, other select steps four binary input lines. Since microphone preamplifier low-pass filter built pitch conversion easily configured connecting microphone, amplifier, speaker peripheral circuit. MSM6722 functionally compared MSM6322, described below.
Speech pitch step reset (UP/DW mode) MSM6322 PRST only MSM6722 PRST available. Change pitch MSM6322 Speech pitch changeable steps.
Pitch step
Pitch step Pitch step
MSM6722 pitch step does change signal input when pitch step
Pitch step
Pitch step Pitch step
Additional THR/CHA This outputs voice signal without passing pitch conversion circuit including
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Semiconductor
MSM6722
FEATURES
Built-in microphone preamplifier Built-in low-pass filters Built-in 8-bit converter Built-in 9-bit converter Speech pitch alterable steps (including pitch change step) Master clock frequency single power supply Package 24-pin plastic (SOP24-P-430-1.27-K) (Product name MSM6722GS-K) Chip
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Semiconductor
MSM6722
BLOCK DIAGRAM
DVDD MOUT LOUT FOUT ADIN VOICE CHANGER CIRCUIT AVDD DGND AGND TEST
AOUT (P3) (P2) (P1) PRST (P0) THR/CHG RESET
TIMING CONTROL
CONFIGURATION (TOP VIEW)
(P3) (P2) (P1) PRST (P0) THR/CHG TEST AOUT ADIN FOUT AVDD
CIRCUIT
DVDD RESET DGND AGND MOUT LOUT
24-Pin Plastic
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Semiconductor
MSM6722
DESCRIPTIONS
Common UP/DOWN Mode BINARY Mode
Symbol DVDD DGND AVDD AGND MOUT LOUT ADIN FOUT AOUT Type between this DGND. Digital ground pin. Analog power supply pin. Insert bypass capacitor 0.1mF more between this AGND. Analog ground pin. Inverting input pins built-in amplifier. non-inverting input connected internally MOUT LOUT output pins built-in amplifier respectively. Input built-in 8-bit converter. Output from built-in LPF. Connect ADIN Pin. Output from built-in LPF. This used output speech signals connect amplifier driving speaker. Output from built-in 9-bit converter. enters initial state when this level. this time, oscillation stops converter output (DAO) audio output (AOUT) fall level. Then returns RESET initial state. built-in power-on-reset circuit. normal power-on reset operation, supply power within msec. power cannot supplied within msec, apply RESET pulse after power switched Select pitch control non-pitch control. THR/CHG With level input, outputs normal speech signal from AOUT through built-in amplifier. With level input, outputs pitch controlled speech signal from AOUT pin. TEST Test fixed level. Crystal oscillator connecting pin. When using external clock, this input. Crystal oscillator connecting pin. When using external clock, this must left OPEN. These pins output reference voltage (signal ground (SG)) analog circuit. output approximately AVDD level. Description Digital power supply pin. Insert bypass capacitor more
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Semiconductor UP/DOWN Mode Only
Symbol PRST Type Description Mode select pin. This must always tied low.
MSM6722
Pins raising lowering pitch step time. pitch changes step upward downward) each time level pulse input DWC) pin. circuit enters pitch change" state when level pulse input these pins simultaneously. Power-down pin. clocks, including internal oscillator circuit, stopped when level. Pitch reset pin. circuit enters pitch change" state when this level.
Binary Mode Only
Symbol Type Description Mode select pin. This must always tied high. pitch step directly pins (bits) (MSB) (LSB). steps from step (P3=P2=P1=P0="L") step 15(P3=P2= P1=P0="H") set.
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Semiconductor
MSM6722
ABSOLUTE MAXIMUM RATINGS
Parameter Power-supply voltage Input voltage Storage temperature Symbol TSTG Condition 25°C 25°C Rating -0.3 +7.0 -0.3 +150 Unit
RECOMMENDED OPERATING CONDITIONS
Parameter Power-supply voltage Operating temperature Master clock frequency Symbol fOSC Condition DGND AGND Range Unit
ELECTRICAL CHARACTERISTICS
Characteristics
+70°C, DVDD AVDD DGND AGND Parameter input voltage input voltage input current input current input current input current input current Symbol IIH1 IIH2 IIH3 IIL1 IIL2 Condition fOSC MHz, load power down, load Operating current consumption Ta=-40 +70°C power down, load Ta=-40 +85°C Unit
Operating current consumption
Applies input pins excluding pin. Applies pin. Applies input pins without pull-down resistors, excluding (i.e., pins 5-7, however applied only during UP/DOWN mode). Applies input pins with pull-down resistors, excluding (i.e., pins however, applied only during BINARY mode).
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Semiconductor Analog Characteristics
MSM6722
+70°C, DVDD AVDD DGND AGND Parameter output relative error output relative error allowable input voltage range input impedance amplifier open loop gain amplifier input impedance amplifier load resistance AOUT load resistance Symbol VDAE VADE VFIN RFIN RINA ROUTA RAOUT Condition load load VDD-1 Unit
Characteristics
+70°C, fOSC MHz, DVDD AVDD DGND AGND Parameter output delay from falling edge Pulse width PRST, UPC, pulses Time between pulses Pitch change delay from rising edge PRST Pitch change delay from rising edge Symbol tPDD tUDPW tRUD tCHG1 tCHG2 Condition fOSC fOSC fOSC fOSC fOSC Unit
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Semiconductor
MSM6722
TIMING DIAGRAM
PD(I)
tPDD
AVDD DAO(O)
tUDPW PRST(I)
tUDPW UPC(I) DWC(I) tCHG1 Pitch change timing Pitch step ("no pitch change" state) PRST tCHG2
tRUD
Raise/lower pitch step (pitch steps
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Semiconductor
MSM6722
FUNCTIONAL DESCRIPTION
Power Supply Wiring shown diagram below, supply power this from same power source, separate wiring analog logic sections. improve electrical characteristics, insert bypass capacitor more between DVDD DGND between AVDD AGND.
DVDD MSM6722 DGND AGND AVDD
supply power analog section logic section from separate power sources; otherwise latch-up occur.
good Analog power supply Digital power supply DVDD AVDD DVDD AVDD good
Connecting Oscillator Connect ceramic crystal oscillators pins shown below. optimal load capacitance values when connecting ceramic oscillators MURATA MFG. KYOCERA CORPORATION shown below reference.
MSM6722
Ceramic oscillator Model name MURATA MFG. CSA4.00MG CST4.00MGW (with capacitor) KBR-4.0MSA KYOCERA CORPORATION KBR-4.0MKS PBRC4.00B Frequency (MHz)
Optimal load capacitance (pF) (pF)
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Semiconductor Analog Input Amplifier Circuit
MSM6722
MSM6722 built-in operational amplifiers amplifying microphone output. Each output amplifier provided with inverting input output pin. analog circuit reference voltage (signal ground) connected internally non-inverting input each output amplifier. amplification, form inverting amplifier circuit adjust amplification ratio using external resistors, shown below.
LOUT
MOUT
amplifier
amplifier
output output amplifier connected input built-in LPF. allowable input voltage (VFIN) ranges from (VDD-1) Therefore, amplification ratio must adjusted that amplitude within allowable input voltage range. example, becomes Vp-p max. exceeds allowable input voltage range, output will clipped waveform. load resistance ROUTA amplifier more. Therefore, feedback resistors inverting amplifier circuit must more.
VDD-1
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Semiconductor Analog Input Amplifer Circuit
MSM6722
output amplifer connected input built-in LPF. allowable input voltage VFIN ranges from (VDD Therefore, amplification factor must adjusted that VFIN amplitude within allowable input voltage range. example, becomes VP-P max. exceeds allowable input voltage range, output will clipped waveform. load resistance ROUTA amplifier more. Therefore, feedback resistors must more. When amplifier used amplifier used, must connected AGND AVDD, MOUT must open. Even amplification unnecessary, amplifier must always used. Below example analog input amplifier circuit when amplification factor
Input signal
(200kW)
(200kW)
AGND MOUT LOUT
amplifier
amplifier
MSM6722
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Semiconductor Configuring pins internal equivalent circuit around pins shown below.
MSM6722
AVDD MSM6722 50kW (TYP)
AGND 50kW (TYP)
amplifier 20kW (TYP) AGND
Power-down signal Switch open during power-down mode AGND
signal reference voltage (signal ground) internal amplifiers LPF. Install capacitor between AGND between AGND respectively order make signal noiseless. recommended install approx. capacitor, which should determined after evaluating tone quality. takes several msec until levels such level analog circuit stabilized after power-down mode cancelled. larger capacitance capacitor connected requires longer time stabilizing. After power-down mode cancelled, enter voices after levels analog circuit been stabilized. When device power-down mode, output voltage becomes unstable. Therefore, must supplied external circuits. Otherwise, power suppluy current leaked internal circuit. Same true pin.
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Semiconductor Pitch-Control Circuit
MSM6722
[BINARY mode] (P3, shown diagram below, this internal prevention circuit approximately chattering Therefore, hold these pins level more. pins used directly pitch steps. Sixteen pitch steps provided, step cannot set. [UP/DOWN mode] (UPC, DWC, PRST) shown diagram below, this internal prevention circuit approximately chattering Therefore, hold these pins level more.
[BINARY mode] Valid data Chattering prevention circuit
pitch register
[UP/DOWN mode] Pulse input PRST Chattering prevention circuit pitch register
Pitch-Control Circuit Inputting level pulse raises pitch step, inputting level pulse lowers pitch step. Inputting level pulse PRST pins same time sets no-pitch change state (pitch step
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Semiconductor
MSM6722
pitch shifts range octave upward downward, centered pitch step pitch shift illustrated following keyboard diagram following table corresponding frequencies. Pitch Conversion Diagram
Pitch Conversion Table
Pitch step sampling cycle (µs)/ frequency (kHz) 60/16.6 71/14.0 76/13.1 80/12.5 90/11.1 90/10.5 101/9.90 113/8.84 120/8.33 127/7.87 143/6.99 151/6.62 160/6.25 180/5.55 190/5.26 202/4.95 227/4.40
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Semiconductor
UP/DOWN Mode
APPLICATION CIRCUITS
PRST
MSM6722
(P3) (P2) (P1) PRST (P0) THR/CHG TEST AOUT ADIN FOUT AVDD DVDD RESET DGND AGND MOUT LOUT
0.47
Speaker drive amplifier MSC1157
MSM6722
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Semiconductor
BINARY Mode
MSM6722
switch (P3) (P2) (P1) PRST (P0) THR/CHG TEST AOUT ADIN FOUT AVDD DVDD RESET DGND AGND MOUT LOUT
0.47
Speaker drive amplifier MSC1157
MSM6722
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Semiconductor
MSM6722
CONFIGURATION
Layout
Chip Size 3.99 3.08 (mm)
Coordinates (Chip center located Y=0.)
name PRST THR/CHG TEST AOUT ADIN FOUT AVDD (um) -1784 -1784 -1784 -1314 -736 -275 1447 1783 1783 1733 (um) -602 -955 -1310 -1391 -1397 -1397 -1397 -1396 -1396 -974 -561 -238 Name LOUT MOUT AGND DGND RESET DVDD (um) 1782 1782 1782 1351 -127 -650 -1198 -1787 -1786 -1736 (um) 1193 1359 1359 1295 1359 1359 1359 1053
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Semiconductor
MSM6722
PACKAGE DIMENSIONS
(Unit
SOP24-P-430-1.27-K
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 0.58 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, TQFP, LQFP, SOJ, (PLCC), SHP, surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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E2Y0002-29-11
NOTICE
information contained herein change without notice owing product and/or technical improvements. Before using product, please make sure that information being referred up-to-date. outline action examples application circuits described herein have been chosen explanation standard action performance product. When planning product, please ensure that external conditions reflected actual circuit, assembly, program designs. When designing your product, please product below specified maximum ratings within specified operating ranges including, limited operating voltage, power dissipation, operating temperature. assumes responsibility liability whatsoever failure unusual unexpected operation resulting from misuse, neglect, improper installation, repair, alteration accident, improper handling, unusual physical electrical stress including, limited exposure parameters beyond specified maximum ratings operation outside specified operating range. Neither indemnity against license third party's industrial intellectual property right, etc. granted connection with product and/or information drawings contained herein. responsibility assumed infringement third party's right which result from thereof. products listed this document intended general electronics equipment commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products authorized system application that requires special enhanced quality reliability characteristics system application where failure such system application result loss damage property, death injury humans. Such applications include, limited traffic automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, life-support systems. Certain products this document need government approval before they exported particular countries. purchaser assumes responsibility determining legality export these products will take appropriate necessary steps their expense these. part contents cotained herein reprinted reproduced without prior permission. MS-DOS registered trademark Microsoft Corporation.
Copyright 1999 Electric Industry Co., Ltd.
Printed Japan

Semiconductor MSM6722 Semiconductor Pitch Control Speech Signal

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