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Order this document DSP56824EVMUM/D Rev. 1.2, 07/99
DSP56824 Evaluation Module Hardware Reference Manual
Motorola, Incorporated Semiconductor Products Sector 6501 William Cannon Drive West Austin 78735-8598
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Copyright Motorola, Inc., 1999. rights reserved. This document contains information product. Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer. other tradenames, trademarks, registered trademarks property their respective owners.
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Table Contents
Chapter Introduction DSP56824EVM Architecture DSP56824EVM Configuration Jumpers DSP56824EVM Connections Chapter Technical Summary 2.9.1 2.9.2 2.10 2.11 2.12 2.13 DSP56824 Program Data Memory EEPROM. UART Voice CODEC Clock Source Operating Mode Debug LEDs. Debug Support 2-10 JTAG Connector. 2-10 Parallel JTAG Interface Connector 2-11 External Interrupts 2-13 Reset. 2-13 Power Supply 2-14 Test Points 2-14 Appendix DSP56824EVM Schematics Appendix DSP56824EVM Bill Material
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Table Contents
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DSP56824 Evaluation Module Hardware Reference Manual
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List Figures
Block Diagram DSP56824EVM. DSP56824EVM Jumper Reference Connecting DSP56824EVM Block Diagram External Memory Interface Block Diagram EEPROM Interface. Block Diagram UART Interface Block Diagram CODEC Interface Block Diagram CODEC Analog Interface Block Diagram Clock Interface Block Diagram Debug Interface 2-10 Block Diagram Parallel JTAG Interface. 2-12 Block Diagram User Interrupt Interface 2-13 Block Diagram RESET Interface 2-13 Block Diagram Power Supply 2-14
2-10 2-11
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List Figures
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DSP56824 Evaluation Module Hardware Reference Manual
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List Tables
DSP56824EVM Default Jumper Options SPI0 EEPROM Enable Connector Description SPI1 UART Enable Connector Description RS-232 Serial Connector Description. CODEC Enable Connector Description. CODEC Input Signal Jumper Selection CODEC Output Signal Jumper Selection CODEC Output Load Jumper Selection Line Input Connector Description Line Output Connector Description Operating Mode Selection JTAG Connector Description 2-11 Parallel JTAG Interface Disable Jumper Selection. 2-11 Parallel JTAG Interface Connector Description 2-12
2-10 2-11 2-12 2-13
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List Tables
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viii
DSP56824 Evaluation Module Hardware Reference Manual
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Preface
This reference manual describes detail hardware DSP56824 Evaluation Module (DSP56824EVM).
Audience
This manual intended Motorola DSP56824 application developers.
Organization
This manual organized into chapters appendixes, follows: Chapter "Introduction," provides overview features. Chapter "Technical Summary," describes detail DSP56824EVM hardware. Appendix A,"DSP56824EVM Schematics," contains schematics DSP56824EVM. Appendix B,"DSP56824EVM Bill Material," provides list materials used DSP56824EVM board.
Suggested Reading
addition this manual, refer following site World Wide more documentation DSP56824 DSP56824EVM kit:
Notation Conventions
Signal names used this manual indicated active high signals active signals. Active high signals (Logic One) will have special symbol attached signal name, like RESET. However, active signals (Logic Zero) will noted with backslash character like OE\.
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Preface
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Hexadecimal values start with sign, (e.g., $0FF0 $80.) Decimal values will have symbol attached number, (e.g., 34.) Binary values will start with letter attached number, (e.g., b1010 b0011.)
Definitions, Acronyms Abbreviations
Definitions, acronyms abbreviations terms used this document defined below reference. CODEC COder/DECoder. part used convert analog signals digital (Coder) digital signals analog (Decoder). Digital Signal Processor Electrically Erasable Programmable Read only Memory Evaluation Module General Purpose Input Output Motorola's Family DSPs Joint Test Action Group. protocol/interface used test debug. On-Chip Emulation, debug port created Motorola enable designers create low-cost hardware interface professional quality debug environment. Integrated Circuit Printed Circuit Board Phase-Locked Loop Random Access Memory Read-Only Memory Serial Port Interface. port Motorola's Family DSPs Static Random Access Memory Synchronous Serial Interface. port Motorola's Family DSPs Universal Asynchronous Receiver/Transmitter
EEPROM GPIO JTAG OnCE
SRAM UART
References
additional inormation, please refer following documentation: DSP56800 Family Manual, Motorola DSP56824 Digitial Signal Processor User's Manual, Motorola DSP56824 Digital Signal Processor Technical Data, Motorola
DSP56824EVM Hardware Reference Manual
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Chapter Introduction
DSP56824Evaluation Module (EVM) used demonstrate abilities DSP56824 provide hardware tool allowing development applications that DSP56824. DSP56824EVM evaluation module board that includes DSP56824 part, peripheral expansion connectors, external memory voice CODEC. peripheral expansion connectors used signal monitoring user feature expandability. DSP56824EVM designed following purposes: allow users become familiar with features 56800 architecture. tools examples provided with DSP56824EVM facilitate evaluation feature benefits family. serve platform real-time software development. tool suite enables user develop simulate routines then download software on-chip on-board RAM, then debug software using debugger JTAG/OnCEport. breakpoint features OnCE port enable user easily specify break conditions execute user-developed software full speed, until break conditions satisfied. ability examine modify user accessible registers, memory peripherals through OnCE port greatly facilitates task developer. serve platform hardware development. hardware platform enables user connect external hardware peripherals. on-board peripherals disabled, providing user with ability reassign DSP's peripherals. OnCE port's unobtrusive design means that memory board chip available user.
DSP56824EVM Architecture
DSP56824EVM used facilitate evaluation various features DSP56824 part. DSP56824EVM used develop real-time software hardware products based DSP56824. DSP56824EVM provides features necessary user write debug software, demonstrate functionality that
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DSP56824EVM Configuration Jumpers
software, able interface with customer's application specific device(s). DSP56824EVM flexible enough allow user fully exploit features DSP56824. (See Figure 1-1.)
RESET Program Memory 16-Bit Address Data Control
Reset Logic
MODE/IRQ
MODE/IRQ Logic
Data Memory 16-Bit 3.6864MHz Crystal
EEPROM 64K-Bit
XTAL/EXTAL
DSP56824
JTAG Connector JTAG
Peripheral Expansion Connector(s)
DSub 25-Pin Parallel JTAG Interface Power Supply +3.3 Volts
UART RS-232 Interface
DSub 9-Pin
Linear CODEC 13-Bit
Stereo Jacks 1/8"
GPIO
GPIO
Debug LEDs
Figure 1-1. Block Diagram DSP56824EVM
DSP56824EVM Configuration Jumpers
jumper groups (JG1-JG6) three jumper connectors (J1, J5), shown Figure 1-2, used configure various features DSP56824EVM board. Table describes default jumper group settings.
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DSP56824EVM Configuration Jumpers
SPI1
GPIO
SPI1
JTAG
DSP56824EVM
LED1 LED2 LED3 RESET
MODA MODB
SPI0
IRQB IRQA
Line Line
SPI0
MODE
Figure 1-2. DSP56824EVM Jumper Reference Table 1-1. DSP56824EVM Default Jumper Options
Jumper Group Comment Selects DSP's Mode operation upon exit from reset Selects CODEC's High Bandpass mode Select CODEC output jack mono both (left right) channels CODEC input jack mono Select CODEC output Volts peak Enable on-board Parallel Command Converter Interface Selects SPI0 on-board EEPROM Selects SPI1 on-board UART Selects on-board CODEC Jumpers Connections 1-2, 3-4, 1-2, 3-4, 1-2, 3-4,
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Introduction
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DSP56824EVM Connections
DSP56824EVM Connections
interconnection diagram Figure shows connections between external Volt power supply DSP56824EVM board.
Parallel Extension Cable
DSP56824EVM
Windows Connect Cable Parallel/Printer Port External 2.1mm 7-12V Receptacle Power Connector
Figure 1-3. Connecting DSP56824EVM
Perform following steps connect DSP56824EVM: Connect parallel extension cable parallel port host computer. Connect other parallel extension cable shown Figure 1-3, DSP56824EVM board. This provides connection that allows host computer control board. Make sure external 7-12 Volts 500mA power supply plugged into 120V power source. Connect 2.1mm output power plug from external power supply into shown Figure 1-3, DSP56824EVM board. Apply power external power supply. green "Power-ON" will illuminate when power correctly applied.
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Chapter Technical Summary
DSP56824EVM designed versatile Digital Signal Processor (DSP) development card developing real-time software hardware products support generation applications digital wireless messaging, servo motor control, digital answering machines, feature phones, modems, digital cameras. power 16-bit DSP56824 combined with on-board 16-bit external program static (SRAM), 16-bit external data SRAM, 1-bit external electrically erasable/programmable (EEPROM), parallel JTAG interface, Motorola's MC145483 13-bit linear voice CODEC, makes DSP56824EVM ideal developing implementing many messaging audio processing algorithms, well learning architecture instruction DSP56824 processor. main features DSP56824EVM include following: DSP56824, 16-bit operating 70MHz [U1] External fast static (FSRAM) memory [U6], configured 16-bit program memory with wait states 70MHz 16-bit data memory with wait states 70MHz Serial 64K-bit EEPROM program data storage [U7] 3.6864MHz crystal oscillator clock generation [Y1] JTAG port interface connector external debug command converter [J8] On-board Parallel JTAG Interface, with connector printer port cable [P2] UART with RS-232 interface easy connection host processor 13-bit Linear CODEC voice applications with line-in line-out jack connectors [U10, On-board power regulation from external 9-12V AC/DC power supply input [P1] Light Emitting Diode (LED) power indicator [LED4] Three on-board real-time user debugging LEDs [LED1-3]
Technical Summary
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DSP56824
Power-On Reset with user RESET push-button [S1] Manual interrupt push-button IRQA [S2] Manual interrupt push-button IRQB [S3] Connector disable on-board SPI0 peripheral (EEPROM) allow user connect their GPIO compatible peripheral [J1] Connector disable on-board SPI1 peripheral (UART) allow user connect their GPIO compatible peripheral [J2] Connector disable on-board peripheral (CODEC) allow user connect their GPIO compatible peripheral [J5] Connector DSP's GPIO signals [J7] Connector DSP's Timer signals [J8]
DSP56824
DSP56824EVM uses Motorola DSP56824BU70 part, designated board schematics. This part will operate maximum speed 70MHz. full description DSP56824, including functionality user information, provided following documents: DSP56824 Technical Data (DSP56824/D). Provides features list specifications including signal descriptions, power requirements, timing requirements available packaging. DSP56824 User's Manual (DSP56824UM/AD). Provides overview description detailed information about on-chip components including memory maps, peripheral functionality, control/status register descriptions each subsystem. DSP56800 Family Manual (DSP56800FM/AD). Provides detailed description core processor including internal status control registers detailed description family instruction set.
Refer these documents detailed information about chip functionality operation. They found following site World Wide Web:
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EEPROM
Program Data Memory
DSP56824EVM uses bank 128K 16-bit Fast Static (GSI GS72116, labelled external memory expansion, shown FSRAM block diagram Figure 2-1. This physical memory bank split into logical memory banks 16-bits, program memory other data memory. When DSP's program strobe signal line used along with memory chip's signal line, half memory chip selected when program memory accesses requested other half memory chip selected when data memory access requested.
DSP56824
A0-A15
GS72116
A1-A16
D0-D15
DQ1-DQ16
Figure 2-1. Block Diagram External Memory Interface
EEPROM
DSP56824EVM provides 64K-bit serial EEPROM (Microchip Technology 25LC640, designated nonvolatile program data memory storage. (See Figure 2-2.) This memory connects DSP56824's Serial Port Interface (SPI) Port through SPI0 enable connector, This connector allows Port control on-board EEPROM control off-board device. Table lists pin-out.
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Technical Summary
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UART
DSP56824
MOSI0
EEPROM Enable (SPI0 Port Connector)
Serial EEPROM
MISO0
SCK0
Figure 2-2. Block Diagram EEPROM Interface Table 2-1. SPI0 EEPROM Enable Connector Description
Signal MISO0/PC0 MOSI0/PC1 SCK0/PC2 SS0/PC3 EEPROM Signal
UART
DSP56824EVM provides RS-232 interface UART (MAXIM MAX3100, designated RS-232 level converter, (MAXIM MAX563, designated U8). (See Figure 2-3.) UART connects DSP56824's Port through SPI1 enable connector, This connector allows Port either control on-board UART control off-board device. Table lists pin-outs. RS-232 level converter transitions UART's +3.3V signal levels RS-232 compatible signal levels connects host's serial port connector Table lists pin-out.
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UART
DSP56824 UART Enable (SPI Port Connector)
MISO1 MOSI1 SCK1 IRQA\
MAX3100
UART DOUT SCLK IRQ\
MAX563
RS-232 Level Conversion
CTS\ RTS\
Figure 2-3. Block Diagram UART Interface Table 2-2. SPI1 UART Enable Connector Description
Signal MISO1/PC4 MOSI1/PC5 SCK1/PC6 SS1/PC7 IRQA
UART Signal DOUT SCLK
Table 2-3. RS-232 Serial Connector Description
Signal Jumper Signal Jumper
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Technical Summary
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Voice CODEC
Voice CODEC
DSP56824EVM provides 13-bit linear single-channel CODEC (Motorola MC145483, designated U10). DSP56824 interfaces CODEC DSP's Synchronous Serial Interface (SSI) through enable connector, This connector allows Port either control on-board CODEC control off-board device. Table lists pin-outs. port provides CODEC's clock, frame synchronization data without glue logic. (See Figure 2-4.)
CODEC Enable (SSI Port Connector)
DSP56824
MC145483
BCLKR, BCLKT, MCLK FST,
STCK STFS SRCK SRFS
Figure 2-4. Block Diagram CODEC Interface Table 2-4. CODEC Enable Connector Description
Signal STD/PC8 SRD/PC9 STCK/PC10 STFS/PC11 SRCK/PC12 SRFS/PC13 CODEC Signal BCLKR/BCLKT/MCLK FST/FSR
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Voice CODEC
DSP56824EVM uses 1/8" stereo jacks CODEC's analog signal input, output, (See Figure 2-5.)
Input Signal Selector
MC145483
Output Output Signal Selector Load
Line Input
POTG,TIRO-
Line Output
Figure 2-5. Block Diagram CODEC Analog Interface
ring signal stereo input jack optionally selected input source jumper JG4. (See Table 2-5.)
Table 2-5. CODEC Input Signal Jumper Selection
(default) Comment Input signal from stereo jack. Input signal from ring stereo jack.
ring signal stereo output jack optionally selected output source jumper JG3. (See Table 2-6.)
Table 2-6. CODEC Output Signal Jumper Selection
(default) Comment Output signal goes stereo jack. Output signal goes ring stereo jack.
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Clock Source
CODEC's analog line output load drive selected between Ohms using jumper JG5. (See Table 2-7.)
Table 2-7. CODEC Output Load Jumper Selection
(default) Comment 1.7V peak load 0.8V peak load
Table lists stereo input pin-outs Table lists output jack pin-outs.
Table 2-8. Line Input Connector Description
Barrel Ring Signal ANALOG LINE LINE (optional)
Table 2-9. Line Output Connector Description
Barrel Ring Signal ANALOG LINE LINE (optional)
Clock Source
DSP56824EVM uses 3.6864MHz crystal, connected External Crystal Inputs, EXTAL XTAL. DSP56824 uses internal multiply input frequency, achieve 70MHz maximum operating frequency. Additionally 3.686MHz clock source then buffered used UART clock source, shown Figure 2-6.
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Debug LEDs
DSP56824
XTAL
EXTAL
MAX3100
3.6864MHz 3.6864MHz
Figure 2-6. Block Diagram Clock Interface
Operating Mode
DSP56824EVM provides boot-up MODE selection jumper, JG1. This jumper used select operating mode exits reset. Refer DSP56824 User's Manual complete description chip's operating modes. Table 2-10 shows four modes operation available DSP56824.
Table 2-10. Operating Mode Selection
Operating Mode jumpers Comment Bootstrap from byte-wide EPROM Bootstrap from SPI0 Port Normal Expanded P:$E000 Development P:$0000 (default)
Debug LEDs
Three on-board Light-Emitting Diodes (LEDs) provided allow real-time debugging user programs. These LEDs allow programmer monitor program execution without having stop program during debugging, shown Figure 2-7. LED1 controlled Port General Purpose Input/Output (GPIO) signal line (PB8). LED2 controlled PB9. LED3 controlled PB10. Setting PB8, PB10 logic value will turn associated LED.
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Debug Support
+3.3V User DEBUG LED1
DSP56824
User DEBUG LED2
User DEBUG LED3
PB10
Figure 2-7. Block Diagram Debug Interface
Debug Support
DSP56824EVM provides on-board Parallel JTAG Interface JTAG interface connector external command converter support. interface connectors provided support each these debugging approaches. These connectors designated JTAG, J8connector Host Parallel Interface Connector,
2.9.1 JTAG Connector
JTAG connector DSP56824EVM allows connection external command converter downloading programs working with DSP56824's registers. This connector used communicate with external command converter that passes information data back forth with host processor running debugger program. Table 2-11 shows pin-out this connector.
2-10
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Debug Support
Table 2-11. JTAG Connector Description
Signal J_RESET +3.3 Volts J_TRST Signal J_TRST
When this connector used with external command converter, parallel JTAG interface should disabled placing jumper jumper block JG6. Table 2-12 shows jumper selection options.
Table 2-12. Parallel JTAG Interface Disable Jumper Selection
jumpers (default) Comment On-board Parallel JTAG Interface enabled On-board Parallel JTAG Interface disabled
2.9.2 Parallel JTAG Interface Connector
Parallel JTAG Interface Connector, allows DSP56824 communicate with Parallel Printer Port Windows shown Figure 2-8. using user download programs work with DSP56824's registers. Table 2-13 shows pin-out connector When using parallel JTAG interface, jumper should removed. (See Table 2-12.)
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Technical Summary
2-11
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Debug Support
DSP56824
TRST\
Voltage Level Conversion
DB25
TRST\
RESET\
RESET
Figure 2-8. Block Diagram Parallel JTAG Interface Table 2-13. Parallel JTAG Interface Connector Description
Signal RESET TRST Parallel CONNECTED Signal Parallel
2-12
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Reset
2.10 External Interrupts
on-board push-button switches, provided external interrupt generation, shown Figure 2-9. allows user generate hardware interrupt signal line IRQA. allows user generate hardware interrupt signal line IRQB. These switches allow user generate interrupts their programs.
+3.3V
DSP56824
IRQA Pushbutton IRQA\
IRQB Pushbutton
+3.3V
IRQB\
Figure 2-9. Block Diagram User Interrupt Interface
2.11 Reset
DSP56824EVM provides power-on reset function (Motorola MC34164, designated clean dependable RESET signal. Additional reset logic provided support RESET signals from JTAG connector, Parallel JTAG Interface, user RESET push-button. (See Figure 2-10.)
RESET SWITCH RESET POWER-ON-RESET DSP_RESET\ JTAG_RESET\ PORT_RESET\
Figure 2-10. Block Diagram RESET Interface
Motorola Technical Summary 2-13
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Power Supply
2.12 Power Supply
main power input, 7-12 Volts AC/DC 500mA, DSP56824EVM through 2.1mm coax power jack. DSP56824EVM provides +3.3V voltage regulation DSP, Program/Data SRAM memory, serial EEPROM, CODEC, parallel JTAG interface, supporting logic. (See Figure 2-11.) Power applied DSP56824EVM indicated with Power-ON LED, LED4.
7-12V AC/DC Power Condition 7-12VDC +3.3V Regulator 3.3VDC DSP56824
DSP56824EVM Parts
Figure 2-11. Block Diagram Power Supply
2.13 Test Points
Four on-board ground test points provided facilitate voltage reference measurements, TP1-TP4. These located near corners allow easy access oscilloscope probe ground straps.
2-14
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Appendix DSP56824EVM Schematics
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D[0.15] A[0.15]
+3.3V
J_RESET\ J_TRST\ PB[0.15]
PC0/MISO0 PC1/MOSI0 PC2/SCK0 PC3/SS0 PC4/MISO1 PC5/MOSI1 PC6/SCK1 PC7/SS1 PC8/STD PC9/SRD PC10/STCK PC11/STFS PC12/SRCK PC13/SRFS PC14/TIO01 PC15/TIO2 PB10 PB11 PB12 PB13 PB14 PB15 PB10 PB11 PB12 PB13 PB14 PB15 PC0/MISO0 PC1/MOSI0 PC2/SCK0 PC3/SS0\ PC4/MISO1 PC5/MOSI1 PC6/SCK1 PC7/SS1\ PC8/STD PC9/SRD PC10/STCK PC11/STFS PC12/SRCK PC13/SRFS PC14/TIO01 PC15/TIO2
+3.3V 820pF 0.01uF 0.01uF CLKO SXFC EXTAL XTAL
RESET\ MODA/IRQA\ MODB/IRQB\
RESET MODA/IRQA MODB/IRQB
TRST/DE\ CLKO SXFC EXTAL XTAL VDDPLL VSSPLL +3.3V
DSP56824EVM Hardware Reference Manual
TRST/DE
DSP56824BU70
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Title Size
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P56824 Processor Document Number
DSP56824EVM.DSN
Tuesday, April 1999
Rev. Designer: Development Tools Sheet
MOTOROLA
Figure A-1. DSP56824 Processor
MOTOROLA
Power-ON RESET Circuit
+3.3V +3.3V RESET MC74HC08AD MC34164-3 P_RESET\ MC74HC08AD J_RESET\ RESET\ U_RESET\ 4.7uF POR\
RESET SWITCH
MODE Select
+3.3V IRQA_IN\ IRQB_IN\ MODA MODB
+3.3V
TRST goes with TRST
POR\ MC74HC08AD MC74HC08AD INTERRUPT TRST/DE\ IRQA_IN\ IRQB_IN\
MC74HC157AD
MODA/IRQA\ MODB/IRQB\
J_TRST\
P_TRST\ 0.1UF
INTERRUPT
0.1UF
+3.3V XTAL EXTAL 680K 3.6864MHz MC74HC04AD 22pF 22pF 3.6864MHz IRQA_IN\ IRQB_IN\ MODB
MODA
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Crystal Oscillator
Title Size
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Document Number
Thursday, 1998
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RESET, MODE Crystal Oscillator
DSP56824EVM.DSN
Rev. Designer: Development Tools Sheet
Figure A-2. RESET, MODE Crystal Oscillator
64Kx16-bit Program 64Kx16-bit Data Memory
A[0.15] DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 +3.3V D[0.15]
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PROGRAM DATA SRAM MEMORY Document Number Date:
DSP56824EVM.DSN
Rev. Designer: Development Tools
Tuesday, April 1999
Sheet
Figure A-3. Program Data SRAM Memory
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EEPROM Enable (SPI0 HEADER)
+3.3V PC0/MISO0 25LC640/SN HOLD PC1/MOSI0 PC2/SCK0 PC3/SS0\
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DSP56824EVM Hardware Reference Manual
SPI0 Serial EEPROM MEMORY Document Number Date:
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Sheet
Figure A-4. SPI0 Serial EEPROM Memory
C1V+ SHDN T1IN R1OUT T2IN R2OUT MAX563CWN R2IN T2OUT R1IN T1OUT 0.1uF 0.1uF 0.1uF 0.1uF
UART Enable (SPI1 HEADER)
MISO1 DOUT SCLK SHDN 0CEE 3.6864MHz MOSI1 SCK1 IRQA +3.3V +3.3V
PC4/MISO1
PC5/MOSI1
PC6/SCK1
PC7/SS1\
DE9S
IRQA_IN\
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SPI1 Serial UART RS-232 Document Number Date:
FAX: (512)895-4556
MD:OE314
DSP56824EVM.DSN
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Rev. Designer: Development Tools
Sheet
MOTOROLA
Figure A-5. SPI1 Serial UART RS-232
High Band Pass Filter Enable Input Signal RING Enable
+3.3VA 0.1uF 0.1uF
TITI+
LINE
1.0uF FRST +3.3VA 1.0uF
TIP_IN BCLKR MCLK BCLKT CLK_CODEC TIR23
MOTOROLA
13-Bit
Output Signal RING Enable +3.3VA
Linear CODEC
RING_OUT TIP_OUT 68uF PORO2
LINE
RING_IN
PORO-
PC8/STD PC9/SRD PC10/STCK PC11/STFS PC12/SRCK PC13/SRFS
0.01uF MC145483DW
CODEC Enable (SSI Port Connector)
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Document Number
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13-BIT LINEAR CODEC (MC145483)
DSP56824EVM.DSN
Rev. Designer: Development Tools Sheet
Figure A-6. 13-Bit Linear CODEC (MC145483)
Motorola
Parallel JTAG Interface
PORT_IDENT
DB25M PORT_CONNECT PORT_TDO 0.1uF PORT_VCC PORT_DE PORT_TRST\ PORT_TDI PORT_TCK _TMS PORT_RESET
+3.3V
P_TRST\ +3.3V
MC74AC244DW
MC74AC244DW
DSP56824EVM Schematics
On-Board Command Converter Disable
+3.3V
+3.3V
JTAG Connector
P_TRST\ J_RESET\ +3.3V J_TRST\
P_RESET MC74HC04AD P_RESET\ P_TRST\
J_TRST\
MC74HC04AD
Wireless Subscriber Division
nnon Drive West Austin, 78735-8598 (512)895-3230 Title Size
FAX: (512)895-4556
MD:OE314
Parallel JTAG Command Converter Interface JTAG Connector Document Number
DSP56824EVM.DSN
Rev. Designer: Development Tools Sheet
Monday, 1999
Figure A-7. Parallel JTAG Command Converter Interface JTAG Connector
Motorola
PB10 PB12 PB14 PB[0.15] PB11 PB13 PB15
PB[0.15] IRQA_IN\ IRQB_IN\ RESET\ PC14/TIO01 PC15/TIO2 +3.3V
TIMER, RESET HEADER GPIO HEADER
+3.3V
LED1 MC74HC04AD LED2 MC74HC04AD
DSP56824EVM Schematics
YELLOW
LED3
PB10
MC74HC04AD
PB10
GREEN
Wireless Subscriber Division
6501 William Cannon Drive West Austin, 78735-8598 (512)895-3230
FAX: (512)895-4556
MD:OE314
Title Size
PORT (GPIO), TRIPLE TIMER, IRQA, IRQB RESET HEADERS Document Number Date:
DSP56824EVM.DSN
Rev. Designer: Development Tools
Tuesday, April 1999
Sheet
Figure A-8. Port (GPIO), Triple Timer, IRQA, IRQB RESET Headers
LED4
Motorola
EXTERNAL POWER
ACin1 2.1mm COAX JACK FM4001 RAWVin MC33269DT-3.3 0.1uF VOUT Ferrite Bead 47uF 16VDC VOUT FM4001 ACin2 FM4001 470uF 16VDC 3.3Vout FM4001 +3.3V
ANALOG POWER
+3.3V +3.3V Ferrite Bead Ferrite Bead
+3.3VA 0.1uF
DSP56824EVM Schematics
GREEN
MC33269DT
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Title Size
Wireless Subscriber Division
Drive West Austin, 78735-8598 (512)895-3230 FAX: (512)895-4556 MD:OE314
SUPPLY Document Number
DSP56824EVM.DSN
Tuesday, April 1999
Rev. Designer:
Development Tools
Sheet
A-10
Figure A-9. Power Supply
Motorola
DSP56824
+3.3V 0.01uF 0.1uF 0.01uF 0.1uF 0.01uF 0.1uF 0.01uF 0.1uF 0.01uF 0.1uF +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V
GS72116
+3.3V 0.01uF 0.1uF 0.01uF 0.1uF 0.01uF 0.1uF 0.01uF 0.1uF +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V
25LC640
74HC04
74HC157
74HC08
MAX3100
MAX563
74AC244
+3.3V
0.1uF
DSP56824EVM Schematics
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Austin, 78735-8598 (512)895-3230 Title Size
Wireless Subscriber Division
6501 William Cannon Drive West FAX: (512)895-4556 MD:OE314
BYPASS CAPS Document Number Date:
DSP56824EVM.DSN
Tuesday, April 1999
Rev.
Designer: Development Tools
Sheet
A-11
Figure A-10. Bypass Capacitors
A-12
DSP56824EVM Hardware Reference Manual
Motorola
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Appendix DSP56824EVM Bill Material
Description Ref. Designators Integrated Circuits Power-On Reset Gate U11, Resistors 680K R27, R1-9, R11, R13-16, R18-22, R24, R29, R30, R32, R34, SMEC RC73A2A51.1OHMFT SMEC RC73A2A681KOHMFT SMEC RC73A2A619OHMFT SMEC RC73A2A1KOHMFT SMEC RC73A2A2KOHMFT SMEC RC73A2A10KOHMFT SMEC RC73A2A20KOHMFT SMEC RC73A2A47KOHMFT Motorola DSP56824BU70 Motorola MC34164D-3 Motorola MC74HC08AD Motorola MC74HC157AD Motorola MC74HC04AD GS72116TP-12 Microchip Technology 25LC640/SN Maxim MAX563CWN Maxim MAX3100CEE Motorola MC145483DW Motorola MC74AC244DW Motorola MC33269DT-3.3 Vendor Part
Multiplexer
Inverter FSRAM EEPROM RS-232 Level Converter UART CODEC TRI-STATE BUFFERS 3.3V Voltage Regulator
Motorola
DSP56824EVM Bill Material
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Description
Ref. Designators R31, R33, R35, Inductors
Vendor Part SMEC RC73A2A270OHMFT
L1-L3 LEDs
Fair-Rite 2743015112
Yellow Green
LED1 LED2 LED3, LED4 Diode
Hewlett-Packard HSMS-C650 Hewlett-Packard HSMY-C650 Hewlett-Packard HSMG-C650
FM4001
Capacitors
SMEC S2B-FM401
0.01
C18, C19, C21, C23, C25, C27, C29, C31, C33, C35, C9-14, C20, C22, C24, C26, C28, C30, C32, C34, C36, C38, C41, C16, Jumpers
SMEC MCCE821J2N0-T1 SMEC MCCE103K2NR-T1
SMEC MCCE104K2NR-T1
16VDC 16VDC
SMEC MCCE1052NV-T2 Panasonic PCE3184CT SMEC ESR150-47K16D SMEC TCC68K10D SMEC MCCB475Z2NV-T2 SMEC MCCE220J2NO-T1
Bergstick Bergstick Bergstick
JG2, JG3, JG4, Test Points
SAMTEC TSW-102-07-S-D SAMTEC TSW-103-07-S-S SAMTEC TSW-102-07-S-S
Bergstick
TP1-TP4 Crystals
Samtec TSW-101-07-S-S
3.6864MHz Crystal
ECS-36-18-4
DSP56824EVM Hardware Reference Manual
Motorola
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Description
Ref. Designators Connectors
Vendor Part
Bergstick Bergstick Audio Connector Bergstick Bergstick Bergstick 2.1mm coax Power Connector DB25M Connector DE9F Connector
SAMTEC TSW-105-07-S-D SAMTEC TSW-106-07-S-D Switch Craft 35RAPC4BHN2 SAMTEC TSW-107-07-S-D SAMTEC TSW-109-07-S-D SAMTEC TSW-104-07-S-D Switch Craft RAPC-722
Switches
AMPHENOL 617-C025P-AJ121 AMPHENOL 617-C009S-AJ120
SPDT Momentary
Miscellaneous
Panasonic EVQ-QS205K
Shunt Rubber Feet
SH1-SH18 RF1-RF4
Samtec SNT-100-BL-T Amaton 5186
Motorola
DSP56824EVM Bill Material
More Information This Product, www.freescale.com
DSP56824EVM Hardware Reference Manual
Motorola
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INDEX
Numerics
13-bit Linear CODEC (MC145483) 3.6864MHz crystal IRQB Headers
JTAG Connector 2-10, JTAG Connector Description 2-11 Jumper Configuration Jumper Connections Jumper settings
Architecture, DSP56824EVM
Bypass Capacitors A-11
Line Input Connector Description Line Output Connector Description
Clock Interface Clock Source CODEC Analog Interface CODEC Output Load Jumpter Selection CODEC Output Signal Jumpter Selection Configuration, DSP56824EVM
Operating Mode Operating Mode Selection
Parallel JTAG Command Converter Interface Connector Parallel JTAG Interface Connector 2-11 Parallel JTAG Interface Connector Description 2-12 Parallel JTAG Interface Disable Jumper Selection 2-11 Port (GPIO) Headers Power Supply 2-14, A-10 Power supply, external Processor, DSP56824 Program Data SRAM Memory Program Memory
Data Memory Debug LEDs Debug Support 2-10 Default Jumpter Options DSP56824BU70 DSP56824EVM component layout connecting interconnection diagram jumper settings power connection
Reset 2-13 RESET Headers Reset Interface 2-13 Reset, Mode Crystal Oscillator RS-232 cable connection
EXTAL External Interrupts 2-13 External Memory Interface
FSRAM
EEPROM UART SPI0 Serial EEPROM Memory SPI1 Serial UART RS-232
IRQA Headers
Motorola
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Test Points 2-14 Triple Timer Headers
Voice CODEC
XTAL
Motorola
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