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MK1707 generates output clock from clock input. part designed dither i
Top Searches for this datasheetMK1707 MK1707 generates output clock from clock input. part designed dither interface clock flat panel graphics controllers. device uses ICS' proprietary analog digital Phase Locked Loop (PLL) technology spread frequency spectrum output, thereby reducing frequency amplitude peaks several MK1707 offers both centered down spread from high speed clock input. Refer MK1714-01/02 crystal input widest selection input frequencies multipliers. offers many other clocks computers computer peripherals. Consult when need remove crystals oscillators from your board. Features Packaged 8-pin SOIC Available Pb-free package Industrial temperature range available Provides spread spectrum output clock Supports ATI's flat panel controllers Guaranteed +85°C operation Accepts clock input, provides same frequency dithered output Good modes from Peak reduction 14dB typical 19th harmonics feature disabled Includes Power-down Operating voltage Advanced, low-power CMOS process Block Diagram S1:0 Spread Direction Enable Clock Synthesis Spread Spectrum Circuitry Input Buffer Clock ICLK 1707 Integrated Circuit Systems, Inc. Race Street, Jose, 95126 Revision 032204 (408) 297-1201 www.icst.com MK1707 Assignment Spread Direction Percentage Select Table Spread Direction Down Down Down Down Center Down Down Center Down Center Down Power Down Center Center Center Center Center Center Test Center Power Down Spread Percentage 1.25 +0.5, -1.5 +0.5, -2.5 +0.5, ±0.35 ±0.5 ±0.7 ±0.8 ±1.1 ±1.4 Test ±2.5 ICLK (150 mil) SOIC connect unconnected (floating) connect directly Descriptions Number Name Type ICLK Input Power Power Output Input Input Input Input Connect graphics input clock. Connect +3.3 Connect ground. Spread spectrum clock output table above. enable. Turns spread spectrum when high. Internal pull-up resistor. Function select input. Selects spread amount direction table above. Internal mid-level. Function select 1input. Selects spread amount direction table above. Internal mid-level. Spread direction select input. Selects direction spread table above. Internal pull-up resistor. 1707 Integrated Circuit Systems, Inc. Race Street, Jose, 95126 Revision 032204 (408) 297-1201 www.icst.com MK1707 External Components MK1707 requires minimum number external components proper operation. decoupling capacitor pin. trace should kept short possible, should trace ground via. minimize EMI, series termination resistor needed) should placed close clock output. optimum layout with components same side board, minimizing vias through other signal layers. Other signal traces should routed away from MK1707. This includes signal traces just underneath device, layers adjacent ground plane layer used device. Decoupling Capacitor decoupling capacitor 0.01µF must connected between pins close these pins possible. optimum device performance, decoupling capacitor should mounted component side PCB. Avoid vias decoupling circuit. Series Termination Resistor When trace between clock output load over inch, series termination should used. series terminate trace commonly used trace impedance), place resistor series with clock line, close clock output possible. nominal impedance clock output Powerup Considerations insure proper operation spread spectrum generation circuit, some precautions must taken while utilizing MK1707. input signal should applied ICLK until stable (within final value). This requirement easily operating MK1707 then ICLK source from same power supply. should enabled (taken high) until after power supplies input clock stable. This requirement direct control system logic example, "power good" signal. Another solution leave unconnected anything 0.01µF capacitor ground. internal pullup resistor will charge capacitor provide approximately 700µs delay until spread spectrum enabled. input frequency changed during operation, disable spread spectrum until input clock stabilizes frequency. Tri-level Select Operation select pins tri-level, meaning they have three separate states make selections shown table page select (mid) level, connection these pins must eliminated either floating them originally, tri-stating GPIO pins which drive select pins. Layout Recommendations optimum device performance lowest output phase noise, following guidelines should observed. 0.01µF decoupling capacitor should mounted component side board close possible. vias should used between 1707 Integrated Circuit Systems, Inc. Race Street, Jose, 95126 Revision 032204 (408) 297-1201 www.icst.com MK1707 Absolute Maximum Ratings Stresses above ratings listed below cause permanent damage MK1707. These ratings, which standard values commercially rated parts, stress ratings only. Functional operation device these other conditions above those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect product reliability. Electrical parameters guaranteed only over recommended operating temperature range. Item Supply Voltage, Inputs Outputs Ambient Operating Temperature, Commercial Ambient Operating Temperature, Industrial Storage Temperature Junction Temperature Soldering Temperature Rating -0.5 VDD+0.5 +85°C +85°C +150°C 125°C 260°C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured respect GND) Min. +3.135 Typ. Max. +5.5 Units Electrical Characteristics Unless stated otherwise, Ambient Temperature +85°C Parameter Operating Voltage Supply Current Symbol IDDPD Conditions load, load, S0=S1=SD=1 ICLK ICLK other inputs pins CMOS, pins Min. 3.135 Typ. Max. Units Input High Voltage Input Voltage Input High Voltage Input High Voltage Input Voltage Output High Voltage Output High Voltage Output Voltage Input Capacitance (VDD/2) VDD-0.5 VDD/2 VDD/2 (VDD/2) VDD-0.4 1707 Integrated Circuit Systems, Inc. Race Street, Jose, 95126 Revision 032204 (408) 297-1201 www.icst.com MK1707 Electrical Characteristics Unless stated otherwise, Ambient Temperature +85° Parameter Input/Output Clock Frequency Input Clock Duty Cycle Output Clock Duty Cycle Output Rise Time Output Fall Time Modualtion Frequency Peak Frequency Reduction Symbol Conditions Time above VDD/2 Time above Min. Typ. Max. Units 19th harmonics Thermal Characteristics Parameter Thermal Resistance Junction Ambient Symbol Conditions Still flow flow Min. Typ. Max. Units °C/W °C/W °C/W °C/W Thermal Resistance Junction Case 1707 Integrated Circuit Systems, Inc. Race Street, Jose, 95126 Revision 032204 (408) 297-1201 www.icst.com MK1707 Package Outline Package Dimensions (8-pin SOIC, Mil. Body) Package dimensions kept current with JEDEC Publication Millimeters Symbol Inches INDEX AREA 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 SEATING PLANE (.004) Ordering Information Part Order Number MK1707S MK1707STR MK1707SI MK1707SITR MK1707SLF MK1707SLFTR MK1707SILF MK1707SILFTR Marking MK1707S MK1707S MK1707SI MK1707SI MK1707SL MK1707SL MK1707SIL MK1707SIL Shipping Packaging Tubes Tape Reel Tubes Tape Reel Tubes Tape Reel Tubes Tape Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature +85° +85° +85° +85° +85° +85° +85° +85° Note: "LF" denotes (lead) free package. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 1707 Integrated Circuit Systems, Inc. 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