SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER MK1716-01 versatile se

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER MK1716-01 versatile se

Datasheet Thumbnail

Top Searches for this datasheet

MK1716-01
SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
MK1716-01 versatile serial programmable clock source which takes very little board space. device simultaneously generate groups output clocks reference clock output. Both clock groups (CLKA CLKB) derived from single PLL, have ability incorporate Spread Spectrum frequency modulation reduced system EMI. Each group control independent output divide values. Outputs programmed fly, will lock frequency less. Each groups powered separate VDDIO voltage. reference clock uses fixed voltage. VDDIO vary from VDD. devices includes which tri-states output clocks when tied low. ICS' VersaClocksoftware allows user generate MK1716-01 device optimizing configuration code target output frequencies spread spectrum amounts.
Features
Packaged 28-pin SSOP Operating voltage Serially programmable: user determines output
frequency 3-wire interface Highly accurate frequency generation Multiplier PLL: 1.2048, 1.1024 Eliminates need custom Quartz Oscillators Input crystal frequency 5-27 Input clock frequency 3-50 Output clock frequencies 133.33 Spread Spectrum frequency modulation reduced system Center down spread ±0.5% total Selectable modulation rate Advanced, power, sub-micron CMOS process Separate each bank outputs Output skew <250 within output bank control outputs
Block Diagram
VDDIOA
STROBE SCLK DATA
with Spread SpectrumCircuit
CLKA
VDDIOB CLKB
Crystal clock input X1/ICLK
External capacitors required with crystal input.
Clock Buffer/ Crystal Ocsillator
1716-01 Integrated Circuit Systems
Race Stree Jose,
Revision 090704 (408) 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
Assignment
Note:
DATA X1/ICLK REFOUT CLKA CLKA CLKA CLKA VDDIOA STROBE SCLK CLKB CLKB CLKB CLKB VDDIOB
Clock Clock same frequency not, must powered separate VDDs.
Descriptions
Number
10-13 16-19 20-21 22-24
Name
DATA X1/ICLK REFOUT CLKA VDDIOA VDDIOB CLKB SRCLK STROBE
Type
Input Output Output Output Input Input Input Input
Serial shift register data input. Connect crystal. Leave open clock input. Connect this crystal external clock input. Reference clock output. Connect +3.3 Connect ground. Output clock. Power supply CLKA. Power supply CLKB. Output clock. Connect ground. Connect +3.3 Output enable active high. Serial shift register clock. Strobe load data. timing diagram. external kOhm pull-up. Connect ground.
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
Configuring MK1716-01
Initial State: MK1716-01 configured have nine frequency outputs, utilizing single on-board spread spectrum circuitry. Unprogrammed, part following outputs, related reference input clock:
Default Outputs Output
Clock (Pins
Frequency
Reference output
STROBE must have external kOhm pull-up resistor acheive Initial State. input crystal range MK1716-01 MHz. MK1716-01 programmed output functions frequencies. data bits generated VersaClocksoftware written DATA this order: (left most bit) first. show Figure after these bits clocked into MK1716-01, taking STROBE high will send this data internal latch output will lock within Note: STROBE utilizes transparent latch that latched when high state. STROBE high state SCLK pulsed, DATA clocked directly internal latch output conditions will change accordingly. Although this will damage MK1716-01, recommended that STROBE kept while DATA being clocked into MK1716-01 order avoid unintended changes output clocks.
Parameters Writing MK1716-01
Parameter
tSETUP tHOLD
Condition
Setup time Hold time after SCLK Data wait time Strobe pulse width SCLK Frequency
Min.
Max.
Units
DATA setup
Bit160
Bit159
Bit158
hold
Bit3
Bit2
Bit1
SCLK STROBE
Figure Diagram Program K1716-01
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
External Components
Series Termination Resistor
Clock output traces over inch should series termination. series terminate trace commonly used trace impedance), place resistor series with clock line, close clock output possible. nominal impedance clock output trace should kept short possible, should trace ground via. external crystal should mounted just next device with short traces. traces should routed next each other with minimum spaces, instead they should separated away from other traces. minimize EMI, series termination resistor needed) should placed close each clock output. optimum layout with components same side board, minimizing vias through other signal layers.
STROBE Pull-up Resistor
order device start default state, kOhm pull-up resistor required.
Decoupling Capacitors
with high-performance mixed-signal MK1716-01 must isolated from system power supply noise perform optimally. Decoupling capacitors 0.01µF must connected between each ground plane.
MK1716-01 Configuration Capabilities
architecture MK1716-01 allows user easily configure device wide range output frequencies, given input reference frequency. frequency multiplier provides high degree precision. values (the multiplier/divide values available generate target frequency) within range 2048 1024. MK1716-01 also provides separate output divide values, from through allow output clock banks support widely differing frequency values from same PLL. Each output frequency represented Output Freq. (Ref. Freq)*(M/N)/Output Divide Each output clock bank separate voltage drive control (VDDIOA VDDIOB) that sets output clock voltage swing.
Crystal Load Capacitors
device crystal connections should include pads small capacitors from ground from ground. These capacitors used adjust stray capacitance board match nominally required crystal load capacitance. Because load capacitance only increased this trimming process, important keep stray capacitance minimum using very short traces (and vias) been crystal device. Crystal capacitors must connected from each pins ground. value these crystal caps should equal pF)*2. this equation, crystal load capacitance Example: crystal with load capacitance, each crystal capacitor would [(16-6)
VersaClock Software
applies years optimization experience into user friendly software that accepts user's target reference clock output frequencies generates lowest jitter, lowest power configuration, with only press button. user does need have prior experience determine optimal frequency support multiple output frequencies. VersaClock software quickly evaluates accessible frequencies with available output divide values provides easy understand, code rating
Layout Recommendations
optimum device performance lowest output phase noise, following guidelines should observed. Each 0.01µF decoupling capacitor should mounted component side board close possible. vias should used between decoupling capacitor pin.
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
target output frequencies. user evaluate output accuracy, performance trade-off scenarios seconds.
spread should applied. this case, maximum frequency, including modulation, target frequency. effective average frequency less than target frequency. MK1716-01 operates both center spread down spread modes. center spread, frequency modulated between ±0.125% ±2.0%. down spread, frequency modulated between -0.25% -4.0%. Both output frequency banks will utilize identical spread spectrum percentage deviations modulation rates, common frequency identified.
Spread Spectrum Modulation
MK1716-01 utilizes frequency modulation (FM) distribute energy over range frequencies. modulating output clock frequencies, device effectively lowers energy across broader range frequencies; thus, lowering system's electro-magnetic interference (EMI). modulation rate time from transitioning from minimum frequency maximum frequency then back minimum. Spread Spectrum Modulation applied either "center spread" "down spread". During center spread modulation, deviation from target frequency equal positive negative directions. effective average frequency equal target frequency. applications where clock driving component with maximum frequency rating, down
Spread Spectrum Modulation Rate
spread spectrum modulation frequency applied output clock frequency occur variety rates. applications requiring driving "down-circuit" PLLs, Zero Delay Buffers, those adhering standards, spread spectrum modulation rate should 30-33 kHz. other applications, modulation option available.
Absolute Maximum Ratings
Stresses above ratings listed below cause permanent damage MK1716-01. These ratings, which standard values commercially rated parts, stress ratings only. Functional operation device these other conditions above those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect product reliability. Electrical parameters guaranteed only over recommended operating temperature range.
Parameter
Supply Voltage, Inputs Clock Outputs Storage Temperature Soldering Temperature
Condition
Referenced Referenced Referenced seconds
Min.
-0.5 -0.5
Typ.
Max.
Units
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured respect GND) Power Supply Ramp Time
Min.
+3.0
Typ.
Max.
+3.6
Units
Electrical Characteristics
VDD=3.3 ±10% Ambient temperature +70°C, unless stated otherwise
Parameter
Operating Voltage
Symbol
Conditions
Configuration Dependent VersaClockEx. 14.31818 crystal, VDD=VDDIO=3.3V, VDDIOA VDDIOB
Min.
3.00
Typ.
Max.
3.60
Units
Operating Supply Current Input High Voltage
2.25 (VDD/2)+1 (VDD/2)-1 VDD-0.5 VDD-0.4
VDDIO Voltage Input High Voltage Input Voltage Input High Voltage Input Voltage Output High Voltage Output Voltage Output High Voltage, CMOS level Short Circuit Current Nominal Output Impedance Input Capacitance Internal Pull-down Resistor Internal Pull-up Resistor
ICLK only ICLK only SCLK, DATA, STROBE outputs
ZOUT outputs
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
Electrical Characteristics
±10%, Ambient Temperature +70° unless stated otherwise
Parameter
Input Frequency
Symbol
Conditions
Fundamental crystal Input clock VDD=3.3
Min.
0.25
Typ.
Max.
133.33
Units
Output Frequency Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Power-up Time
80%, Note 20%, Note Note STROBE goes high until stable goes high until stable out, already running
49-51
Maximum Output Jitter, short term Maximum Output Jitter, short term Skew same bank Skew bank bank Spread Spectrum Modulation Amount
Reference clock, Note other clocks, Note configuration dependent Same voltage frequency Same voltage frequency Center down spread
±300 ±200
Note Measured with load. Note Duty Cycle configuration dependent. Most configurations
Thermal Characteristics
Parameter
Thermal Resistance Junction Ambient
Symbol
Conditions
Still flow flow
Min.
Typ.
Max. Units
°C/W °C/W °C/W °C/W
Thermal Resistance Junction Case
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12
MK1716-01 SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER
Package Outline Package Dimensions (28-pin SSOP, Mil. Wide Body)
Package dimensions kept current with JEDEC Publication
Millimeters Symbol
Inches
1.35 1.75 0.10 0.25 -1.50 0.20 0.30 0.18 0.25 9.80 10.00 5.80 6.20 3.80 4.00 .635 Basic 0.40 1.27 -0.10
0.053 0.069 0.004 0.010 -0.059 0.008 0.012 0.007 0.010 .386 .394 0.228 0.244 0.150 0.157 .025 Basic 0.016 0.050 -0.004
Ordering Information
Part Order Number
MK1716-01R MK1716R-01RT
Marking
MK1716-01R (top line) YYWW (2nd line)
Shipping Packaging
Tubes Tape Reel
Package
28-pin SSOP 28-pin SSOP
Temperature
+70° +70°
While information presented herein been checked both accuracy reliability, Integrated Circuit Systems (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments.
1716-01 grated ircuit Syste
Race Street,
Revision 090704 97-12

SERIAL PROGRAMMABLE VERSACLOCK SYNTHESIZER MK1716-01 versatile se

Top Searches for this datasheet

Other recent searches