ACPI CardBus Controller Single-chip CardBus host adapter Supports

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ACPI CardBus Controller Single-chip CardBus host adapter Supports

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OZ6833
ACPI CardBus Controller
Single-chip CardBus host adapter Supports PCMCIA JEIDA cards CardBus cards ACPI-PCI Power Management Interface Specification Rev1.0 Compliant Supports OnNow wakeup, OnNow Ring Indicate, CLKRUN#, PME#, CardBus CCLKRUN# Compliant with specification v2.1S, 1998 Card Standard Yenta PCMCIA CardBus Bridge register compatible ExCA (Exchangeable Card Architecture) compatible registers map-able memory space Intel 82365SL PCIC Register Compatible Supports PCMCIA_ATA Specification Supports 5V/3.3V Cards 3.3V CardBus cards Supports Card CardBus slots with insertion removal Supports multiple FIFOs PCI/CardBus data transfer Supports Direct Memory Access PC/PCI PC/Way Card socket Programmable interrupt protocol: PCI, PCI+ISA, PCI/Way, PC/PCI interrupt signaling modes Win'98 PC-97/98 compliant Parallel Serial interface socket power control devices Micrel) Zoomed Video Support Integrated Subsystem Vendor support, with auto lock Activity Pins support "temporal" add-in functions Cards, such Memory cards, Network interfaces, FAX/Modems other wireless communication cards, etc. high performance capability CardBus interface will enable further development many functions applications. OZ6833 CardBus controller 33MHz compliant master/target device that attaches manages Card sockets. Card sockets support both 3.3V versions 8/16-bit PCMCIA card 32-bit CardBus card. card support compatible with Intel 82365SL PCIC controller. CardBus card support fully compatible with 1998 Card Standard V7.0. OZ6833 stand alone device. does require additional buffer chip Card socket interface. OZ6833 implemented with complex multiple FIFO data buffer CardBus interface provide better PCI/CardBus access. FIFO buffers allow bridge accept data from target while moving data facilitating deadlock prevention. addition, OZ6833 designed with dynamic Card insertion removal auto configuration capabilities. OZ6833 ACPI CardBus Controller provides power saving mixed 3.3V capability. advance CMOS process minimizes system power consumption. device also provides power-down mode, allowing host software reduce power consumption further while stopping internal clock distribution clocks Card sockets. OZ6833 only CardBus bridge, also socket controller. OZ6833 supports master devices arbitrates priority each. Further, supports inter CardBus direct data transfer. register OZ6833 superset OZ67xx register set, assuring full compatibility with existing socket/card-services software PC-card applications. OZ6833 provides most advanced design flexibility Card interface notebook computer design. enhance performance between CardBus card, buffers (each composed double words) added both sides going from CardBus other around. implementing these buffers, OZ6833 will refuse data from target while moving data preventing deadlock situations. order allow maximum flexibility system designers, CINT# card 32-bit programmed steer either INTA# INTB# bus. Further, interrupts programmed route through bridge either lines interrupts bus.
ORDERING INFORMATION
OZ6833T TQFP OZ6833B Mini-BGA
GENERAL DESCRIPTION
OZ6833 ACPI CardBus controller provides high performance, synchronous, 32-bit, master/target interface between computers plug Cards. CardBus 32-bit interface standard Personal Computer Memory Card International Association, PCMCIA. CardBus provides 32-bit interface with multiplexed address data lines. This will allow addition high performance computer system enhancements functions user-friendly way. Further, expansion capability CardBus will provide benefits user. CardBus intended
04/25/00 Copyright 1999 O2Micro
OZ6833-DS-1.55 Rights Reserved
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OZ6833
FUNCTIONAL BLOCK DIAGRAM
Interface
Configuration/ Function Control Registers Function Control Configuration/ Registers
Arbite Arbiter
ACPI/ OnNow Power Management PC99
Power Switch Power Control Contro Switch
CardBus FIFO CardBu FIFO DatasBuffering
Interrupt Subsystem Interrup
EXCA 8/16-Bit 16PC Card Machin Card State Machine
CardBus Card State Machine Arbiter
EXCA 8/16 Card State Machine
CardBus Card State Machine Arbiter
Powe Power Switc Switch Interface
Card Socket Card Interface Interface
Socket Card Interface
OZ6833-DS-1.55
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OZ6833
SYSTEM BLOCK DIAGRAM
following diagram typical system block diagram utilizing OZ6833 ACPI CardBus controller with other related chipsets.
North Bridge
Memory
OZ6833 CardBus Controller
South Bridge
Card
Card
OZ6833-DS-1.55
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OZ6833
DIAGRAM TQFP
PCI_CLK PCI_GNT# PCI_REQ# AD31 AD30 PCI_VCC AD29 AD28 AD27 AD26 AD25 AD24 C/BE3# CORE_GND IDSEL AD23 AD22 AD21 AD20 AD19 PCI_VCC AD18 AD17 AD16 C/BE2# CORE_GND FRAME# CORE_GND IRDY# TRDY# DEVSEL# STOP# PERR# SERR# C/BE1# PCI_VCC AD15 AD14 AD13 AD12 AD11 AD10 CORE_GND C/BE0# PCI_VCC
B_A8/CCBE1# B_A17/CAD16 B_A13/CPAR B_SOCKET_VCC B_A18/RFU B_A14/CPERR# IRQ12/PME# B_A19/CBLOCK# B_WE#/CGNT# B_A20/CSTOP# B_RDY_IREQ#/CINT# B_A21/CDEVSEL# B_A16/CCLK B_A22/CTRDY# B_A15/CIRDY# B_A23/CFRAME# B_A12/CCBE2# B_A24/CAD17 B_A7/CAD18 B_A25/CAD19 B_A6/CAD20 B_VS2/CVS2 CORE_VCC B_A5/CAD21 B_RESET/CRESET# B_A4/CAD22 B_WAIT#/CSERR# B_A3/CAD23 B_INPACK#/CREQ# B_A2/CAD224 B_REG#/CC_BE3# B_A1/CAD25 B_BVD2/CAUDIO B_A0/CAD26 B_BVD1/CSTCHG IRQ11/SKTB_ACTV B_D0/CAD27 B_D8/CAD28 B_D1/CAD29 B_D9/CAD30 B_D2/RFU B_D10/CAD31 B_SOCKET_VCC B_WP/CCLKRUN# B_CD2#/CCD2# INTA# IRQ4/INTB# IRQ5/SERIRQ IRQ7/SIN#/B_VPP_PGM RST# IRQ14/CLKRUN#
Micro, Inc. OZ6833
B_IOWR#/CAD15 B_A9/CAD14 B_IORD#/CAD13 B_A11/CAD12 B_VS1/CVS1 B_OE#/CAD11 B_CE2#/CAD10 B_A10/CAD9 B_D15/CAD8 B_CE1#/CCBE0# B_VPP_VCC B_D14/RFU B_D7/CAD7 B_SOCKET_VCC B_D13/CAD6 B_D6/CAD5 B_D12/CAD4 B_D5/CAD3 B_D11/CAD2 B_D4/CAD1 B_CD1#/CCD1# B_D3/CAD0 CORE_VCC LED_OUT/SKT_ACTIVITY SCLK/A_VCC5# SDATA/B_VCC3# SLATCH/B_VCC_5# CORE_GND SPKR_OUT# AUX_VCC A_CD2#/CCD2# A_WP/CCLKRUN# A_D10/CAD31 A_D2/RFU A_D9/CAD30 A_D1/CAD29 A_D8/CAD28 A_D0/CAD27 A_BVD1/STSCHG A_SOCKET_VCC A_A0/CAD26 A_VPP_VCC A_BVD2/CAUDIO A_A1/CAD25 A_REG#/CCBE3# A_A2/CAD24 A_INPACK#/CREQ# A_A3/CAD23 A_WAIT#/CSERR# A_A4/CAD22 A_RESET/CRESET# A_A5/CAD21
A_VS2/CVS2 A_A6/CAD20 A_A25/CAD19 A_A7/CAD18 A_A24/CAD17 SOCKET_VCC A_A12/CCBE2# A_A23/CFRAME# A_A15/CIRDY# A_A22/CTRDY# A_A16/CCLK A_A21/CDEVSEL# A_RDY_IREQ#/CINT# A_A20/CSTOP# A_WE#/CGNT# A_A19/CBLOCK# IRQ3/VCC3# A_A14/CPERR# A_A18/RFU A_A13/CPAR A_A17/CAD16 A_A8/CCBE1# A_IOWR/CAD15 A_A9/CAD14 CORE_VCC A_IORD#/CAD13 A_A11/CAD12 A_VS1/CVS1 A_OE#/CAD11 A_CE2#/CAD10 A_A10/CAD9 IRQ15/RING_OUT A_D15/CAD8 A_CE1#/CCBE0# A_D14/RFU A_D7/CAD7 A_D13/CAD6 A_D6/CAD5 A_D12/CAD4 A_D5/CAD3 A_D11/CAD2 A_D4/CAD1 A_CD1#/CCD1# A_SOCKET_VCC A_D3/CAD0 LOCK# CORE_GND
OZ6833-DS-1.55
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OZ6833
LIST
Bold Text Normal Default Name
Interface Pins
Name AD[31:0] Description Address Input/Data: These pins connect signals AD[31:0]. transaction consists address phase followed more data phases. Number TQFP 4-5, 7-12, 1620, 22-24, 3843, 45-46, 4849, 51-56 Input Type Power Rail Drive Spec
C/BE[3:0]#
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
PERR#
Command/Byte Enable: command signaling byte enables multiplexed same pins. During address phase transaction, C/BE[3:0]# interpreted commands. During data phase, C/BE[3:0]# interpreted byte enables. byte enables valid entirety each data phase, they indicate which bytes 32-bit data path carry meaningful data current data phase. Cycle Frame: This input indicates OZ6833 that transaction beginning. While FRAME# asserted, data transfers continue. When FRAME# de-asserted, transaction final phases. Initiator Ready: This input indicates initiating agent's ability complete current data phase transaction. IRDY# used conjunction with TRDY#. Target Ready: This output indicates target Agent's OZ6833's ability complete current data phase transaction. TRDY# used conjunction with IRDY#. Stop: This output indicates current target requesting master stop current transaction. Initialization Device Select: This input used chip select during configuration read write transactions. This point-to-point signal. IDSEL used chip select during configuration read write transactions. Device Select: This output driven active when address recognized supported, thereby acting target current cycle. Target must respond before timeout occurs cycle will terminate. Parity Error: output driven active when data parity error detected during write phase.
Spec
Spec
Spec
Spec
OZ6833-DS-1.55
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OZ6833
Name SERR# Description System Error: This output driven active indicate address parity error. Parity: This generates parity ensures even parity across AD[31:0] C/BE[3:0]#. During address phase, valid after clock. With data phases, stable clock after write read transaction. Clock: This input provides timing transactions from OZ6833. signals, except RST#, sampled driven rising edge PCI_CLK. This input operated frequencies from 33MHz. Device Reset: This input used initialize registers internal logic their reset states place most OZ6833 pins HIGH-impedance state. Ring Indicate Out: This Ring Indicate when following occurs while Mode Control Register (index 2Eh) Power Control (Index+02h) Interrupt General Control (Index+03h) O2Micro Control (Offset: D4h) Clock Request: This signal used central resource request permission stop clock slow down, OZ6833 responds accordingly. enable CLKRUN# signal, need enable ExCA register bit[3:2]. Power Management Event: power management event process which OZ6833 request change power consumption state. Usually, occurs during request change from power saving state fully operational state. Socket Activity: This signal indicates that there activity socket read/write access. Refer Configuration Register 90h. Interrupt This output indicates programmable interrupt request generated from number card actions. Although there specific mapping requirement connecting interrupt lines from OZ6833 system, common connect this system INTA# signal. Number TQFP Input Type Power Rail Drive Spec
Spec
PCI_CLK
RST#
RI_OUT
CLKRUN#
Spec
PME#
SKTB_ACTV
INTA#
Spec
OZ6833-DS-1.55
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OZ6833
Name INTB# Description Interrupt This output indicates programmable interrupt request generated from number card actions. Although there specific mapping requirement connecting interrupt lines from OZ6833 system, common connect this system INTB# signal. SOUT#/IRQSER: PC/PCI Serial Interrupt Signaling mode, this serial interrupt output, SOUT#. PC/Way mode, this serializer interrupt controller. SIN#: PC/PCI Serial Input Signaling mode, this serial interrupt input, SIN#. Grant: This signal indicates that access been granted. Request: This signal indicates arbiter that OZ6833 requests bus. LOCK#: This signal used master perform locked transaction target memory. LOCK# used prevent more than master from using particular system resource. VCC: These pins connected either 3.3- 5-volt power supply. interface outputs listed this table (Table 2-1) will operate voltage applied these pins, independent voltage applied other OZ6833 groups. Number TQFP Input Type Power Rail Drive Spec
SOUT#/ IRQSER
Spec
SIN#
Spec
GNT# REQ#
Spec Spec
LOCK#
Spec
PCI_VCC
PCMCIA Sockets Interface Pins
Socket number Socket number
Number Socket Socket TQFP TQFP
Name1 -REG#/ CCBE3#
Description2 Register Access: During PCMCIA memory cycles, this output chooses between attribute common memory. During cycles non-DMA transfers, this signal active (low). During mode, this signal always inactive. cycles OZ6833 DMA-capable card, -REG inactive during cycles indicate DACK PCMCIA card. CardBus Command Byte Enable: CardBus mode, this CCBE3#. PCMCIA socket address 25:24 outputs. CardBus Address/Data: CardBus mode, these pins bits PCMCIA socket address output. CardBus Frame: CardBus mode, this CFRAME# signal.
Drive CardBus spec.
A[25:24]/ CAD[19,
102,
R15,
176,
D10,
CardBus spec.
A23/ CFRAME#
CardBus spec.
OZ6833-DS-1.55
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OZ6833
Name1 A22/ CTRDY# A21/ CDEVSEL# A20/ CSTOP# A19/ CBLOCK# Description2 PCMCIA socket address output. CardBus Target Ready: CardBus mode, this CTRDY# signal. PCMCIA socket address output. CardBus Device Select: CardBus mode, this CDEVSEL# signal. PCMCIA socket address output. CardBus Stop: CardBus mode, this CSTOP# signal. PCMCIA socket address output. CardBus Lock: CardBus mode, this signal CBLOCK# signal used locked transactions. PCMCIA socket address output. Reserved: CardBus mode, this reserved future use. PCMCIA socket address output. CardBus Address/Data: CardBus mode, this PCMCIA socket address output. CardBus Clock: CardBus mode, this supplies clock inserted card. PCMCIA socket address output. CardBus Initiator Ready: CardBus mode, this CIRDY# signal. PCMCIA socket address output. CardBus Parity Error: CardBus mode, this CPERR# signal. PCMCIA socket address output. CardBus Parity:b CardBus mode, this CPAR signal. PCMCIA socket address output. CardBus Command/Byte Enable: CardBus mode, this CCBE2# signal. PCMCIA socket address 11:9 output. CardBus Address/Data: CardBus mode, these bits PCMCIA socket address output. CardBus Command/Byte Enable: CardBus mode, this CCBE1# signal. PCMCIA socket address outputs. CardBus Address/Data: CardBus mode, these pins bits 20:26. Number Socket Socket TQFP TQFP I/O-PU Drive CardBus spec. CardBus spec. CardBus spec. CardBus spec.
I/O-PU
I/O-PU
I/O-PU
A18/ A17/ CAD16 A16/ CCLK#
CardBus spec. CardBus spec. CardBus spec.
A15/ CIRDY# A14/ CPERR# A13/ CPAR A12/ CCBE2#
I/O-PU
CardBus spec. CardBus spec. CardBus spec. CardBus spec.
I/O-PU
A[11:9]/ CAD[12, CCBE1#
153, 149,
C17, E17,
CardBus spec.
CardBus spec.
A[7:0]/ CAD[18, 2026]
D15/ CAD8 D14/
PCMCIA socket data/0 CardBus Address/Data: CardBus mode, this PCMCIA socket data Reserved: CardBus mode, this reserved future use.
100, 103, 105, 107, 109, 111, 113,
R14, T15, U17, T17, P16, N14, N16,
175, 178, 181, 183, 185, 187, 189,
C11, B10, A10,
CardBus spec.
CardBus spec.
OZ6833-DS-1.55
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OZ6833
Name1 D[13:3]/ CAD[6, Description2 PCMCIA socket data bits 13:3. CardBus Address/Data: CardBus mode, this respectively. Number Socket Socket TQFP TQFP 142, F16, 140, F14, 124, 138, G16, 122, K14, 199, 120, L16, 197, L14, 195, 144, F17, 141, G17, 139, G15, 137, H17, Drive CardBus spec.
D[1:0]/ CAD[29,27]
-OE/ CAD11
-WE/ CGNT#
-IORD/ CAD13
-IOWR/ CAD15
-IOIS16/ CCLKRUN#
PCMCIA socket data Reserved: CardBus mode, this reserved future use. PCMCIA socket data bits 1:0. CardBus Address/Data: CardBus mode, these pins bits respectively. Output Enable: This output goes active (low) indicate memory read from PCMCIA socket OZ6833. CardBus Address/Data: CardBus mode, this Write Enable: This output goes active (low) indicate memory write from OZ6833 PCMCIA socket. CardBus Grant: CardBus mode, this CGNT# signal. Read: This output goes active (low) reads from socket OZ6833. CardBus Address/Data: CardBus mode, this Write: This output goes active (low) writes from OZ6833 socket. CardBus Address/Data: CardBus mode, this Write Protect/ 16-Bit: Memory Card Interface mode, this inputs interpreted status write protect switch PCMCIA card. Card Interface mode, this input indicates size data current address PCMCIA card. CardBus Clock Run: CardBus mode, this CCLKRUN# signal, which starts stops CardBus CCLK. enable CLKRUN# signal, ExCA register 3Bh/7Bh bit[3:2] must enabled.
CardBus spec. CardBus spec.
121,
M17,
196,
CardBus spec.
CardBus spec.
CardBus spec.
CardBus spec.
I/O-PU
CardBus spec.
OZ6833-DS-1.55
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OZ6833
Name1 -INPACK/ CREQ# Description2 Input Acknowledge: -INPACK function applicable environments. However, compatibility with other Cirrus Logic products, this should connected PCMCIA socket's -INPACK pin. CardBus Request: CardBus mode, this CREQ# signal. Ready/Interrupt Request: Memory Card Interface mode, this input indicates OZ6833 that card either ready busy. Card Interface mode, this input indicates card interrupt request. CardBus Interrupt: CardBus mode, this CINT# signal. This signal active-low level-sensitive. Wait: This input indicates request card OZ6833 halt cycle progress until this signal deactivated. CardBus System Error: CardBus mode, this CSERR# signal. Card Detect: These inputs indicate OZ6833 that card socket. They internally pulled high voltage AuxVCC power pin. CardBus Card Detect: CardBus mode, these inputs used with CVS[2:1] detect presence type card. Card Enable driven OZ6833 during card access cycles control byte/word card access. -CE1 enables even-numbered address bytes, -CE2 enables odd-numbered address bytes. When configured 8bit cards, only -CE1 active used indicate access odd- evennumbered bytes. CardBus Address/Data: CardBus mode, this Card Enable driven OZ6833 during card access cycles control byte/word card access. -CE1 enables even-numbered address bytes, -CE2 enables odd-numbered address bytes. When configured 8bit cards, only -CE1 active used indicate access odd- evennumbered bytes. CardBus Command/Byte Enable: CardBus mode, this CCBEO# signal. Card Reset: This output normal operation goes high reset card. prevent reset glitches card, this signal high-impedance unless card seated socket, card power applied, card's interface signals enabled. CardBus Reset: CardBus mode, this CRST# output. Number Socket Socket TQFP TQFP I-PU Drive CardBus spec.
RDY/ -IREQ/ CINT#
I-PU
CardBus spec.
-WAIT/ CSERR#
I-PU
CardBus spec.
CD[2:1]/ CCD[2:1]#
126,
K16,
202,
I-PUSchmitt
CardBus spec.
-CE2/ CAD10
CardBus spec.
-CE1/ CCBE0#
CardBus spec.
RESET/ CRST#
CardBus spec.
OZ6833-DS-1.55
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OZ6833
Name1 BVD2/ -SPKR/ -LED/ CAUDIO Description2 Battery Voltage Detect 2/Speaker/ LED: Memory Card Interface mode, this input serves BVD2 (battery warning status) input. Card Interface mode, this input configured card's -SPKR binary audio input. non-ATA (SFF-68) disk-drive support, this input also configured drivestatus input. CardBus Audio: CardBus mode, this CAUDIO input. Number Socket Socket TQFP TQFP I-PU Drive
I-PU Battery Voltage Detect 1/Status Change/Ring Indicate: Memory Card Interface mode, this input serves BVD1 (battery-dead status) input. Card Interface mode, this input -STSCHG input, which indicates OZ6833 that card's internal status changed. Interrupt General Control register `1`, this serves ring indicate input wakeup-onring system power management support. CardBus Status Change: CardBus mode, this CSTSCHG. This used generate PME#. Voltage Sense This used VS2/ I/O-PU CB-spec CVS2 conjunction with determine operating voltage card. This internally pulled high voltage AuxVCC power under combined control external data write bits pull control bits. This connects PCMCIA socket CardBus Voltage Sense: CardBus mode, these pins CVS2 pin. Voltage Sense This used VS1/ I/O-PU CB-spec CVS1 conjunction with determine operating voltage card. This internally pulled high voltage AuxVCC power under combined control external data write bits pull control bits. This connects PCMCIA socket CardBus Voltage Sense: CardBus mode, these pins CVS1 pin. SOCKET_VCC Connect these pins supply 117, N17, 200, socket (pins T14, 160, A16, respective PCMCIA socket). These pins 3.3, depending card presence, card type, system configuration. socket interface outputs (listed this table, Table 2-2) will operate voltage applied these pins, independent voltage applied other OZ6833 groups. differentiate sockets diagram, socket- specific pins have either prefixes names indicated. example, A_A[25:0] B_A[25:0] independent address buses sockets. When socket configured drive interface, socket interface functions change.
BVD1/ -STSCHG/ -RI/ -CSTSCHG
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OZ6833
Power Control General Interface Pins
Name SPKR_OUT Description Speaker Output: This output used digital output speaker allow system support Card fax/modem/voice audio sound output. This output enabled setting socket's Misc. Control register (for socket whose speaker signal directed from BVD2/SPKR/-Led this pin). Output/SKTA_ACTV: This output used driver indicate disk activity when socket's BVD2/SPKR/-LED been programmed support. Mode(Index 3B/7B this indicates socket activity. socket activity refers Configuration Register offset (Mux Control register) Card Power Clock: This input used reference clock (10-100 kHz, usually kHz) control serial interface socket power control chips. A_VCC5#: This active-LOW output controls -volt supply socket's pins. active-LOW level this output mutually exclusive with that -VCC_3. Card Power Serial Data: This serves output DATA when used with serial interface Texas Instruments' TPS2202IDF socket power control chip. B_VCC3#: This active-LOW output controls 3.3-volt supply socket's pins. active-LOW level this output mutually exclusive with that -VCC_5. Card Power Serial Latch: This serves output LATCH when used with serial interface Texas Instruments' TPS2202IDF socket power control chip. B_VCC5#: This active-LOW output controls -volt supply socket's pins. active-LOW level this output mutually exclusive with that -VCC_3. Number TQFP Input Type Power Rail Drive 12mA
LED_OUT/ SKTA_ACTV
12mA
CPWRCLK/ A_VCC5#
12mA
CPWRDATA/ B_VCC3#
12mA
CPWRLATC/ B_VCC5#
12mA
OZ6833-DS-1.55
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OZ6833
Name A_VCC3# Description This active-LOW output controls 3.3-volt supply socket's pins. active-LOW level this output mutually exclusive with VCC_5#. This mode active only SktPwr Parallel mode enabled VPP_VCC: This active-HIGH output controls socket supply socket's VPP1 VPP2 pins. active-HIGH level this output mutually exclusive with that VPP_PGM. This mode active only SktPwr Parallel mode enabled VPP_VCC: This active-HIGH output controls socket supply socket's VPP1 VPP2 pins. active-HIGH level this output mutually exclusive with that VPP_PGM. This mode active only SktPwr Parallel mode enabled Number TQFP Input Type Power Rail Drive
A_VPP_VCC
B_VPP_VCC
Power, Ground, Reserved Pins
Name AUX_VCC Description This connected system's 5volt power supply. systems where volts available, this connected system's 3.3-volt supply your PCI_VCC CORE_VCC connected 3.3V This provides power core circuitry OZ6833. could connected power supply. OZ6833 ground pins should connected system ground. Number TQFP Input Type Power Rail Drive
CORE_VCC
134,
H16,
CORE_GND
101, 129,
A11, K17,
Legend
Type I-PU TO-PU OD-PU Description Input Input with internal pull-up Output Open-drain Tri-state output Tri-state output with internal pull-up Open-drain output with internal pull-up Power Power Rail Source Output's Power AUX_VCC: outputs powered from AUX_VCC A_SLOT_VCC: outputs powered from socket B_SLOT_VCC: outputs powered from socket PCI_VCC: outputs powered from power supply CORE_VCC: outputs powered from CORE_VCC
OZ6833-DS-1.55
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OZ6833
PACKAGE SPECIFICATIONS
OZ6833 208-PIN TQFP
O2MICRO, INC.
Symbol 0.002
INCHES 0.063 0.006
MILLIMETERS 0.05 1.35 0.17 0.09 1.40 0.22 1.60 0.15 1.45 0.27 0.20 GAGE PLANE
SEATING PLANE
0.053 0.055 0.057 0.007 0.009 0.011 0.004 1.181 1.102 1.181 1.102 0.020 BSC. 0.018 0.024 0.030 0.039 3.5° 0.008
0.25
30.00 BSC. 28.00 BSC. 30.00 BSC. 28.00 BSC. 0.50 BSC. 0.45 0.60 1.00 3.5° 0.75 SEC:
OZ6833-DS-1.55
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OZ6833
15mm 1.10mm
15mm
(Top View)
UTRPNMLKJHGFEDCBA
Index
0.48mm 0.05 0.8mm 1.10mm
1.10mm
(Bottom View)
OZ6833-DS-1.55
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ACPI CardBus Controller Single-chip CardBus host adapter Supports

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