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PM7325 S/UNI®-ATLAS-3200 Guaranteed Frame Rate (GFR) Policing wit


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PM7325 S/UNI®-ATLAS-3200
Guaranteed Frame Rate (GFR) Policing with Minimum Cell Rate Frame Tagging.
Gbit/s ALayer Solution
FEATURES
Monolithic single chip device which handles ALayer functions direction including VPI/VCI address translation, cell appending, cell rate policing, cell counting requirements (virtual connections). more PM7325 S/UNI®-ATLAS-3200 devices cascaded support additional VC's. Instantaneous transfer rate 3200 Mbit/s supports cell transfer rate 5.68x106 cells/s. configured Ingress mode device Egress mode device. POS-PHY/UTOPIA Level Switch interface supports 32-bit interface. Extended cell format supported byte cell). Packets processed buffered passed through transparently. Handles logical ports. Supports full duplex SCI-PHYBackwards Cell Interface Port which allows Ingress mode device Egress mode device communicate behave single bi-directional device. Supports 64-bit (with without parity) External Pipelined SRAM interface. Includes FIFO buffered 32-bit microprocessor interface cell insertion extraction, deterministic Table access, status monitoring configuration device. Per-PHY output buffering scheme resolves head-of-line blocking issue. Ingress Egress functions include flexible search engines that cover entire PHYID/VPI/VCI address range, dual leaky-bucket policing, per-VC cell counts, OAM-FM OAM-PM processing.
ITU-I.610 (1999) compliant both Ingress Egress directions. Complete Fault Management (AIS, RDI, processing, VP/VC, Segment/End-to-end flows VCs. Complete Performance Monitoring processing, VP/VC, Segment/Endto-end, Forward/Backward flows, Uni-directional VCs. Per-PHY AIS/RDI generation.
CELL COUNTING
Per-VC counts include CLP0 cells, CLP1 cells, cells, cells, invalid cells, cells violating contract total AAL5 frames. Per-PHY counts include CLP0 cells, CLP1 cells, cells, errored cells, unassigned/invalid cells policing violations. Per-device counts include total cells received/transmitted, physical layer cells.
POLICING
ITU-I.371, AForum TM4.1 compliant, per-VC programmable dual leaky-bucket policing with programmable action (tag, discard, count only) each bucket, each with three programmable noncompliant cell counts. Per-PHY single leaky-bucket policing with programmable action (tag, discard, count only).
BLOCK DIAGRAM
Cell Flow Pipelined SRAM Interface JTAG JTAG Interface Packet Bypass
Cell Processor
Address Resolution UL3/PL3 32-bit Cell/Packet Interface Output Input UL3/PL3 32-bit Cell/ Packet Interface Policing, OAM, Statistics, Translation
ICIF
OCIF
Table (EDRAM)
IBCIF
MPIF
OBCIF
SCI-PHY Master Interface
Microprocessor Interface
SCI-PHY Slave Interface
PMC-1990444 (p2)
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
Copyright PMC-Sierra, Inc. 2000
Preliminary PM7325 S/UNI®-ATLAS-3200
Gbit/s ALayer Solution
PACKAGING
Provides standard five signal P1149.1 JTAG test port boundary scan board test purposes. Implemented power, 0.18 micron, CMOS technology with embedded DRAM, external SRAM interface, external interfaces (excluding SRAM interface). Packaged Tape Ball Grid Array (TBGA) package.
APPLICATIONS
Core Aswitches. Wide Area Network ACore Edge Switches. AEnterprise Workgroup Switches. Broadband Access Multiplexers.
TYPICAL APPLICATION
S/UNI-ATLAS-3200 OC-48 PORT CARD APPLICATION
UTOPIA POS-PHY (Level
Ingress Direction
Ingress Mode S/UNI-ATLAS3200 (+SRAM)
Traffic Manager
(Backward Cell Interface)
Egress Mode S/UNI-ATLAS3200 (+SRAM) Traffic Manager
Switch Fabric
Egress Direction
Head Office: PMC-Sierra, Inc. #105 8555 Baxter Place Burnaby, B.C. Canada Tel: 604.415.6000 Fax: 604.415.6200
order documentation, send email document@pmc-sierra.com contact head office, Attn: Document Coordinator
product documentation available site http://www.pmc-sierra.com corporate information, send email info@pmc-sierra.com
PROPRIETARY CONFIDENTIAL PMC-SIERRA, INC., CUSTOMERS' INTERNAL
PMC-1990444 (p2) Copyright PMC-Sierra, Inc. 2000. rights reserved. March 2000 S/UNI registered trademark PMC-Sierra, Inc. SCI-PHY trademark PMC-Sierra, Inc.

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