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CDB5521/22/23/24/28 Evaluation Board Software Evaluation Gen


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CDB5521/22/23/24/28
CDB5521/22/23/24/28 Evaluation Board Software
Evaluation
General Description
CDB5521/22/23/24/28 inexpensive tool designed evaluate performance CS5521, CS5522, CS5523, CS5524, CS5528 Analog-to-Digital Converters (ADC). evaluation board includes voltage reference, 80C51 microcontroller, RS232 driver/receiver, firmware. 8051 controls serial communication between evaluation board firmware, thus, enabling quick easy access CS5521/22/23/24/28's registers. CDB5521/22/23/24/28 also includes installed sample, software Data Capture, Time Domain Analysis, Histogram Analysis, Frequency Domain Analysis. ORDERING INFORMATION CDB5521/22/23/24/28 Evaluation Board
Board Software Supports Chips: CS5521, CS5522, CS5523, CS5524, CS5528 Direct Thermocouple Interface RS-232 With Test Modes On-board 80C51 Microcontroller On-board Voltage Reference Windows/CVIEvaluation Software
Register Setup Chip Control Data Capture Analysis Time Domain Analysis Noise Histogram Analysis
On-board
Charge Pump Drive Circuitry
ANALOG
ANALOG
AGND
DGND
DIGITAL
VOLTAGE REFERENCE REF+ REFJ1 AIN1+ AIN1AIN2+ AIN2AIN3+ AIN3AIN4+ AIN4NBV DRIVE CIRCUITRY CRYSTAL 32.768 CRYSTAL 11.0592 RESET CIRCUITRY SCLK
CS5521 CS5522 CS5523 CS5524 CS5528
TEST SWITCHES LEDs
80C51 Microcontroller
RS232 CONNECTOR
RS232 DRIVER/RECEIVER
Preliminary Product Information
P.O. 17847, Austin, Texas 78760 (512) 7222 FAX: (512) 7581 http://www.cirrus.com
This document contains information product. Cirrus Logic reserves right modify this product without notice.
Copyright Cirrus Logic, Inc. 2000 (All Rights Reserved)
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TABLE CONTENTS
PART HARDWARE Introduction Using Evaluation Board 1.4. Power Connections Negative Bias Voltage Software 1.7. Writing Your Interface Software PART SOFTWARE Installation Procedure Menu Bars Overview Setup Window Overview Data FIFO Window Overview Histogram Window Overview Frequency Domain Window (i.e. FFT) Time Domain Window Overview Calibration Window Overview 2.10 Trouble Shooting Evaluation Board
LIST FIGURES
Figure CS5522 Analog Section Figure CS5524/28 Analog Section Figure Digital Section Figure Power Supplies Figure Main Menu Figure Setup Window Figure Data FIFO Window. Figure Frequency Domain Analysis Figure Calibration Menu Figure Time Domain Analysis Figure Histogram Analysis (Using CS5524 with default register settings 24-bit output words) Figure CDB5521/22/23/24/28 Component Side Silkscreen
Contacting Cirrus Logic Support
complete listing Direct Sales, Distributor, Sales Representative contacts, visit Cirrus Logic site
IBM, PS/2 trademarks International Business Machines Corporation. Windows trademark Microsoft Corporation. Windows trademarks National Instruments. SPIis trademark Motorola. MICROWIREis trademark National Semiconductor.
Preliminary product information describes products which production, which full characterization data available. Advance product information describes products which development subject development changes. Cirrus Logic, Inc. made best efforts ensure that information contained this document accurate reliable. However, information subject change without notice provided without warranty kind (express implied). responsibility assumed Cirrus Logic, Inc. this information, infringements patents other rights third parties. This document property Cirrus Logic, Inc. implies license under patents, copyrights, trademarks, trade secrets. part this publication copied, reproduced, stored retrieval system, transmitted, form means (electronic, mechanical, photographic, otherwise) without prior written consent Cirrus Logic, Inc. Items from Cirrus Logic website disk printed user. However, part printout electronic files copied, reproduced, stored retrieval system, transmitted, form means (electronic, mechanical, photographic, otherwise) without prior written consent Cirrus Logic, Inc.Furthermore, part this publication used basis manufacture sale items without prior written consent Cirrus Logic, Inc. names products Cirrus Logic, Inc. other vendors suppliers appearing this document trademarks service marks their respective owners which registered some jurisdictions. list Cirrus Logic, Inc. trademarks service marks found http://www.cirrus.com.
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Figure CDB5521/22/23/24/28 Component Side (top) Figure CDB5521/22/23/24/28 Solder Side (bottom)
LIST TABLES
Table Header Descriptions. Table Microcontroller Read/Write Commands RS-232 Table Microcontroller Conversion Commands RS-232 Table Microcontroller Self Calibration Commands RS-232 Table Microcontroller System Calibration Commands RS-232
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PART HARDWARE Introduction
CDB5521/22/23/24/28 evaluation board provides means testing CS5521/22/23/24/28 Analog-to-Digital Converters (ADCs). board interfaces converters IBMcompatible RS-232 interface while operating from power supply. accomplish this, board comes equipped with 80C51 microcontroller 9-pin RS-232 cable, which physically interfaces evaluation board Additionally, analysis software provides easy access internal registers converters provides means capture data display converters' time domain, frequency domain, noise histogram performance. reduce interference picked thermocouple leads. evaluation board provides voltage reference options, on-board external. With HDR5's jumpers positions LT1019 provides volts (the LT1019 chosen drift, typically 5ppm/°C). setting HDR5's jumpers position user supply external voltage reference J2's REF+ REF- inputs (Application Note details various voltage references). converters' serial interfaces SPIand MICROWIREcompatible. interface control lines (CS, SDI, SDO, SCLK) connected 80C51 microcontroller port one. interface different microcontroller chip, control lines available HDR6 (Header However, connect external microcontroller header, evaluation board must modified three ways: interface control traces going on-board 80C51 microcontroller, remove resistors R1-R6, remove 80C51 microcontroller from socket evaluation board. Figure illustrates schematic digital section. contains microcontroller, Motorola MC145407 interface chip, test switches. test switches debugging communication problems between CDB5521/22/23/24/28 microcontroller derives clock from 11.0592 crystal. From this, controller configured communicate RS-232 9600 baud, parity, 8-bit data, stop bit.
Evaluation Board Overview
board partitioned into main sections: analog digital. analog section consists either CS5521, CS5522, CS5523, CS5524 CS5528, precision voltage reference, circuitry generate negative voltage. digital section consists 80C51 microcontroller, hardware test switches, reset circuitry, RS-232 interface. CS5521/22/23/24/28 designed digitize level signals while operating from 32.768 crystal. shown Figures thermocouple connected converter's inputs J1's AIN+ AIN- inputs. Note, simple network filters thermocouple's output
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Analog 0.1µF 10µF
AGND AIN1+
10µF
0.1µF
32.768kHz
AIN1+ AIN13 AIN2+ AIN2-
4700pF
HDR1
0.1µF AIN1-
XOUT
HDR2
0.1µF AIN2+
CS5521 CS5522*
4700pF
HDR8
0.1µF AIN2-
SCLK DGND
Figure
Analog 0.1µF LT1019 TRIM 0.1µF 49.9
HDR9
0.1µF HDR5
0.033µF
VREF+ VREF-
1N4148
Analog REF+ REFJP5 0.1µF CS5521 CS5522 interchangeable 4700pF 0.1µF 10µF
1N4148 BAT85
HDR4
Analog
LM337_LZ VOUT
0.1µF
Figure CS5522 Analog Section
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CDB5521/22/23/24/28
Analog
0.1µF
10µF
AGND
10µF
0.1µF
CS5523 CS5524 CS5528*
4700pF HDR1 0.1µF HDR2 0.1µF AIN1+ AIN1AIN2+ AIN2AIN3+ AIN3AIN4+ AIN41 4700pF HDR8 0.1µF
HDR9
AIN1+/AIN1
32.768kHz
XOUT AIN1-/AIN2 SCLK DGND
AIN2+/AIN3
Figure
AIN2-/AIN4
0.1µF AIN3+AIN5
0.033µF
4700pF
HDR11 0.1µF HDR12 0.1µF AIN4+/AIN7 AIN3-/AIN6
1N4148
4700pF
HDR13
0.1µF AIN4-/AIN8
1N4148 10µF BAT85
HDR4
Analog 0.1µF LT1019 TRIM 0.1µF 49.9
HDR14 0.1µF
HDR5
VREF+ VREF-5V Analog LM337_LZ VOUT
Analog REF+ REFJP5 0.1µF 4700pF 0.1µF CS5523, CS5524 CS5528 interchangeable
0.1µF
Figure CS5524/28 Analog Section
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SCLK
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Digital HDR6 Digital HDR7 From RS-232 5.11k P2.0 RESET COMM GAINCAL OFFSETCAL XTAL1 P2.1 XTAL2 P2.3 Digital 0.1µF 80C51 P2.2 5.11k 5.11k Loopback TP71 TP72 10µF 47µF 0.1µF C2C1+ 10µF MC145407 10µF 10µF P1.0 P1.1 P1.2 P1.3 P1.4 Test Switch Test Switch Normal Test Switch P3.2 P3.3 P3.4 P1.5 RS-232 P3.0 P3.1 P0.0 LED_555_5003 RESET
From Figure
SCLK
33pF
11.0592MHz
33pF
Digital
1N4148
Bypass
750k
0.1µF
CDB5521/22/23/24/28
Figure Digital Section
CDB5521/22/23/24/28
Using Evaluation Board
CS5521/22/23/24/28 highly integrated ADCs. They contain multiplexer, instrumentation amplifier (IA), programmable gain amplifier (PGA), on-chip charge pump drive (CPD), programmable output word rates (OWR). provides gain while sets input levels either (for VREF provides square wave output. This output, along with diodes capacitors, used supply negative supply enabling measurements ground referenced signals. ADC's digital filter allows user select output word rates (OWR's) from 1.88 higher output word rates attained when faster clock source used. Since CS5521/22/23/24/28 have such high degree integration flexibility, CS5521/23 CS5522/24/28 data sheet should read thoroughly before consulted during CDB5521/22/23/24/28. Table lists different headers CDB5521/22/23/24/28 their functions. locations these headers marked board, silkscreen layout board also found this document Figures reference.
1.4.
Power Connections
Figure illustrates power supply connections evaluation board. Analog supplies analog section evaluation board, LT1019 ADC. Analog supplies negative bias voltage circuitry. Digital supplies separate five volts digital section evaluation board, 80C51, reset circuitry, RS-232 interface circuitry.
Negative Bias Voltage
evaluation board provides three means supplying Negative Bias Voltage (NBV). HDR4 (Header selects between them. When HRD4 position one, LM337 supplies with adjustable voltage. used adjust this voltage between -1.25 When position two, HDR4 grounds NBV. setting HDR4 position three, converter's Charge Pump Drive provides with rectified voltage, nominally -2.1
Note: should exceed voltage more negative than -3.0
Analog
Analog
Digital
Digital
P6KE6V8P AGND
47µF
0.1µF
P6KE6V8P DGND
47µF
0.1µF
P6KE6V8P Analog
47µF
0.1µF Analog
Figure Power Supplies
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Software
evaluation board comes with software RS-232 cable link evaluation board executable software developed with Windows/CVIand meant under Windows3.1 later. After installing software, read readme.txt file last minute changes software. Additionally, Section Part Software further details install software
Name HDR1 HDR2 HDR3 HDR4 HDR5 Function Description Used switch AIN1+ (AIN1 CS5528) between AGND. Used switch AIN1- (AIN2 CS5528) between AGND. Does exist. Used switch power from LM337, CPD, AGND. Used switch VREF+ VREFpins from external header board LT1019 reference. Used connect external microcontroller. Used conjunction with self test modes test UART/RS232 communication link between microcontroller Used switch AIN2 (AIN3 CS5528) between AGND. Used switch AIN2- (AIN4 CS5528) between AGND. Does exist. Used switch AIN3+ (AIN5 CS5528) between AGND. Used switch AIN3- (AIN6 CS5528) between AGND. Used switch AIN4+ (AIN7 CS5528) between AGND. Used switch AIN4- (AIN8 CS5528) between AGND. Table Header Descriptions
1.7. Writing Your Interface Software
Tables through list RS-232 commands used communicate between microcontroller. develop additional code communicate evaluation board RS-232, following applies: write internal register, choose appropriate write command byte (See Table transmit first. Then, transmit three data bytes lowest order byte (bits 7-0) first with each byte transmitted first. These three data bytes provide 24-bits information written desired register. read from internal register, choose appropriate read command byte transmit first. Then, microcontroller automatically acquires ADC's register contents returns 24-bits information. returned data transmitted lowest order byte first with each byte transmitted first.
HDR6 HDR7
HDR8 HDR9 HDR10 HDR11 HDR12 HDR13 HDR14
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Register Offset Register Physical Channel Offset Register Physical Channel Offset Register Physical Channel Offset Register Physical Channel Offset Register Physical Channel Offset Register Physical Channel Offset Register Physical Channel Offset Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Gain Register Physical Channel Configuration Register Conversion Data FIFO Channel Setup Registers
Read Command (HEX)
Write Command (HEX)
Table Microcontroller Read/Write Commands RS-232 Perform Conversion Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Normal Conversion Setup Table Microcontroller Conversion Commands RS-232 Conversion Command (HEX)
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Self-Offset Calibration Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self-Offset Calibration Setup Self Gain Calibration Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup Self-Gain Calibration Setup
Calibration Command (HEX) Calibration Command (HEX)
Table Microcontroller Self Calibration Commands RS-232
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System-Offset Calibration System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System-Offset Calibration Setup System Gain Calibration System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup System-Gain Calibration Setup Miscellaneous Commands Variable Normal Conversions Serial Port Initialization Reset Converter Arbitrary Read Arbitrary Write
Calibration Command (HEX) Calibration Command (HEX) Command
Table Microcontroller System Calibration Commands RS-232
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PART SOFTWARE Installation Procedure
install software: Turn running Windows 95or later. Insert Installation Diskette into Select option from Start menu. prompt, type: A:\SETUP.EXE <enter>. program will begin installation. already been installed user will prompted enter directory which install Run-Time EngineTM. Run-Time Enginemanages executables created with Windows/CVITM. default directory acceptable, select Run-Time Enginewill installed there. After Run-Time Engineis installed, user prompted enter directory which install CDB55521/22/23/24/28 software. Select accept default directory. Once program installed, double clicking Eval5522 icon, through Start menu.
Note: however, will work with 1024 resolution. user interface seems little small, user might consider setting display settings 480. (640x480 chosen accommodate variety computers).
menu item Menu initially disabled. This eliminates conflicts with mouse concurrent modems. Before proceeding further, user prompted select serial communication port. initialize port, pull down option Setup from menu select either COM1 COM2. After port initialized, good idea test RS-232 link between evaluation board. this, pull down Setup menu from menu select option TESTRS232. user then prompted evaluation board's test switches then reset board. Once this done, proceed with test. test fails, check hardware connection repeat again. Otherwise, test switches (normal mode) reset board. option Menu available performance tests executed. evaluation software provides three types analysis tests Time Domain, Frequency Domain, Histogram. Time Domain analysis processes acquired conversions produce plot Conversion Sample Number versus Magnitude. Frequency Domain analysis processes acquired conversions produce magnitude versus frequency plot using Fast-Fourier transform (results Fs/2 calculated plotted). Also, statistical noise calculations calculated displayed. Histogram analysis test processes acquired conversions produce histogram plot. Statistical noise calculations also calculated displayed (see Figures through evaluation software developed with Windows/CVITM, software development package from National Instruments. More sophisticated analysis software developed purchasing development package from National Instruments (512-794-0100).
Using Software
start-up, window Start-Up appears first (Figure This window contains information concerning software's title, revision number, copyright date, etc. Additionally, screen menu which displays user options. Notice,
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Menu Bars Overview
menu controls link between windows allows user exit program. also allows user initialize serial port load presaved data conversions from file. principal windows Start-Up, Setup Window, Power Spectrum Window (also referred window), Histogram Window, Time Domain Window, Calibrate Window. Specifically, menu following control items: Menu select, click option Menu from menu bar, associated keys. items associated with MENU listed described below. Start-Up Window (F1) Setup Window (F2) Power Spectrum Window (F3) Histogram Window (F4) Time Domain Window (F5) Calibrate Window (F6) file. file must comply with CDBCAPTURE file save format. format part number, throughput sample rate), number conversions, maximum range, data conversions. user prompted enter path file name previously saved data. prevent hardware conflicts, this option deactivated while Setup Window. TESTRS232 This test mode tests ability communicate evaluation board. consists subtests: test link between RS232 interface circuitry; test RS-232 link between microcontroller. HDR7 distinguishes these subtests. HDR7 Normal test complete communication link. HDR7 Loop Back test link between RS-232 Circuitry Then, test switches reset evaluation board. LED's should indicate binary signifying that hardware ready initiate test. complete test, user must initialize First, SETUP menu select communications port then select TESTRS232 option. From there, user prompts navigate user through test. indicates test passes fails. Once either test complete, LED's toggle indicate that test mode complete.
These menu items allow user navigate between windows. They available times menu keys. Setup select, click option Setup from menu bar. functions available under Setup are: COM1 When selected, COM1 initialized 9600 baud, parity, data bits, stop bit. COM2 When selected, COM2 initialized 9600 baud, parity, data bits, stop bit. Load From Disk Used load display previously saved data conversions from
Part Allows user select different converter. Quit Allows user exit program.
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Setup Window Overview
Setup Window (Figure allows user read write internal register converter either binary hexadecimal, acquire real-time conversions. quick access control icons that quickly reset converter, reset converter's serial port, self-calibrate converter's offset gain. following controls indicators associated with this window. Acquire Data This control icon. When pressed, transmits collect single conversion command microcontroller. microcontroller turn collects conversion from returns stores conversion collects additional conversions form set. From sample collected, high, low, peak-to-peak, average, standard deviation, computed (the size data Average input) then display icons updated. This process continues until STOP button pressed, until another window selected.
Note: quick access control icons disabled once Acquire selected. This eliminates potential hardware conflicts.
down menu above register decode select between different registers. Hexadecimal Icons Nine input/display icons that allow user set/clear bits configuration, channel setup registers hexadecimal nibbles. upper nibbles registers zero's, leading zero nibbles need entered. Average Input icon that sets size data conversion referred after Acquire Icon activated. Reinitialize Port This control icon. When pressed, logic followed logic sent ADC's serial port reset port. does reset RS-232 link. Reset This control icon. When pressed, microcontroller sends appropriate commands return converter initial default state. Stop Stops collection conversion data. Update Icons This control icon. When pressed configuration channel -setup registers contents acquired. Then, configuration text register content icons updated. Data FIFO Window This button opens Data FIFO Window when pressed.
Binary Icons Input icons array set/clear individual bits configuration channel-setup registers. respective registers set/cleared soon icon clicked.
Channel Selects Setup that will accessed perform conversions when Acquire Data activated.
Register Decode Text display that displays decoded meaning each configuration register channel setup registers. pull-
Data FIFO Window Overview
following describes controls available Data FIFO Window (Figure
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Acquire Data This icon begins conversion cycle based selection Depending status these bits, software will instruct converter single conversions collect data FIFO, display information screen. Pressing STOP button will conversion cycle. other icons disabled during conversion cycles avoid hardware conflicts. MC/LP/RC Selection This allows user select between different types conversion cycles available modifying bits configuration register (refer CS5521/22/23/24/28 data sheet more information). Channel Selects Setup that will accessed single conversions this ignored. Data FIFO Boxes These boxes display information returned from data FIFO buffer when single conversion will displayed number Channel Data Boxes When using CS5521/23, these boxes will contain conversion channel information returned with data word. When using CS5522/24/28, these boxes will inactive. Displays x-axis value cursor Histogram. Cancel Once selected, allows user exit from COLLECT algorithm. data conversion sample sets larger than being collected CANCEL button selected, recommended that user reset evaluation board. board will eventually recover from continuous collection mode, recovery time could long minutes. Channel Selects Setup that will accessed perform conversions when COLLECT activated. Collect Initiates data conversion collection process. COLLECT modes operation: collect from file collect from converter. collect from file appropriate file from SETUPDISK menu option must selected. Once file selected, content displayed graph. user collecting real-time conversions analyze, appropriate port must selected. user then free collect preset number conversions (preset CONFIG pop-up menu discussed below). Notice, there significant acquisition time difference between methods. Config Opens pop-up panel configure much data collected, process data once collected. following controls indicators associated with CONFIG panel. Samples User selection 128, 256, 512, 1024, 2048, 4096, 8192 conversions.
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Histogram Window Overview
following description controls indicators associated with Histogram Window (Figure 11). Many control icons usable from Histogram Window, Frequency Domain Window, Time Domain Window. brevity, they only described this section.
CDB5521/22/23/24/28
Window Used Power Spectrum Window calculate FFT. Windowing algorithms include Blackman, Blackman-Harris, Hand, 5-term Hodie, 7term Hodie. 5-term Hodie 7-term Hodie windowing algorithms developed Crystal Semiconductor. information concerning these algorithms needed, call technical support. Average Sets number consecutive FFT's perform average. Limited Noise Bandwidth Limits amount noise converters bandwidth. When zero, limited noise calculations done. Bandwidth Used Power Spectrum Window allow user-scalability frequency axis. When zero, axis auto-scaled one-half output word rate. Accept changes print current screen, print current graph. RESTORE Restores display graph after zoom been entered. STD. DEV. Indicator Standard Deviation collected data set. VARIANCE Indicates Variance current data set. ZOOM Control icon that allows operator zoom specific portion current graph. zoom, click ZOOM icon, then click graph select first point (the point left corner zoom box). Then click graph again select second point (the point bottom right corner zoom box). Once area been zoomed OUTPUT functions used print hard copy that region. Click RESTORE when done with zoom function.
MAGNITUDE Displays y-axis value cursor Histogram.
Frequency Domain Window (i.e. FFT)
following describe controls indicators associated with Frequency Domain Analysis (Figure CANCEL description Section 2.6, Histogram Window Overview. Channel description Section 2.6, Histogram Window Overview. COLLECT description Section 2.6, Histogram Window Overview.
MAXIMUM Indicator maximum value collected data set.
MEAN Indicator mean data sample set. MINIMUM Indicator minimum value collected data set.
Output Control that calls pop-up menu. This menu controls three options: save current data file with CDBCAPTURE format
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Config description Section 2.6, Histogram Window Overview. FREQUENCY Displays x-axis value cursor display. MAGNITUDE Displays y-axis value cursor display. Output description Section 2.6, Histogram Window Overview. Indicator Signal-to-Distortion Ratio, harmonics used calculations (decibels). S/N+D Indicator Signal-to-Noise Distortion Ratio (decibels). Indicator Signal-to-Noise Ratio, first harmonics included (decibels). S/PN Indicator Signal-to-Peak Noise Ratio (decibels). ZOOM description Section 2.6, Histogram Window Overview. Displays number FFT's averaged current display.
Time Domain Window Overview
following controls indicators associated with Time Domain Analysis (Figure 10). CANCEL description Section 2.6, Histogram Window Overview. Channel description Section 2.6, Histogram Window Overview. COLLECT description Section 2.6, Histogram Window Overview. Config description Section 2.6, Histogram Window Overview. COUNT Displays current x-position cursor time domain display. MAGNITUDE Displays current y-position cursor time domain display. MAXIMUM Indicator maximum value collected data set. MINIMUM Indicator minimum value collected data set. Output description Section 2.6, Histogram Window Overview. ZOOM description Section 2.6, Histogram Window Overview.
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Calibration Window Overview
following controls indicators associated with Calibration Menu (Figure GAIN DECODE Eight display boxes that displays decoded meaning each gain register. Gain Hexadecimal Icons Eight input/display icons that allow user set/clear bits eight gain registers hexadecimal nibbles. upper nibbles registers zero's, then leading zero nibbles need entered. Offset Hexadecimal Icons Eight input/display icons that allow user set/clear bits eight offset registers hexadecimal nibbles. upper nibbles registers zero's, then leading zero nibbles need entered. Self-Gain Used perform self-gain calibration using chosen Setup. Self-Offset Used perform self-offset calibration using chosen Setup. Shift Gain Register Sixteen input icons used shift contents gain registers either left right. Once shifted data respective gain registers ends lost. System-Gain Used perform system-gain calibration using chosen Setup. System-Offset Used perform system-offset calibration using chosen Setup. Update Icons This control icon. When pressed offset gain registers read. Then, register content icons updated.
2.10 Trouble Shooting Evaluation Board
This section describes special test modes incorporated microcontroller software diagnose hardware problems with evaluation board.
Note: enter these modes, test switches appropriate position reset evaluation board. re-enter normal operation mode, switches back binary zero reset board again.
Test Mode Normal Mode This default mode operation. enter this mode, test switches reset board. evaluation board allows normal read/writes ADC's registers. LED's toggle then after reset, then only when communicating with Test Mode Loop Back Test This test mode checks microcontroller's onchip UART. enter this mode, test switches 001, HDR7 loop back, then reset board. communication works, LED's toggle. Otherwise, only LED's toggle indicate communication problem. Test Mode Read/Write This test mode tests microcontroller's ability read write ADC. enter this mode, switches reset board. this test mode, ADC's configuration, offset, gain registers written then read from. correct data read back, LED's toggle. Otherwise, only half them toggle indicate error.
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Test Mode Continuously Acquire Single Conversion This test mode repetitively acquires single conversion. enter this mode, test switches press reset. binary three indicated LED's. probing HDR6 using triggering pin, oscilloscope logic analyzer will display real-time microcontroller reads conversion data. Test Mode Reserved future modifications. Test Mode Continuously Read Gain Register This test mode repetitively acquires gain registers default contents (0x800000 HEX). enter this mode, test switches press reset. LED's should indicate binary five. probing HDR6 using triggering pin, oscilloscope logic analyzer will display real-time microcontroller acquires conversion. Test Mode Microcontroller RS-232 Communication Link Test This test mode tests ability communicate evaluation board. consists subtests: test link between RS-232 interface circuitry; test RS-232 link between microcontroller. HDR7 distinguishes these subtests. HDR7 Normal test complete communication link. HDR7 Loop Back test link between RS-232 Circuitry Then, test switches reset evaluation board. LED's should indicate binary signifying that hardware ready initiate test. complete test, user must initialize First, SETUP menu select communications port then select TESTRS232 option. From there, user prompts navigate user through test. indicates test passes fails. Once either test complete, LED's toggle indicate that test mode complete. Test Mode Toggle LED's This test mode tests evaluation board LED's. enter this mode, test switches reset board. mode passes, LED's toggle.
Note: Remember, return normal operating mode, test switches binary zero, return HDR7 Normal, reset evaluation board.
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Figure Main Menu
Figure Setup Window DS317DB2
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Figure Data FIFO Window
Figure Frequency Domain Analysis DS317DB2
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Figure Calibration Menu
Figure Time Domain Analysis
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Figure Histogram Analysis (Using CS5524 with default register settings 24-bit output words)
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Figure CDB5521/22/23/24/28 Component Side Silkscreen
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Figure CDB5521/22/23/24/28 Component Side (top)
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Figure CDB5521/22/23/24/28 Solder Side (bottom)
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