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Based part paper presented Power Electronics Technology 2003 conferenc
Top Searches for this datasheetEliminating Parasitic Oscillation between Parallel MOSFETs Based part paper presented Power Electronics Technology 2003 conference titled "Issues with Paralleling MOSFETs IGBTs" Jonathan Dodge, P.E. Senior Applications Engineer Advanced Power Technology S.W. Columbia Street Bend, 97702 Parasitic oscillation problem that unfortunately gone away MOSFETs have evolved over years remains main problems that occur when paralleling MOSFETs. Parasitic oscillation however effectively eliminated with ferrite bead combined with resistor gate each MOSFET. This application note describes nature parasitic oscillation explains ferrite bead solution effective. Although only MOSFETs discussed, phenomenon parasitic oscillation techniques elimination equally affect IGBTs. Gate voltages Drain Voltage Eoff 310µJ Total Drain Current Switching Energy Figure Parasitic oscillation between MOSFETs Nature Parasitic Oscillation been shown [1], that parasitic oscillation occurs during switching transient when drain voltage transitions. Figure shows parasitic oscillation between parallel APT5024BLL Power MOS7® MOSFETs from Advanced Power Technology, rated Volts, Amps. Each MOSFET gate resistor between gate gate driver. applied drain-source voltage Volts, total current Amps, temperature gate drive supply voltage Volts. single Micrel MIC4452 gate driver used with symmetrical gate connection layout. seen Figure oscillation gate very high frequency. Parasitic oscillation frequencies typically range 50MHz 250MHz. Such oscillation condition unacceptable because cause over-voltage transients gate, radio frequency noise emission, high switching losses, even lead uncontrolled, sustained oscillation destruction more devices. Figure shows oscillation during turn-off, turn-on oscillation also present this case. Quite often conditions oscillation different turn-on than turn-off, oscillation will only occur other. size, capacitances, gain, circuit parasitic elements some factors that affect parasitic oscillation. Parasitic oscillation most easily detected gates also exists drain currents drain voltages, even through drains "shorted together". Parasitic oscillation push-pull situation where voltages currents oscillate phase between devices. Parasitic oscillation very intermittent nature, compounded fact that impedance test probes some cases eliminate making difficult prove existence. Also, same MOSFETs that won't oscillate circuit oscillate another differences circuit layout. general, conditions oscillation are: Gain Phase shift 180° MOSFET plenty gain, there 180° phase shift. Also dramatically varying voltage-dependent gate drain capacitance provides non-linear feedback. Certainly conditions necessary oscillation present when paralleling. important note that energy parasitic oscillation comes from drain from gate. rapid change drain-source voltage during switching transient induces current from drain through reverse transfer capacitance gate circuitry. dv/dt high enough, magnitude current injected gate sufficient build voltage across gate impedances (equivalent gate resistance MOSFET, bond wires package, stray inductances circuit, gate resistance). This cause MOSFETs become more fully enhanced (turn itself on), causing sudden imbalance current sharing also drain voltage each MOSFET. This variation drain voltage supported across stray inductances between MOSFET dice. This sudden imbalance excites oscillation resistive-inductivecapacitive (RLC) tank circuit involving capacitances each MOSFET die, parasitic inductances their interconnections, gate resistances. Increasing gate resistance dampens tank circuit often effective preventing oscillation first place because reduced dv/dt. Unfortunately higher gate resistance also slows down switching. increased gate resistance sufficient prevent oscillation sometimes results unacceptably high switching losses. susceptibility parasitic oscillation related peak drain dv/dt because this affects peak drain-gate current during switching. figures show peak drain dv/dt di/dt values respectively various gate resistance values, measured single APT5024BLL MOSFET. Note that dv/dt di/dt constant during switching, Figures show only maximum values each. Rise fall times drain voltage current (measured between final values) roughly proportional gate resistance switching energies, which shown Figure measurements were made room temperature with applied drain-source voltage Volts, gate drive supply Volts, switching Amps. includes diode reverse recovery current from Volt, fast recovery diode. Peak dv/dt dv/dt(on) dv/dt (V/ns) (Ohms) dv/dt(off) Peak drain dv/dt turn-off very sensitive gate resistance, well peak di/dt both turn-on turn-off. Beyond "knee" these curves, increasing gate resistance yields diminishing benefits terms limiting energy induced into oscillating circuit, switching energies increase steadily. oscillations persist even with large values gate resistance, some other technique required eliminate oscillation while keeping switching losses acceptable level. Ferrite Beads been found that ferrite bead combined with resistor each MOSFET gate eliminates parasitic oscillation while minimizing switching losses. fact, adding ferrite bead more effective than using gate resistance alone because impedance ferrite bead directly proportional frequency. bandwidth gate drive signal about 2MHz, whereas parasitic oscillation frequency many times higher, from about 50MHz 250MHz. impedance ferrite bead oscillation noise times higher than impedance gate drive signal. This high impedance extremely effective blocking drain gate noise current. Given enough inductance ferrite bead combined with sufficient damping from gate resistance, parasitic oscillation completely reliably eliminated. ferrite bead also used with single MOSFET that connected parallel with other MOSFETs. effect same; high frequency noise gate blocked, eliminating tendency oscillations. Figure shows clean turn-off switching transient same parallel pair APT5024BLL MOSFETs that were oscillating Figure difference that ferrite Figure Peak drain dv/dt gate resistance Peak di/dt di/dt(on) (Ohms) di/dt(off) Figure Peak drain di/dt gate resistance Switching Energy Switching Energy (µJ) di/dt (A/ns) Eoff (Ohms) Figure Switching energies gate resistance bead added series with resistor each MOSFET gate. Gate voltages Gate voltages Drain Voltage Drain Current 863µJ Drain Current Eoff 460µJ Switching Energy Drain Voltage Switching Energy Figure APT50M65LLL Turn-on, with series ferrite bead each gate, 333V, 100A, Figure APT5024BLL Turn-off, with series ferrite bead each gate, 333V, 44A, Gate voltages Turn-on these paralleled MOSFETs just dramatic change turn-off. Drain Current Eoff 1473µJ Gate voltages Drain Voltage Switching Energy Drain Current 801µJ Drain Voltage Switching Energy Figure APT50M65LLL Turn-off, resistor only each gate, 333V, 100A, Figure APT50M65LLL Turn-on, resistor only each gate, 333V, 100A, Figure parallel APT50M65LLL MOSFETs oscillating during turn-on, each with resistor gate. same MOSFETs were used Figure this time with only resistor series with small ferrite bead each gate. oscillation eliminated expense about increase Eon. Turn-on delay increased very slightly. Figures shows turn-off just beginning oscillate, Figure oscillation gone. same resistor resistor with series ferrite bead combinations were used Figures This time ferrite bead with small series resistance resulted decrease Eoff, spite fact that turn-off delay increased. Note that gates Figure verge oscillating, slight increase gate impedances would optimum. Zener Clamp Diodes Gate voltages Drain Current Eoff 1249µJ common practice install zener diode between gate source leads. This effective reducing noise switching frequencies with long gate drive lead lengths, many motor drives. Zener diodes however ineffective absorbing noise frequencies tens megahertz. Ohms Drain Voltage Switching Energy Figure APT50M65LLL Turn-off, with series ferrite bead each gatge, 333V, 100A, resistance alone were used eliminate oscillations shown Figures switching energies would higher than with ferrite beads (and lower resistance) each gate. Ferrite beads very attractive solution. They inexpensive, small, simple use. There variety ferrite beads available with different characteristics. Switching energies optimized experimenting with different combinations resistance bead inductance. Some ferrite beads have very flat inductive reactance with steadily increasing resistance with increasing frequency. ferrite beads large lossy enough, gate resistors eliminated. seem that adding inductance gate drive circuit solves parasitic oscillation problem. Best design practice dictates minimizing gate drive inductance using very tight circuit layout. with gate drive layout however isn't much inductance rather loop area [3]. problem with large loop area loop acts antenna, which pick high frequency noise. [2], long gate drive lead lengths actually eliminated parasitic oscillation increased stray gate drive inductance. Figure Zener Impedance Frequency, DO-41 Package Figure shows measured frequency response Volt zener diode DO-41 package. leads were about length, about what needed solder through circuit board. impedance purely capacitive about 250MHz, higher frequency package inductance dominates, making zener diode like inductor. Just like regular diode, zener diode capacitance reduces with increasing reverse bias voltage. presence zener diode attached gate adds small, voltage frequency dependent capacitance tank circuit where parasitic oscillation occur. added capacitance usually makes difference though because zener diode capacitance small compared input capacitance MOSFET. Figure Zener Oscillation Breakdown Voltage Figure shows oscillation zener with cathode-anode voltage zener breakdown voltage. 15V, 0.5W zener DO-41 package connected series with resistor, voltage applied across zener resistor combination. scope probe attached across zener diode with trigger coupling. With slight change applied voltage, either lower higher, oscillation stops. zener diode only oscillates begins avalanche. This zener oscillation found least case actually increase susceptibility paralleled MOSFETs into parasitic oscillation. Whether this happens depends course circuit parasitic impedances components. Since adding gate-source zener diode does effectively restrict high frequency noise parasitic oscillation, best leave them out. They however useful suppressing frequency noise, such motor drive application with long gate drive lead lengths. Peak drain dv/dt di/dt non-linear functions gate resistance. effectiveness reducing peak dv/dt di/dt decreases switching energies steadily increase with increasing gate resistance. Ferrite beads very effective eliminating parasitic oscillation while minimizing switching losses because they like frequency-dependent gate resistor. Installing zener diode between gate source does control parasitic oscillation. References Oxner; "Analyzing Controlling Tendency Oscillation Parallel Power MOSFETs", Proceedings Powercon 1983 Severns; "Controlling Oscillation Parallel Power MOSFETs", Proceedings PCI, October 1984 Dierberger, Grafam; "Optimizing Design 3.5kW Single-MOSFET Power Factor Correctors", Application Note APT9901, Advanced Power Technology Kassakian, Lau; Analysis Experimental Verification Parasitic Oscillations Paralleled Power MOSFETs", IEEE Transactions Electronic Devices, Vol. ED-31, July 1984 Giandomenico; "Anomalous Oscillations Turn-Off Behavior Vertical Power MOSFET", Application note, Siliconix Severns, Oxner; "Parallel Operation Power MOSFETs", Technical Article 84-5, Siliconix Inc. Hall; "Paralleling MOSFETs Successfully", Electronic Products, June 1985 Conclusions Parasitic oscillation between parallel transistors unacceptable because greatly reduced reliability, possibly reduced efficiency, radio frequency noise. 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