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Additional file AP162903.EXE available In-System Programming C163


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Microcontrollers ApNote AP1629
Additional file AP162903.EXE available
In-System Programming C163 Flash Devices
Siemens C163-16F 16-bit microcontrollers provide KBytes Flash memory on-chip. This application note gives hints examples in-system programming C163 Flash devices. In-system programming supported Windows-based OTP/ Flash memory programming tool "Memtool".
Author Peter Microcontroller Application Support
Semiconductor Group
04.98,
C163 Flash Memory Programming
Contents
Page
Flash Memory Overview Flash Memory Configuration Flash Command Register Programming Examples Example ,,Read Flash Status" Example ,,Burst Write" Example ,,Sector Erase" Flash operation control using Flash Status Register Memtool OTP/ Flash Memory Programming Tool
Appendix flash.h flash.c
AP1629 ApNote Revision History Actual Revision 04.98 Page Page actual Rev. prev.Rel. Previous Revision 07.97 Subject changes since last release correction figure changing expression ,,immediate" into ,,direct" flash operation control flash memory programming tool "Memtool"
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Flash Memory Overview C163 Flash devices provide KBytes electrically erasable reprogrammable nonvolatile flash EPROM on-chip both instruction code constant data. C163 flash module uses standard Volt power supply read write erase functions. standard read mode (the normal operating mode) flash memory appears like on-chip with same timing functionality. Instruction fetches data operand reads performed with addressing modes C16x instruction set. other operations besides normal read operations initiated controlled protected simple command sequences written flash address/ command register. case command write addresses care must taken because addressing modes C16x instruction allowed. integrated state machine flash memory programming erase directly controlled commands. Therefore special algorithms programming erase verify operations respectively required. flash status register (FSR) reflects overall status flash module after reset after reception different commands. Sector specific states also indicated FSR. Note that real register (SFR GPR) rather virtually mapped into active address space flash memory. entire flash memory divided into four sectors with same size (32/ KByte). This allows erase each block separately, when only parts flash memory need reprogrammed. flash module provides burst mechanism data write operations which allows collect words assembly burst register before being written flash programming cycle. flash module offers access time allowing operation with without wait states. Programming typically takes burst (effectively word), sector erasing typically takes ms.The flash memory features typical endurance more than 1000 erase/ programming cycles. Erased flash memory cells contain '0's. flash memory programmed both appropiate programming board (not available yet) target system which provides flexibility. long C163 Flash on-chip flash memory pre-programmed) bootstrap loader necessary load start programming code from external memory program flash before soldering1). code that programs erases flash memory locations must executed from memory outside on-chip flash memory itself (on-chip external memory). lower KBytes on-chip flash memory C163 Flash mapped either segment (00'0000H 00'7FFFH) segment (01'0000H 01'7FFFH) during initialization phase allow external memory used additional system flexibility. upper KBytes on-chip flash memory assigned locations 01'8000H 02'FFFFH.
ApNote AP1638 "Bootstrap Loader C163 Flash"
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Page Segment Page Page Page Page Segment Page Page Page Page Segment Page Page Page
02'FFFFH 02'C000H 02'8000H 02'4000H 02'0000H 01'C000H 01'8000H 01'4000H 01'0000H 00'C000H 00'8000H 00'4000H 00'0000H KByte Flash Memory Sector Sector Sector (32K) Sector (32K) Sector (96(32K)
01'FFFFH
01'8000H
01'0000H
00'8000H
Mapping
00'0000H
Physical Flash Address
C16x Memory Configuration
Figure C163 Flash Memory Overview
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Flash Memory Configuration
Upon reset default memory configuration C163 Flash determined state pin. When internal flash memory disabled startup code fetched from external memory. order access on-chip flash memory after booting from external memory internal flash memory must enabled software setting ROMEN register SYSCON. lower KBytes flash memory mapped segment segment controlled ROMS1 register SYSCON. Mapping segment preserves external memory containing startup code, while mapping segment replaces lower KBytes external memory with onchip flash memory. this case valid vector table must provided. on-chip flash memory covers more than segment segmentation should enabled clearing SGTDIS register SYSCON) order whole internal flash into address space. Whenever internal memory configuration C163 Flash changed (mapping, enabling, disabling) following procedure must used ensure correct operation: Configure internal flash memory required Execute inter-segment branch (JMPS, CALLS, RETS) Reload four registers
Note: Instructions that configure internal flash memory only executed from internal from external memory, from flash itself. Register SYSCON only modified before execution EINIT instruction. Note: detailed informations concerning handling internal non-volatile memory please refer users manual, chapter ,,System Programming" (Handling Internal ROM/ Pits, Traps Mines).
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Flash Address/ Command Register
Flash operations selected writing specific address data sequences address/ command registers. Writing incorrect address data values writing them improper sequence will reset module command sequence error flag SQER status register. valid command sequences shown figure Command Sequence Reset Read Enter Burst Load Load Burst Data Store Burst Erase Sector Read Flash Status Clear Status
Default:
Cycle
Addr
AAAA AAAA A0F2 AAAA AAAA AAAA AAAA xxF0 xx50
Cycle
(RA) (RD) xx55 xx55 Status
Cycle
(RA) (RD)
Cycle
(RA) (RD)
Cycle
(RA) (RD)
Cycle
Data
(RD) (RA)
Data Addr
Data Addr
Data Addr
Data Addr
Data Addr
xxAA 5554 xxAA 5554 xxFA xxF5
AAAA AAAA
xxA0 xx80
5554
xxAA AAAA xx55 xx30
Addresses data values which belong write command cycle Read address; memory address read data Data read from location during read operation Write address; address memory location programmed Data loaded into burst assembly register before being stored (written) flash memory Address sector erased sampled status Irrelevant Read Access
Figure Command Sequence Table
Note: When accessing flash address/ command register care must taken: command write addresses have located within active flash memory space. active flash memory space that address range which covered flash. When using data page pointer (DPP) addressing make sure that address bits command addresses reflected both LSBs selected data page pointer (A15 DPPx.1 DPPx.0). case command write addresses recommend values which point segment (e.g. DPP1 DPP2 0Ah) independent sector mapping. Another possibility extended segment instruction addressing. Note: Direct addressing mode allowed flash address/ command register operations. aware that compiler uses this kind addressing. Note: flash address/ command register operations always indirect addressing mode.
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Principle Flash Address/ Command Register Addressing DPP1, adjust data page pointers according addresses DPP2, Rwm, #ADDRESS ADDRESS could dedicated unlock sequence address (AAAAh, 5554h.) flash write address Rwn, #DATA DATA could dedicated unlock sequence data (xxF0h, xx50h.) data loaded into assembly register [Rwm], indirect addressing
using extended segment instruction: Rwm, #ADDRESS ADDRESS could dedicated unlock sequence address (AAAAh, 5554h.) Flash write address Rwo, #DATA DATA could dedicated unlock sequence data (xxF0h, xx50h.) data loaded into assembly register Rwn, #SEGMENT value SEGMENTrepresents sector number could case (depending sector mapping) EXTS Rwn, #LENGTH value determines 8-bit segment valid corresponding data access long indirect address EXTS instruction. LENGTH defines length effected instruction sequence value between (see instruction manual) [Rwm], indirect addressing
Note: EXTS instruction must used carefully. Please refer instruction manual.
Programming Examples
following examples written ,,assembler" Most microcontroller programs written ,,C" language where data page pointers automatically compiler. However taken into account that compiler uses allowed direct addressing flash address/ command register operations. this case necessary perform flash address/ command register accesses (command sequences) with assembler in-line routines which indirect addressing.
Note: appendix find runable flash routines, written ,,C" assembler in-line (Tasking). These flash routines only examples, they subject OTP/ Flash memory programming tool ,,Memtool".
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Example Performing command ,,Read Flash Status"
assume that initialization phase lowest flash memory (sector have been mapped segment According usual C16x data addressing with data page pointers, address bits 16-bit command write address select data page pointer (DPP) which contains upper bits building 24-bit physical data address. Address bits A13.A0 represent address offset. case command write address AAAAh (1010 1010 1010 1010 selects data page pointer (DPP2). have make sure, that DPP2 points active flash memory space, address bits reflected both lower bits DPP2 mentioned above).
independent mapping sector choose DPPs which selected both MSBs command write addresses values which point segment this reason load DPP2 with value 1010b). flash status register ,,FSR" reflects overall status flash module after Reset after reception different commands. sector specific state ("sector erased") also indicated FSR. Therefore have decide from which flash sector like specific state information. example indicates specific state sector #0AAAAh dpp0, #04h dpp2, #0ah #0FAh [r2], #00h load auxilary register with command address (used cycle data page pointer (used cycle determines sector sector sector sector 0Ah= sector pointer flash segment (used cycle load auxilary register with command data (used cycle write command data dedicated command address (cycle load auxilary register with address sector sampled status (used cycle Address 0000h selects DPP0. ;Thus DPP0 determines sector which indicates specific states. read write result register (cycle
r12, [r4]
example above 16-bit registers used auxilary registers indirect addressing.
Note: detailed informations concerning command sequences, sector addressing register addresses please refer Data Sheet ,,C163-16F".
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Example Performing ,,burst write" flash memory
assume that initialization phase lowest flash memory (sector have been mapped segment example assume further that 32-word buffer ,,BUFFER" (located somewhere internal external memory) contains data which should programmed flash memory. Finally data will written address 01'0000H (flash sector segment Writing data flash memory basically performed three steps: Executing ,,Enter Burst Load" command loading first data word into assembly register. Executing ,,Load Burst Data" command consecutive loading next data words into assembly register Executing ,,Store Burst" command loading last data word into assembly register After last data word (32nd) written assembly register this complete register automatically programmed flash memory. dpp0,#04h dpp1,#09h dpp2,#0Ah r0,#0AAAAh r1,#0A0F2h r3,#05554h r6,#0h segment Page flash sector pointer flash/ segment pointer flash/ segment registers loaded with dedicated command write addresses
assembly register start/ flash store address IMPORTANT: assembly register address defined only address bits A5.A0. Upper bits evaluated. A5.A0 have zero values ;The flash store address defined only bits A16.A6. Lower bits evaluated. Since both addresses different address bits only register used. this case take care that flash store address either zero, multiple (according burst width) avoid trouble with assembly register address. page offset BUFFER (location data programmed) page number BUFFER (location data programmed) ENTER BURST LOAD (1st cycle) first data word from BUFFER
extp
r9,#pof buffer r10,#pag buffer r4,#50h [r0],r4 r10,#01h r2,[r9]
continued)
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
(cont'd) r9,#02h [r6],r2 r11,#29 wrt_loop: extp r10,#01h r2,[r9] r9,#02h [r1],r2 increment pointer write first data word into assembly register load counter value next data words
next data words (2.31) from BUFFER increment pointer LOAD BURST DATA. Write data words 2.31 into assembly register. Always write same address: A0F2. every sequential word load this address internally incremented
cmpd1 r11,#0 jmpr cc_ugt,wrt_loop extp r4,#0aah [r0],r4 r4,#055h [r3],r4 r4,#0a0h [r0],r4 r10,#01h r2,[r9] r9,#02h [r6],r2 STORE BURST cycle cycle cycle last data word (32nd) from BUFFER cycle write last data word into assembly register. Afterwards complete assembly register programmed automatically flash memory. wait_wrt: #0fah jmpr [r0], #00h r12, [r4] #01h cc_nz,wait_wrt read flash status register (see example check BUSY cycle Read (cycle check BUSY
Note: Multiple writes same flash location before erase allowed.
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Example Performing command ,,Erase Sector"
assume that initialization phase lowest flash memory (sector have been mapped segment example sector will erased. #0AAAAh #05554h dpp0, #06h load auxilary registers with dedicated command write addresses flash sector erase address. Address selects DPP0. data page pointer determines sector erased sector sector sector 0Ah= sector pointer flash segment pointer flash segment execute command ,,Erase Sector" cycle cycle cycle cycle cycle cycle wait while busy, max. 1'0000h loops
dpp1, #09h dpp2, #0ah r4,#0aah [r0],r4 r4,#055h [r1],r4 r4,#080h [r0],r4 r4,#0aah [r1],r4 r4,#055h [r0],r4 r4,#030h [r8],r4 wait: #01h cc_z, error #0FAh [r0], #00h [r4] R5.0, wait #0FAh [r0], #00h [r4] #0EFh cc_nz, failed
timeout error: enter specific failure routine read poll BUSY flag cycle cycle Read check error flags cycle cycle mask byte error: enter specific failure routine
Note: detailed informations concerning flash status register operation control error handling please refer Data Sheet ,,C163-16F"
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Flash operation control using Flash Status Register
Following recommendation flash operation control process: Write command sequence Flash. Check correct command sequence sampling SQER status register FSR. Note: This mainly recommended case program evaluation. Check command (still) operation sampling BUSY status register FSR. Because BUSY summarizes states ERASE PROG additional evaluation these bits necessary. Note: Separate evaluation ERASE PROG might could helpful case program evaluation. Note: BUSY should permanently after flash operation (which means longer than only system (CPU) reset with Reset Read command reset BUSY flag. long BUSY set, other flash command executed. Check error flags BUER VPER when flash operation finished. most cases these flags (and case must) ignored, because OPER (Operation Error) reliable must evaluated, BUER (Burst Error) mainly helpful program evaluation VPER (Voltage Error) indicates level (threshold 2V). Note: very simple error check after flash operation could mask byte (ANDing with "00EFh") compare result with zero. case indicated fault condition: clear error flag with Clear Status Reset Read command start specific reaction. Note: start retry operation after faulty programming attempt, aware that multiple writes same flash location before erase allowed.
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Memtool OTP/ Flash Memory Programming Tool
In-system programming on-chip OTP- Flash memory supported Windows-based programming tool ,,Memtool" which freely available. Siemens provides driver updates Internet; please current status. Memtool application example well programming tool on-chip OTP- Flash memory, supporting C161CI-32F, C167CR-16F, C167CS-32F C163-16F Flash devices C164CI-8E devices. Thanks modular structure Memtool easily expandable future C16x devices. interested user driver sources also available (figure Along with drivers come readme.txt files which contain informations about hardware requirements latest informations about Memtool each driver.
Memtool
C163 Flash Driver C167 Flash Driver C164 Driver
Driver Sources
Driver Sources
Driver Sources
Figure structure Memtool
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Memtool allows programming erasing C163 flash memory employing Ertec EVA163 evaluation board Phytec C163 starter kit. process programming based bootstrap loader (BSL) which resides external EPROM/ Flash memory Ertec EVA163 evaluation board/ C163 Phytec starter kit. aware that C163 Flash internal test therefore internal bootstrap loader. C163 Flash devices with pre-programmed routine internal flash memory will available future. Please refer application note AP1638 "Bootstrap Loader C163 Flash". software including programming data downloaded from host into internal microcontroller. application requires only KBytes internal RAM, external required. Since C163 Flash Volt-only device, additional voltage flash programming erase required. order download application from serial link established. C163 already provides asynchronous serial interface that only connected COM1 COM2 your Supposing using Phytec C163 starter kit, directly connect serial connector with COM1/ COM2 interface your
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Appendix
SIEMENS Copyright SIEMENS 1997 FILE: FLASH.H C163 Flash mode write routines These Tasking small model routines expect internal flash mapped 1'0000H 2'FFFFH designed executed from external program memory. Define Macro -DINT_DISEAB command line interrupts should disabled during write/ erase. BUSY command options with care. V1.0 Ullmann 17.2.97 #ifndef _FLASH #include <reg163.h> General Definitions typedef unsigned char typedef unsigned typedef unsigned long BYTE; WORD; DWORD;
#define ICPUFL_SECT_SIZE 0x08000L #define ICPUFL_NR_OF_SECT 0x04 #define ICPUFL_BURST_SIZE0x40 #define ICPUFL_SIZE useful flash constant definitions extern WORD huge wptr_icpufl [ICPUFL_SIZE/sizeof(WORD)]; word array declared flash location (see FLASH.C) #define HPTR_ICPUFL_SECT(sect)(((BYTE huge macro return pointer beginning flash sector #define B_WAIT #define B_BUSY 0xFF constant data passed busy flash command arguments #define C163FL_STAT_BUSY 0x0001 #define C163FL_STAT_PRG 0x0002 #define C163FL_STAT_ERASE 0x0004 #define C163FL_STAT_BRST 0x0008 #define C163FL_STAT_OPER 0x0010 #define C163FL_STAT_VPER 0x0020 #define C163FL_STAT_SQER 0x0040 #define C163FL_STAT_BUER 0x0080 #define C163FL_STAT_ERASED 0x8000 flash status register (FSR) bits #define ICPUFL_FSR 0x00C0 byte offset address within sector #define E_OK 0x0000 error #define E_SQER 0x0020 C163 Flash Sequence Error #define E_OPER 0x0030 C163 Flash Operation Error #define E_VPER 0x0040 C163 Flash Voltage Error #define E_BUER 0x0050 C163 Flash Burst Error #define E_TMO 0x0060 TimeOut Error, Operation suspended #define E_ARG 0x0070 Argument Error error codes, returned flash commands' return WORD
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Flash Commands extern WORD fl_init (void); initialzation flash usage, must called before _einit() extern WORD fl_read_status (WORD fptr_val_dest, void fptr_fl_sect); read flash status register sector, which fptr_fl_sect points store fptr_val_dest. (the busy flag sector specific!) extern WORD fl_clear_status (void); perform clear status command extern WORD fl_reset2read (void); perform reset read command extern WORD fl_write_burst (WORD far*fptr_fl_dest,WORD far*fptr_source,BYTE busy); Take Byte burst data beginning specified source address program fl_dest. Source data must within page, destination address must multiple 40H. BUSY function polls status until ready functional timeout. BUSY function returns checks status. Written SMALL memory modell extern WORD fl_erase_sector (void fptr_fl_sect, BYTE busy); erase flash sector kB), into which fptr_fl_sect points BUSY function polls status until ready functional timeout BUSY function returns checks status extern WORD fl_wait_busy_tmo (void fptr_fl_sect); polls status until ready functional timeout #define _FLASH #endif
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
Appendix
SIEMENS Copyright SIEMENS 1997 FILE: FLASH.C C163 Flash mode FLASH write routines These Tasking small model routines expect internal flash mapped 1'0000H 2'FFFFH designed executed from external program memory. Define Macro -DINT_DISEAB command line interrupts should disabled during write/erase. BUSY command options with care. V1.0 Ullmann 17.2.97 #include ,,flash.h" #define FL_TMO_VAL 8000000L/5 Timeout repeat value max. 0.8s
declarations #pragma save_attributes #pragma combine hb=A0x10000 C163 Flash huge byte segment starts segment page #pragma class hb=MFLASH declare dedicated flash memory class
WORD huge wptr_icpufl [ICPUFL_SIZE/sizeof(WORD)]; declare flash memory huge word array #pragma restore_attributes initialization WORD fl_init (void) SYSCON 0x1584; enable internal RAM, function must ececuted before _einit() return E_OK; read status WORD fl_read_status (WORD fptr_val_dest, void fptr_fl_sect) read flash status register sector, which fptr_fl_sect points store fptr_val_dest. (the busy flag sector specific!) WORD register seg, bseg, fsrsof, stat; _seg(fptr_fl_sect);/* determine segment number fsrsof =ICPUFL_SECT_SIZE ICPUFL_FSR; determine flash status register align start sector bseg _seg(wptr_icpufl); base segment flash, usually seg, fsrsof bseg passsed arbitrary registers inline assembler routine, stat returned arbitrary register #pragma (@1=seg, @2=fsrsof, @3=bseg, R7,#0FAH R8,#0AAAAH
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
EXTS #01H [R8], EXTS #01H [@2]
write area command register EXTS-access directed flash base segment
read (register-indirect!) fsrofs EXTS-access within specified sector #pragma endasm (stat=@4) fptr_val_dest stat; return E_OK; clear status WORD fl_clear_status (void) perform clear status command WORD register seg; _seg(wptr_icpufl); base segment flash, usually write value destination
#pragma (@1=seg) R7,#0F5H R8,#0AAAAH EXTS @1,#01H [R8], write area command register EXTS-access directed flash base segment #pragma endasm return E_OK; reset read WORD fl_reset2read (void) perform reset read command WORD register seg; _seg(wptr_icpufl); #pragma EXTS (@1=seg) R7,#0F0H R8,#0AAAAH #01H base segment flash, usually
write area command register EXTS-access directed flash base segment
[R8], #pragma endasm return E_OK; write burst WORD fl_write_burst (WORD fptr_fl_burst,WORD fptr_source, BYTE busy) take Byte burst data beginning specified source address program fl_dest source data must within page, destination address multiple 40H. written SMALL memory modell BUSY function polls status until ready functional timeout BUSY function returns checks status #ifdef INTDISEAB interrupt vector table located flash during programming, interrupts
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
must disabled int_en; #endif WORD register seg, bpag, bpofs, spag, spofs; _seg(wptr_icpufl); bpag _pag(fptr_fl_burst); base segment flash, usually page flash destination address
bpofs ICPUFL_BURST_SIZE page offset flash destination address, automatically adjusted next allowable burst start address. DPP0 will used address destination bits remain zero spag _pag(fptr_source); source data start page
spofs _pof(fptr_source) 0x8000; source data start page offset, source data will addressed DPP2, select DPP2 #ifdef INTDISEAB disable interrupts int_en=IEN; IEN=0; #endif #pragma (@1=seg, @2=bpofs, @3=bpag, @4=spofs, @5=spag) R7,#050H R8,#0AAAAH EXTS #01H [R8], write first enter burst-command (register-indirect) using EXTS-access flash area command register AAAAH flash base segment DPP2 write data source page DPP0 flash destination page assure pipeline problems this command sequence [@4+] fetch first source data word relative DPP2, increment source pointer [@2], write (register-indirect)to flash write address (WA) relative DPP0 R8,#0A0F2H R9,#30 load assembly buffer with words (loop) from source burst1: [@4+] fetch source data relative DPP2, increment pointer EXTS #01H [R8], write flash assembly register using EXTS-access #01H CC_NZ, burst1 loop ,,enter burst data" R8,#0AAAAH R9,#05554H store burst sequence, EXTS accesses DPP2, DPP0,
#0AAH EXTS #03H [R8],R7 #55H [R9],R7 #0A0H EXTS #01H [R8],R7 R7,[@4+] [@2],R7 fetch last data word DPP2 write last data word DPP0 reload DPPs
DPP2, #PAG ?BASE_DPP2
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
DPP0, #PAG ?BASE_DPP0 #pragma endasm
memorymodell-dependent!
(busy) E_OK; wait flash return read mode dangerous interrupt vector table points into flash time might used some jobs flash busy cannot read/ executed from! else fl_wait_busy_tmo (fptr_fl_burst); wait flash returns read mode #ifdef INTDISEAB reenable interrupts int_en; #endif return seg; WORD fl_erase_sector (void fptr_fl_sect, BYTE busy) erase flash sector kB), into which fptr_fl_sect points BUSY function polls status until ready functional timeout BUSY function returns checks status #ifdef INTDISEAB interrupt vector table located flash, during programming, interrupts must disabled int_en; #endif WORD register fseg, fsof, bseg; fseg _seg(fptr_fl_sect); segment flash sector erased, usually fsof sector segment offset, aligned sector size, 8000H bseg _seg(wptr_icpufl); flash base segment, usually #ifdef INTDISEAB disable interrupts int_en=IEN; IEN=0; #endif #pragma (@1=fseg, @2=fsof, @3=bseg) R7,#0AAH R8,#0AAAAH R9,#05554H EXTS #01H [R8], R7,#055H EXTS #01H [R9], R7,#080H EXTS #01H [R8], R7,#0AAH EXTS #01H [R9], R7,#055H EXTS #01H [R8],
Semiconductor Group
AP1629 04.98
C163 Flash Memory Programming
erase sector sequence written flash area command registers, using register-indirect EXTS-accesses #030H EXTS #01H [@2], write sector address (SA) using register-indirect EXTS-access #pragma endasm (busy) fseg E_OK; wait flash return read mode dangerous interrupt vector table points into flash time might used some jobs flash busy cannot read/ executed from! else fseg fl_wait_busy_tmo (fptr_fl_sect); wait flash returns read mode #ifdef INTDISEAB reenable interrupts int_en; #endif return (fseg); poll flash status while busy WORD fl_wait_busy_tmo (void fptr_fl_sect) help rotine, used poll until busy-state disappears error diagnosis Pointer fptr_fl_sect must point into flash sector which expected busy might report hardware problem WORD status; DWORD icpu_tmo; icpu_tmo=0; fl_read_status (&status, fptr_fl_sect); read sector while((status C163FL_STAT_BUSY) (++icpu_tmo<FL_TMO_VAL)); loop while busy timeout (status&0x00FF) clear hardware error reported fl_clear_status else return E_OK; generate user error codes (status C163FL_STAT_BUSY) return E_TMO; else (status C163FL_STAT_SQER) return E_SQER; else (status C163FL_STAT_VPER) return E_VPER; else (status C163FL_STAT_OPER) return E_OPER; else (status C163FL_STAT_BUER) return E_BUER; return E_OK;
Semiconductor Group
AP1629 04.98

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