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AND8161/D Implementing DC/DC Single-Ended Forward Converter with NCP1216A
This document describes 1216A controller used design DC/DC single-ended forward converter suitable telecommunication applications. requirements converter follows: Input voltage range from Continuous output power greater than output voltage Small dimensions Efficiency greater then Input output isolation voltage 1500 NCP1216A controller attractive solution this application, following features:
Current-Mode Operation
Cycle-by-cycle primary current monitoring eliminates overcurrent situations, e.g. resulting from secondary short-circuit. Direct Optocoupler Connection applications where input output isolation required, direct connection eases design stage, saving external components. Extremely No-Load Power Consumption Extremely consumption no-load operation great advantage NCP1216A controller. Today's maximum stand-by consumption standards easily this function used. Short-Circuit Protection monitoring activity feedback line, NCP1216A simplifies task secondary side short-circuit protection. Coupling problems eliminated thanks this feature implementation.
Maximum Duty Cycle Operation
Forward converters usually limit maximum duty cycle 50%. Since voltage reset constrained equal input voltage (1:1 reset ratio), desirable exceed avoid saturating transformer core. Auxiliary Winding Operation (Dynamic Self-Supply) function allows NCP1216A derive power directly from line without having supply either from secondary output inductance (creepage distance isolation issues) auxiliary winding delivering variable voltage Vin. Peak Current Capability NCP1216A drive MOSFET directly without additional driver stage. selected MOSFET gate charge would overload capability, then auxiliary winding could used solely supply driver pulses.
DC/DC Converter Board Specifications schematic proposed converter shown Figure This converter following specifications: Minimum Input Voltage Maximum Input Voltage Output Voltage Continued Output Current Operating Frequency No-load Consumption Maximum Ambient Temperature 70°C
Semiconductor Components Industries, LLC, 2004
May, 2004 Rev.
Publication Order Number: AND8161/D
MURA240T3
MURB1620CT
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AND8161/D
Figure
MURA240T3 FQD18N20 4n7/Y2 1N4148 TLV431
NCP1216A
PC817
AND8161/D
Description Converter Connection
Capacitors inductor form input filter. Diode capacitor resistor provide primary clamping network which combats leakage inductance between reset winding primary winding. link between both windings occurs when switch off. Transformer with diode resistors serve primary current sensing circuit. Thanks insertion losses, final efficiency converter benefits greatly from this configuration. main driving circuit power converter. secondary circuitry forward diode freewheeling diode. Capacitor offers path common-mode (CM) currents circulating various transformer stray capacitances during switching events. Resistors together with capacitor C12, shunt regulator IC3, optocoupler form isolated feedback circuit output voltage regulation. snubber network (R6, connected across inductor order damp high frequency oscillations. form basic output filter. form additional output filter reduce high frequency noise. Design considerations various sections converter described below.
Transformer Design
primary magnetization current does directly participate energy transfer cause additive losses power switch primary winding. When switch off, transformer core must reset order internal flux return zero. This done dedicated reset circuit. Consequently magnetizing current Imag must kept smaller than productive component primary current. core flux density excursion chosen with respect characteristics core material: saturation flux density Bmax Bsat, residual flux density hysteretic losses core temperature behavior. With respect these characteristics, flux density excursion high frequency converters should between 0.15 higher value chosen, greater losses will generated. primary turn count calculated rearranging equation
DBMAX
(eq.
forward converter, core magnetization ensured applying voltage primary side. This action creates core flux which links both primary secondary windings. Using Faraday's law, write that N.df where voltage generated winding turns, energized flux integrating this formula, rearranging terms input voltage time ton, that internal flux depends volt-second product:
(eq.
where: total core area core flux density Thus, maximum core flux density DBMAX peak primary magnetization current IPKMAG transformer given primary inductance value maximum input voltage according equations (3):
IPKMAG DBMAX
(eq.
EFD25 core with total core area 58mm2 (DBmax maximum duty cycle dmax 0.5) then number primary turns number reset winding turns depends design tradeoffs. When number turns reset winding lower than that primary winding, reflected voltage power switch drain will lower than 2*Vin max. However, this limits maximum duty cycle excursion less than 50%. Conversely, reset turns larger than primary turns, maximum allowed duty cycle will increase MOSFET voltage stress will exceed 2*Vin max. these issues, practical number turns reset winding usually chosen same primary winding, ratio. important provide very good coupling between these windings. high leakage inductance between these windings would require hard voltage clamp that would hurt converter efficiency. number turns secondary winding obtained from equation
Vout
(eq.
(eq.
where: maximum input voltage primary winding inductance operating frequency maximum duty cycle dmax count primary turns
where: Vout desired output voltage voltage drop output rectifier minimum input voltage example using equation gives turns.
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AND8161/D
primary secondary windings must wound limit skin effect. This done using several wires wound parallel. maximum diameter Dmax each single wire winding given equation
(eq.
total area selected wire primary secondary windings tradeoff between desired output power, allowable conduction losses windings thermal considerations. current density transformer winding generally range from A/mm2. cooling used, current density increased. reset winding made with single wire technique, given magnetization current flowing into some cases, small inserted into magnetic circuit forward transformer. This solution brings residual flux density lower value than without gap. main drawback lies primary inductance decrease which forces higher magnetizing current.
Output Inductor Design
resistor configuration. classical current sense resistor were used this application, associated power loss would about When current sense transformer used, power losses about disadvantage this solution lies current error brought magnetization current current sense transformer. This error additive should accounted reduced. toroidal core with turns secondary winding used NCP1216A demo board. primary winding created turn isolated wire. peak current I2pk current sense resistor obtained from equation
I2pk I1pk Imagpk
(eq.
where: I1pk peak current power switch count secondary turns Imagpk peak value magnetization current Figure shows current sense transformer circuit. peak value magnetization current given equation
Imagpk csth
(eq.
value output inductor selected depends acceptable level ripple current. small ripple current, large inductance needed. other hand, when current ripple high, large output capacitors must used reduce voltage ripple. practice, usual limit current ripple about 10-20% average current inductor. maximum current ripple DImax forward converter occurs duty cycle. value found equation (7):
(eq.
RSENSE
I1/Ns Imag
where: Vsec maximum secondary voltage inductance inductor NCP1216A demo board, where inductor used, maximum output ripple will DImax This rather high, allowable dimensions inductor limit higher inductance value selection. values types output capacitors must chosen with respect maximum allowable output voltage excursion well current that will flow them.
Current Sense Transformer Design
Figure Implementation Current Sense Transformer
maximum threshold voltage current sense input inductance secondary winding value current sense resistor Rsense calculated using equation
Rsense csth I2pk
(eq.
where: Vcsth
current sense transformer used reduce power losses traditionally found standard current sense
NCP1216A Leading Edge Blanking circuit (LEB) allows designer avoid using network suppress voltage spikes during switch turn-on event.
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Primary Clamp Inductor Snubber Network Design Cclamp Vclamp Vripple Rclamp
(eq.
Because manufacturing constraints, leakage inductance between primary secondary windings never equal zero. energy stored this leakage inductance during will cause large voltage spikes when switch turning off. protect power switch from catastrophic voltage spike, clamping network must used. values these components depend only leakage inductance value also reflected voltage, parasitic influence layout, capacitor. power dissipation clamp obtained from equation
Vclamp (eq. Pclamp I1pk2 Lleak Vclamp Vrefl
where: Vripple
ripple voltage level clamping capacitor; this ripple should minimized. snubber network connected across inductor dampen parasitic oscillations caused when freewheel forward diodes switched. Both clamp snubber networks dissipate heat affect converter efficiency.
Regulation Loop Design
where: Lleak Vclamp Vrefl
value leakage inductance value clamp voltage value reflected voltage (Vrefl forward converters with max. 50%) optimal values clamping devices given equations
Rclamp Vclamp (Vclamp Vrefl) Lleak I1pk2
(eq.
standard loop topology with TLV431 shunt regulator used. optocoupler provides good isolation between input output sides converter. output voltage divider ratio according equation
Vout
(eq.
maximum current flowing through optocoupler determined resistor internal consumption TLV431 low, thus avoiding another biasing element, bypassing LED. Resistor constitute feedback loop compensation circuit. optimal values these components based feedback response measurements.
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AND8161/D
Figure Layout (Top Side)
Figure Layout (Bottom Side)
Figure Component Arrangement (Top Side)
Figure Component Arrangement (Bottom Side)
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AND8161/D
Layout Design
EFFICIENCY
double-sided used minimize size converter. board designed with respect power dissipation created power devices, thus large cooling areas used. Sound grounding techniques appropriate isolation distances were incorporated into layout. layout component arrangement seen Figures
BILL MATERIALS
C10, DS3316P-103-Coilcraft B0754-A-Coilcraft DS3316P-102-Coilcraft C0972-A-Coilcraft Toroid f6.0 Material T30-Epcos turns m/100 Nippon Chemi-Con-KMF m/25 Nippon Chemi-Con-KMF
INPUT VOLTAGE
Figure DC/DC Converter Efficiency Input Voltage
EFFICIENCY OUTPUT POWER
nF/500 Through Hole Ceramic Capacitor Type Capacitor nF/500 Through Hole Ceramic Capacitor m/25 Nippon Chemi-Con-LXZ 1206 0805 0805 0805 SMD1206 kW/1.0 Through Hole W/1.0 Through Hole SMD1206 0805
Figure DC/DC Converter Efficiency Output Power (Vin
no-load consumption function input voltage shown Figure
LOAD CONSUMPTION (mW)
0805 0805 MMSD914T1-ON Semiconductor MURA2403T3-ON Semiconductor MURB1620CT-ON Semiconductor FQD18N20V2TF-Fairchild NCP1216A-ON Semiconductor PC817-SHARP TLV431BSN1T1-ON Semiconductor
Performance Converter
INPUT VOLTAGE
power conversion efficiency DC/DC converter shown Figures
Figure Load Consumption Input Voltage
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AND8161/D
gate (trace drain (trace waveforms power MOSFET shown Figures several converter conditions.
GATE GATE
DRAIN DRAIN
Figure Vinput Iout
Figure Detailed Burst During Overload
load regulation output current step from 100% seen Figure
GATE
DRAIN
Figure Load Operation Figure Load Regulation (Iout changing from 100%-0.3
GATE
DRAIN
Figure Overload Operation
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Notes
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AND8161/D
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This document describes 1216A controller used design DC/DC single-ende

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