GENERAL DESCRIPTION SMART HotPlug family swap devices uses SENSEFETt p

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GENERAL DESCRIPTION SMART HotPlug family swap devices uses SENSEFETt p

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AND8140/D SMART HotPlugt Current Limit Function
GENERAL DESCRIPTION SMART HotPlug family swap devices uses SENSEFETt power transistor. This very efficient method sensing current does require resistance, high power sense resistor. This circuit modes operation, will give different current limit level each mode. When device encounters short circuit condition, including initial charging input cap, current will limited predetermined level. This level lower than current limit level that will occur when device encounters overload condition. This application note will discuss these modes give equations. CIRCUIT DESCRIPTION
SENSEFET Operation Basic Circuit Operation
Figure shows simplified schematic current limit circuit. main (QM) conducts majority load current SMART HotPlug device. sense (QS) conducts only small amount current, this current normally related current flowing ratio cells. sense current flows through generates sense voltage. This voltage used current limit amplifier reduce gate drive SENSEFET current, measured becomes equal reference voltage amplifier.
Drain
important understand that power MOSFET made thousands paralleled FETs cells. operating many cells parallel very values RDSon achieved. SENSEFET made separating small portion cells from main FET, which used sense device. ratio cells from main sense determines ratio RDSon devices. three terminals (gate, drain source) tied together, devices will share current based ratio cells. small resistor added between source sense source main (ground), this ratio will have small error, will still close ratio cells. only allowing fraction main current flow sense FET, current sensing resistor more reasonable value terms resistance power dissipation. example, sense signal from current using normal MOSFET would require (using factor derating power) resistor. SENSEFET with ratio 1000:1 were used same current sense voltage, V/0.005 resistor required that must dissipate This results significant cost savings current sense resistor.
Semiconductor Components Industries, LLC, 2004
Vref
Source
Figure SENSEFET Current Limit Circuit
resistance bond wires source lead. Since there significant amount voltage dropped across this resistance relative sense reference voltage, since current sense reference voltage referenced node between source power must taken into account. Ideally, current fixed ratio current theoretical relationship between Imain
where Ratio ratio main cells divided sense cells.
November, 2004 Rev.
Publication Order Number: AND8140/D
AND8140/D
sense resistor, this ratio some variation More importantly however, Isense only follows ratio when there adequate voltage drain generate correct sense voltage. following example illustrates this concept based circuit Figure (main sense) 1000 RDSon(main) Vref According ratio, sense current should
1000 1000 From RDSon RDSon) RDSon RDSon
RDSon RDSon
sense voltage would
Substituting equations yields:
(Vref RB)) RDSon RDSon) (Vref RB)) (Vref RB)) RDSon RDSon) Vref (Vref RB)) RDSon (RDSon RB)) Vref
(eq.
which would verge current limit. However, source voltage must less than drain-source voltage, fully enhanced, drain-source voltage
0.04
Under this condition, sense voltage output voltage divider formed RDSon sense sense resistor, This would
RDSon(sense)
(0.04 1000)
Overload Current Limit Equation current limit point, equal Vref, find sense resistor value given current, Vref been equated equation
Saturated Mode
which roughly half that would expected using straight ratio equation. This because there distinct modes sensing current SENSEFET, depending whether main power linear saturated region operation.
Linear Mode
linear mode operation applicable when swap unit overloaded, i.e. high current levels where still fully enhanced. this mode operation available voltage from drain source based drain current RDSon main FET. should understood that RDSon given data sheet includes bond wire resistance, they must shown separately this model properly evaluate this circuit. evaluate operation this circuit, following analysis applies:
RDSon
(eq.
saturated mode operation, fully enhanced would case short circuit. This mode operation turn swap device, since load capacitance appears short circuit while charging. Essentially, this mode occurs time there significant voltage across drain source nodes FET. During short circuit event, drain source voltage simply input voltage. When charging capacitor, drain source voltage begins input voltage then gradually reduces capacitor charges. saturated mode, there ample drain source voltage allow sense (QS) operate ratio cells FETs. Under this condition, relationship sense voltage drain current
(eq. (eq.
where RDSon total resistance between source drain terminals.
Vref RDSon
(eq. (eq.
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AND8140/D
(eq.
Short Circuit Current Limit Equation Equation describes relationship between short circuit current sense resistor, which seen Figures
Characterization Current Limit Circuit
data Figures shows both empirical data calculated data NIS5101, swap device. calculated graph uses Equations with following variables: 1000 RDSon seen from these charts that there some differences between calculated empirical data, general there reasonable agreement between two. overload current level Figure reaches asymptote. level about decreases slightly from there. This level determined equation:
Vref RDSon
These equations (Equation used calculate current limit levels under conditions described. This same data taken empirically each SMART HotPlug device presented data sheet. recommended that curves from data sheet used when determining biasing components device, since this data takes into account secondary effects that included this analysis.
which this case
which will final value very high values current limit resistor.
100.0
100.0
CURRENT
OverLoad
CURRENT
10.0
10.0 OverLoad
Short Circuit
Short Circuit
R_limit 1000
R_limit 1000
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Figure Empirical Data NIS5101 Current Limit Circuit
Figure Calculated Data NIS5101 Current Limit Circuit
AND8140/D
Thermal Effects
helpful understand thermal implications this circuit. reference voltage temperature compensated will vary only slightly over temperature, however resistance much more dependant temperature. Figure shows effects temperature resistance FET, similar used NIS5101 SMART HotPlug device.
RDSon, DRAIN-TO-SOURCE RESISTANCE
0.07 =100 0.06 0.05 0.04 0.03 -55_C 0.02 0.01
25_C
change resistance overtemperature minimal effect short circuit current limit. This fact that short circuit current equation (eq. RDSon term although bond wire resistance included does cause minor shift high currents. Figure shows NIS5101 current limit using current limit resistor charging 5200 capacitor. seen that current very flat until thermal shutdown point reached which time current goes zero. current pulse begins with temperature 25°C shuts down when reaches 130°C. Over this range temperatures short circuit current only changes overload current more dependant RDSon well bond wire resistance therefore will vary more with temperature. temperature changes RDSon approximated from data Figure This information used, along with change resistance bond wires calculate data Figure bond wires aluminum have resistive temperature coefficient 0.0039%/°C. change bond wire resistance from 25°C 100°C
R(t) 0.00390(t 25°C)] 0.004 0.00390(100°C 25°C)] 0.0052
DRAIN CURRENT
Figure On-Resistance Drain Current Temperature
change RDSon over same temperature range from Figure
Figure Short Circuit Current Limit
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AND8140/D
100.0
CURRENT
100°C 25°C 10.0 25°C -55°C
100°C R_limit 1000
Figure Calculated Data Overload Limit NIS5101 Overtemperature
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AND8140/D
SMART HotPlug SENSEFET trademarks Semiconductor Components Industries, (SCILLC).
Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer. This literature subject applicable copyright laws resale manner.
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AND8140/D

GENERAL DESCRIPTION SMART HotPlug family swap devices uses SENSEFETt p

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