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Measuring Loudspeaker Impedance Profile Using AD5933
Sean Brennan
INTRODUCTION
This application note describes circuit architecture details required measure impedance profile commercial loudspeaker using AD5933 impedance-to-digital converter. evaluating acoustic properties loudspeakers through impedance measurement from 1960 1970, Australian pioneers, Thiele Small, defined Thiele-Small parameters. Thiele Small analyzed electro-mechanical behavior speaker voice coil, magnet, cone interacting with cone suspension outside sealed enclosures. These findings have been used manufacturers hobbyists present standard design high fidelity speaker cabinets, crossover networks test final driver networks themselves. Measuring impedance commercial loudspeaker typically involves using various tools ranging from
simple equipment (for example, signal generators, oscilloscopes, digital voltmeters) sound cards expensive audio network analyzers. fundamental problem exists: impedance test equipment remains separate from audio system driving loudspeaker. this document describe circuit architecture using AD5933 that allows system designer measure impedance profile loudspeaker integrate this circuitry into audio signal chain. This many benefits; example upon system power circuitry provides ability measure impedance profile thus acoustic properties loudspeaker, enabling direct comparison factory calibrated profile stored nearby. changes impedance profile detected further diagnostics carried out, preventing premature damage.
more information, Chapter (Page 101), "Speaker Crossovers," Hank Zumbahlen, Systems Application Guide. Published Analog Devices, Inc., 1993, ISBN 0-916550-13-3.
MCLK
AVDD
DVDD
OSCILLATOR
CORE BITS)
ROUT VOUT
INTERFACE
TEMPERATURE SENSOR
AD5933
REAL REGISTER IMAGINARY REGISTER 1024-POINT
BITS) GAIN VDD/2
06060-001
AGND
DGND
Figure AD5933
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AN-843 TABLE CONTENTS
Introduction Revision History Operation Calibration Loudspeaker Impedance Model Profile Circuit Details Howland Current Source. Modified Howland Current Source AD5933 Details. Clock Divider Circuitry.7 Loudspeaker Impedance Measurement System Calibration Loudspeaker Impedance Phase Calculation System Clock Settings.9 Results Conclusion
REVISION HISTORY
6/06-Revision Initial Version
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AN-843
OPERATION CALIBRATION
shown Figure AD5933 high precision, impedance converter system that combines on-board frequency generator with 12-bit, MSPS, analog-to-digital converter (ADC). frequency generator allows external complex impedance excited with known frequency. response signal from impedance sampled on-board ADC, discrete Fourier transform (DFT) processed on-board engine. algorithm returns real imaginary data-word each output frequency. magnitude impedance relative phase impedance each frequency point along sweep easily calculated using following equations:
voice coil inductance measured millihenries (mH). industry standard measure inductance 1000 frequencies higher, there rise impedance above Rdc. This because voice coil acts inductor. Consequently, impedance speaker fixed impedance, represented curve that changes input frequency changes (see Figure Maximum impedance (Zmax) occurs resonant frequency (Fs). free-air resonant frequency speaker. impedance loudspeaker maximum Simply stated, point which weight moving parts speaker becomes balanced with force speaker suspension when motion. This information important keep enclosure from ringing. With loudspeaker, mass moving parts stiffness suspension (surround spider) elements that affect resonant frequency. vented enclosure (bass reflex) tuned that work unison. general rule, lower indicates woofer that would better low-frequency reproduction than woofer with higher However, necessary tune surrounding enclosure speaker's resonant frequency, mistuning cause shift represents mechanical resistance driver's suspension losses. measurement absorption qualities speaker suspension.
Magnitude
Phase
system requires calibration using precision (preferably noninductive) resistor substituted impedance measured scaling factor calculated subsequent measurements. AD5933 measure impedance value between system accuracy 0.5% excitation frequencies between kHz. typical loudspeaker common-mode impedance less rises peak frequency. peak frequency occur Therefore, external circuit components required analyze loudspeaker impedance profile such frequencies impedance levels. following section explains proposed circuit architecture measure such profile compare results commercial test unit.
LOUDSPEAKER IMPEDANCE MODEL PROFILE
understand subsequent measurement, simplified electrical model loudspeaker shown Figure
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Therefore, order obtain Thiele-Small parameters, resulting impedance peak crossover frequencies need accurately determined.
LINEAR REGION RESONANCE VOICECOIL INDUCTANCE
IMPEDANCE
Figure Loudspeaker Impedance Model
FREQUENCY (Hz)
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circuit Figure resistance placed series with lossy parallel resonant circuit made rms, which model dynamic impedance speaker. summary:
resistance driver measured with digital ohmmeter often referred speaker specification sheet. This measurement usually less than driver's nominal impedance. Consumers sometimes concerned that less than published impedance fear that amplifiers will overloaded. Because inductance speaker rises along with rise frequency, unlikely that amplifier often sees resistance load.
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Figure Typical Loudspeaker Impedance Profile
AN-843
Figure shows typical impedance curve loudspeaker. (The equivalent circuit this speaker, shown Figure simulated this application note There three distinct characteristics note Figure described next. Resonance causes large increase impedance, some higher frequencies, inductance semi-inductance) voice coil causes impedance rise again. Figure resonance linear region ranges from about resonance, speaker impedance pure resistance. frequency increases towards resonance, impedance characteristic inductive. Beyond resonance impedance falls, impedance characteristic capacitive. Within linear region, impedance again (almost) resistive, slightly below speaker's nominal impedance (nominal impedance usually taken average value over usable frequency range). inductive region, frequency where inductance voice coil becomes significant, impedance rises progressively more inductive frequency rises. Although pure inductance shown equivalent circuit, this component often referred semi-inductance.
CLOCK DIVIDING CIRCUIT MCLK AVDD DVDD
CIRCUIT DETAILS
Figure shows circuit block diagram used measure impedance profile commercial loudspeaker. circuit consists three major blocks. major block modified Howland current source gain stage connected output AD5933 with commercial loudspeaker connected feedback loop external gain stage. Another block clock-dividing circuit, which scales down master clock/crystal frequency supplied AD5933, enabling impedance profile analyzed across bandwidth interest kHz).Clock scaling required AD5933 order analyze frequencies below kHz. third block AD5933 impedance-to-digital converter. following sections explain circuit details Howland current source clock-dividing circuitry. more information, AD5933 data sheet downloaded from www.analog.com.
LOUD SPEAKER 150pF 3.3V 10µF, 0.1µF ROUT VOUT 10µF, 0.1µF 3.3V 1024-POINT 0.1µF RCALIBRATION
OSCILLATOR
CORE BITS)
INTERFACE
TEMPERATURE SENSOR
3.3V
AD5933
REAL REGISTER IMAGINARY REGISTER
10µF, 0.1µF 10µF
BITS) GAIN VDD/2
AGND
DGND
Figure Loudspeaker Impedance Measurement Circuit
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06060-004
AN-843
HOWLAND CURRENT SOURCE
Figure shows modified Howland constant current source. output current through load independent impedance load only depends input voltage VIN.
MODIFIED HOWLAND CURRENT SOURCE
LOUD SPEAKER 150pF 3.3V 10µF, 0.1µF RCALIBRATION
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10µF, 0.1µF 3.3V
3.3V 10µF, 0.1µF
LOAD
1.65V
Figure Typical Howland Current Source
0.1µF
10µF
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Using equations gain negative positive input terminals, voltage written
Figure Modified Howland Current Source (UIA, AD8532AR Rail-to-Rail Single Supply Amplifier)
Simplifying Equation yields
Rearranging equation shown that
Ohm's current through (that equals
highlighted section Figure shows modified Howland current source used final circuit. Because limitation single supply, coupled with fact that receive side AD5933 internally hard biased Vdd/2, necessary bias excitation signal through loudspeaker same value best dynamic range through system. This achieved biasing noninverting input 1.65 (that Vdd/2). high open-loop gain application feedback causes output Howland current source always same voltage. Therefore, output Howland current source always 1.65 Next resistor connected supply decoupled ground. resistor feedback loop causes noninverting input (VDD This necessary allow excitation current always flow through speaker over entire voltage swing biased about 1.65 (Range AD5933 described datasheet). Using superposition theorem, considering bias output input terminals about amplifier, shown that input signal, maximum/ minimum voltage swing output 2.975 1.975 respectively. Therefore, there always current flowing into resistor into loudspeaker. This required that impedance profile smooth, continuous profile like that shown Figure
much greater than current assumed flow through load accordance with current divider rule. practice, order capacitor provides single dominate pole feedback circuit prevent oscillations. Without load, positive feedback equals negative feedback when power first applied circuit (Vdd). Capacitor ensures that positive feedback always less than negative feedback when power applied first circuit.
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AN-843
resulting current p-p) from Howland current source, which flows through resistor into loudspeaker impedance, develops output voltage output measured impedance-about U1B) which proportional loudspeaker impedance. This voltage connected AD5933 through unity gain (Rfb current-to-voltage (I-to-V) amplifier before being sampled ADC. When sees signal. recommended configure AD5933 I-to-V gain gain such that signal presented uses dynamic range without causing saturation over entire range loudspeaker impedance.
where: X(f) power signal Frequency Point x(n) output. cos(n) sin(n) sampled test vectors provided core frequency. multiplication accumulated over 1024 samples each frequency point. result stored two, 16-bit registers representing real imaginary components result. data stored twos complement format.
Leakage Considerations
input signal receive side does have exact integral number cycles over N-point sample interval, there smooth transition from period start next. Because on-board sampling receive signal finite time, AD5933 effect multiplying input sequence rectangular window. continuous Fourier transform rectangular function classic sinc function (sin (x)/x). input signal receive side AD5933 contains spectral components exactly integer multiples fundamental analysis frequency, then these side lobes zero frequencies show output. however, input signal contains components that fall exactly these frequencies, then sinc functions side lobes contain energy frequencies. high frequency components inherent discontinuities nonperiodic sampling that causes these side lobes exist. Therefore, obvious problem exists. performed AD5933 only produces correct result when output sequence contains energy precisely analysis frequencies that integral multiples fundamental frequency. input signal component some intermediate frequency between these frequency bins, this input signal shows some degree output frequency bins DFT. conventional DFT, this have undesirable effect masking weaker signals that present close stronger ones input signal. This called spectral leakage. method employed AD5933 reducing effects spectral leakage application windowing output data. Windowing effect reducing energy contained side lobes sinc function. When receive side input signal does contain integer number cycles within sample interval, output spectral leakage previously described.
Example AD5933 single-point that performed, sampling frequency MCLK/16) determined master clock frequency applied MCLK. clock oscillator applied MCLK AD5933, sampling frequency MHz. samples converts
AD5933 DETAILS
AD5933 method determining impedance (see AD5933 datasheet impedance calculation details) involves DFT. offers many benefits user: Excellent rejection Error averaging Phase information conventional method assumes sequence periodic data samples x(n) which allows user determine spectral content corresponding continuous signal. Internally, these samples come from on-board 12-bit receive side. method employed AD5933 differs from conventional that only single frequency transformed, rather than fundamental harmonics-it fact, single-point explained following section.
Single-Point With conventional DFT, sequence input samples x(n) correlated with samples from phasor. frequency this phasor integer multiples fundamental frequency given Fs/N correlation performed each frequency multiple; resulting correlation phasor (consisting both sine cosine that multiple frequency) nonzero, there energy input signal that particular frequency bin. energy found bin, there energy that test frequency. single-point implemented AD5933 ensures design that analysis frequency provided on-board core always same. Therefore, AD5933 only analyzing energy particular frequency that determined sweep parameters preprogrammed user. single-point calculated each frequency point given Equation
1023
(x(n)(cos(n) sin(n)))
sampling frequency.
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AN-843
1024 points 1024) provides these samples unit perform DFT. This gives frequencies integer multiples kHz. Thus, accurate outputs, input signal should restricted multiples -the resolution said kHz. Therefore, AD5933 only accurately determine components signal that apart, with error. This also implies that minimum frequency that AD5933 excite analyze kHz. practice this slightly higher finite timing, jitter, component nonidealities that exist real analog design. AD5933 uses Hanning window, which offers good sidelobe rejection and, because symmetrical properties, relatively efficient implement digital engine. There ways improve resolution performed AD5933. First, assuming user keeps sample frequency fixed changing MCLK frequency, increasing number points taken onboard increases resolution. example, sampling 2048 points, result, increases resolution Therefore, possible accurately determine components signal that apart, with error. This would take Note that number points that samples fixed design. Second, assuming that number points that samples receive signal fixed 1024, scaling frequency MCLK scales sampling rate according Equation FMCLK
CLOCK DIVIDER CIRCUITRY
impedance profile loudspeaker shown Figure ranges from (typically). Therefore, capture entire impedance profile loudspeaker, AD5933 must able analyze frequencies below kHz. explained previous section, user must scale master clock frequency allow AD5933 analyze these frequencies. Figure shows example circuit that divides master clock frequency (that performs successive binary division). circuit used standard 4-pin, DIL, metal can, crystal oscillator reference frequency. Because majority oscillators CMOS type MCLK input AD5933 running requires (3.3 input, simple additions were made circuit. capacitor, (0.033 placed between output NAND gate input first flip flop. capacitor removes bias from oscillator, because logic levels correct when reduced Next, NAND gate feedback resistor which acts sensitive amplifier make output logic levels swing from reliable switching first flip flop, U1A. Alternatively, logic-level translator like ADG3231 used translate oscillator output logic levels. important that rising falling edges clock connected (MCLK) AD5933 have good clean transition (Tr/Tf with small amounts jitter. frequency stability external crystal used should ppm. measured duty cycle crystal oscillator used 55%. five dual flip flops produce 10-bit binary counter, allowing AD5933 driven from 11.718 (divide 1024). alternative solution circuit Figure replace five dual flip flops with AD9834 acting binary clock divider with external high-speed comparator (ADCMP37x/ADCMP60x) output produce digitally controlled clock.
MCLK/4 MCLK/8 MCLK/16
Scaling sampling frequency increases span sample window, creating coherent sampling required accurate results. following section details clock dividing circuit used scale system clock pin, enabling AD5933 analyze excitation frequencies below kHz.
MCLK/2
3.3V 3.3V 74HC74 3.3V 3.3V 74HC74 3.3V
3.3V 74HC74 3.3V 3.3V 74HC74 3.3V
3.3V 74HC74 3.3V 3.3V 74HC74 3.3V
3.3V 74HC74 3.3V 3.3V 74HC74 3.3V 3.3V
12MHz/ OSCILLATOR 74HC00
3.3V 74HC74 3.3V
74HC74
06060-007
3.3V
MCLK/32
MCLK/64
MCLK/128
MCLK/256
MCLK/512
MCLK/1024
Figure Master Clock Dividing Circuitry
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AN-843 LOUDSPEAKER IMPEDANCE MEASUREMENT
circuit shown Figure developed used measurement loudspeaker impedance profile. transmit side AD5933, used audio frequency oscillator, drives modified Howland constant current source AD5933 integrated circuit impedance converter combines internal direct digital synthesis (DDS) frequency generator analog-to-digital converter (ADC) form selfcontained impedance measurement system. frequency sweep performed AD5933 gather magnitude phase data frequencies defined user. impedance analyzed placed between frequency generator transmit stage I-to-V receive stage. receive signal passed through programmable gain amplifier (PGA), filtered then delivered 12-bit ADC. After receive signal digitized ADC, discrete Fourier transform (DFT) performed data. nearby microcontroller communicates AD5933 I2C® interface, allowing user program AD5933 sweep parameters (start frequency, frequency step size, number points) configure control register, adjust excitation amplitude setting, well read back measured data from AD5933 final impedance calculation. Once AD5933 correctly programmed, only single status register must polled after each point user defined sweep valid data available read from AD5933 (see AD5933 data sheet more details). gain factor calculated dividing suitable known precision resistor magnitude real imaginary data returned suitable frequency point sweep. Both real imaginary component stored two, 16-bit registers which must read after each conversion before next frequency point sweep where contents registers refreshed with data. resonant impedance commercial loudspeaker typically (depending upon loudspeaker construction), shown Figure Therefore, calibration resistor chosen have value 27.4 system phase calculated degrees each sweep point same real imaginary data points using formula Phase Tan-1 (I/R). user must evaluate quadrant which phase angle lies. correct angle, user must degrees Quadrant Quadrant degrees Quadrant
LOUDSPEAKER IMPEDANCE PHASE CALCULATION
Once calibration process finished, loudspeaker replaces calibration resistor. After user issues start frequency sweep command control register, AD5933 automatically sequences through user-defined frequency sweep. frequency sweep calculated contents three registers (start frequency, frequency step, number increments register). Finally, loudspeaker impedance each frequency point calculated, microprocessor communicating AD5933, multiplying gain factor magnitude complex code returned each frequency AD5933.
LOUDSPEAKER Gain Factor
SYSTEM CALIBRATION
However, prior valid impedance measurement, AD5933 system must undergo calibration process. calibration process simply requires that known precision metal film resistor substituted impedance measured scaling factor (gain factor) calculated subsequent measurements. gain factor calculation given following formula:
Gain Factor Calibration Resistor
(10)
where contents real imaginary register chosen calibration point. phase loudspeaker calculated each sweep point subtracting speaker phase from calibration phase
LOUDSPEAKER CALIBRATION SWEEP
where contents real imaginary register chosen calibration point.
(11)
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AN-843
SYSTEM CLOCK SETTINGS
explained section AD5933 Details, frequency clock applied MCLK must divided order AD5933 analyze excitation frequencies lower than accurately. Table outlines programmed sweep range corresponding clock frequencies applied MCLK AD5933 used test cover bandwidth. circuit shown Figure used provide AD5933 clock frequencies each subrange binary division crystal oscillator start frequency reduced factor corresponding master clock frequency halved. Table outlines programmed sweep parameters (start frequency, frequency increment, number increments) used test cover bandwidth. shown Figure peak impedance typically occurs between necessary have small frequency increment this region loudspeaker impedance profile capture sudden change impedance resonance. frequency increases from resonant point, necessary measure such small changes frequency remainder impedance profile. Increasing step size reduces required test time increases span impedance profile measured fixed number increments. frequency step size 1/10th start frequency every sweep. Therefore, start frequency sweep increased, frequency step size increased proportionally. AD5933 number settling time cycle register output cycles throughout experiment, number increments point.
Table AD5933 MCLK Values Sweep Range
AD5933 Sweep Range 1.25 1.25 312.5 312.5 156.25 156.25 78.125 78.125 39.125 39.125 19.53 19.53 9.76 Clock Frequency Applied MCLK 187.5 93.75 46.875 23.437 11.71
AD5933 frequency sweep determined contents start frequency, frequency increment, number increments register programmed user interface. AD5933 data sheet more details performing frequency sweep.
Table outlines AD5933 sweep parameters four sweeps required span frequency 1.25
Table AD5933 Programmed Sweep Register Values
AD5933 Sweep Range 1.25 1.25 312.5 312.5 156.25 156.25 78.125 78.125 39.12 39.125 9.53 19.53 9.76 Programmed Start Frequency 1.25 312.5 156.25 78.125 39.125 19.53 9.76 Programmed Frequency Increment 12.5 62.5 31.5 15.625 7.8125 9125 1.953 0.0976 Programmed Increments
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AN-843
outlined AD5933 data sheet, start frequency 24-bit word that programmed on-board Address 82h, Address 83h, Address (see AD5933 data sheet register map). required code loaded start frequency register result Equation based master clock frequency required start frequency output from DDS:
Start Frequency Code
Required Output Start MCLK
example, user requires sweep have resolution clock signal connected MCLK, code that needs programmed given
Frequency Increment Code
00117 hexidecimal
Frequency
(15) user programs Register Register Register third parameter used define frequency sweep number increments register. This 9-bit word that represents number frequency points sweep. number programmed on-board Address Address (see AD5933 data sheet register map). maximum number points that programmed 511. example, sweep needs points, user programs Register Register Table shows required sweep codes various clock frequencies which codes based. Because master clock start frequency/frequency increment values scale equally binary division algorithm implemented, start frequency code, frequency increment code, number increment codes equal each sweep. This means that user only write these three registers once entire test. However, ensure equal division each time, user must ensure that circuit Figure produces clean clock signal each output, that reference clock stable, that jitter minimized.
(12) example, looking first Table user requires sweep begin clock signal connected MCLK, code that needs programmed given
Start Frequency Code
06D3A0 hexidecimal
(13) user programs Register Register Register Similarly, frequency increment register 24-bit word that programmed on-board Address Address Address (see AD5933 data sheet register map). required code loaded frequency increment register result formula shown Equation below, based master clock frequency required increment frequency output from DDS.
Required Frequency Frequency Increment Code MCLK
Increment
(14)
Table AD5933 Required Sweep Codes Frequency Range 1.25
Programmed Start Frequency/ Required Start Frequency Code 06D3A0 1.25 06D3A0 06D3A0 06D3A0 Programmed Frequency Increment/ Required Frequency Increment Code 001179 12.5 001179 001179 001179 Programmed Increments/ Required Increments Code 0063 0063 0063 0063 Clock Frequency Applied MCLK
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AN-843 RESULTS
system Figure calibrated with precision value 27.4 resistor gain factor calculated each frequency point sweep using sweep codes clock frequencies outlined Table values were stored memory nearby microcontroller. calibration resistor replaced commercial inch commercial loudspeaker sweep repeated. impedance calculated each frequency point multiplying gain factor corresponding code each frequency, shown Equation Equation final impedance profile measured AD5933 shown Figure
same experiment measurement repeated using same loudspeaker this time using commercial USBbased loudspeaker impedance test unit that required similar calibration process each frequency with 27.4 resistor, prior making final impedance measurement. results measurement shown Figure
FREQUENCY (Hz)
06060-009
06060-008
IMPEDANCE
FREQUENC (Hz)
PHASE (Degrees)
Figure Loudspeaker Impedance Phase Results Measured AD5933 Commercial Loudspeaker Impedance Test Unit
CONCLUSION
AD5933 provides highly accurate cost solution loudspeaker impedance measurement compared expensive commercial devices. Along with AD5933, only external components required incorporate simple test circuitry into audio chain expense minimum board space. impedance profile evaluated upon system power-up with minimal effort, providing simple means characterizing loudspeaker acoustics examining effects loudspeaker enclosure that aging damage changes identified.
Figure Loudspeaker Impedance Phase Results Measured AD5933
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PHASE (Degrees)
IMPEDANCE
AN-843 NOTES
Purchase licensed components Analog Devices sublicensed Associated Companies conveys license purchaser under Philips Patent Rights these components system, provided that system conforms Standard Specification defined Philips.
©2006 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. AN06060-0-6/06(0)
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