Pulse Width Modulation Conversion Techniques with COP800 Family Microc
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Pulse Width Modulation Conversion Techniques with COP800 Family Microcontrollers
Pulse Width Modulation Conversion Techniques with COP800 Family Microcontrollers
BASIC TECHNIQUE This application note describes technique creating analog digital converter using microcontroller with other cost components Many applications require speed associated with dedicated hardware converter worth evaluating more cost effective approach With high speed CMOS microcontroller eight implemented that converts approximately This method based fact that repetitive waveform applied network capacitor will charge average voltage provided that time constant much larger than pulse widths basic equation computing analog digital result Vref (Ton Toff) With this equation necessary precisely measure several time periods within both Toff order achieve desired resolution Additionally waveform would have gradually adjusted allow large time constant settle This results relatively long conversion cycle Modifying equation technique slightly significantly speeds process This technique works averaging several pulses over fixed period time based following equation Vref (Sum (Ton Toff)) IMPLEMENTATION Figure describes basic circuit schematic that uses National Semiconductor COP822C microcontroller cost LM2901 comparator 100k resistors film capacitor CMOS COP822C microcontroller provides squarewave signal with logic levels very close This generates small ramp voltage capacitor LM2901 quad comparator input
National Semiconductor Application Note Kevin Daugherty August 1991
minimize error tradeoff must made when selecting resistor microcontroller output (L1) should have large resistor minimize output switching offset (Vos) comparator should have small resistor error caused Ibos (input bias offset current) Once resistor determined capacitor should chosen that time constant large enough provide small incremental voltage ramp This design sample time time constant with film type capacitor which leakage current prevent errors Since 100k resistor used network comparator input another 100k resistor required input balance offset voltage caused comparator (input bias current) Figure illustrates relationship between microcontroller squarewave output capacitor charge discharge Every comparator sampled capacitor voltage (Vc) below network will receive positive pulse inverse true above sample time Note that with this approach waveform broken into several small pulses over fixed period instead having single pulse represent duty cycle thus relatively small time constant used Mathematical Analysis total number pulses then then total number Toff pulses Vc(t) (Vout start conversion KnVout KnVin KmVin KmVO KnVout KmVo KVin Vout Vref
solving nVref (nVos mVo) Note that value drops equation therefore error factor
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FIGURE Signal
FIGURE Basic Circuit
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TRI-STATE registered trademark National Semiconductor Corporation C1995 National Semiconductor Corporation
DD10407
RRD-B30M75 Printed
SOFTWARE DESCRIPTION Single Channel Referring flow chart Figure code listed Figure software counters TOTAL first preloaded with accumulator register then loaded with provide initialization final conversion cycle Next port configured complete initialization microcontroller comparator output checked with IFBIT instruction This will determine whether network will receive positive (Vref) ground pulse think microcontroller part feedback path comparator microcontroller uses comparator output decide what level output required keep capacitor equal unknown input voltage Each time negative pulse applied counter decremented DRSZ Similarly each time sample loop completed TOTAL counter decremented DRSZ Note that instructions used high loops These necessary provide exactly same cycles high output pulse Once TOTAL register decremented zero initialization loop completed Immediately afterwards output TRI-STATE mode minimize capacitor voltage variations while other instructions completed After first conversion IFEQ instruction will true TOTAL registers will reloaded with Following this restored high output multiplier decremented this point capacitor equal actual conversion started When TOTAL register decremented zero (255 samples later) conversion complete will reloaded since decremented IFEQ will longer true accumulator then loaded with stored location with final instructions (RBIT LCONF RBIT optional depending application amount additional code required This will prevent capacitor from decaying appreciably between conversions allow much quicker capacitor initialization time Otherwise more time required diode speed-up circuit shown Figure required fully charge capacitor prior starting actual conversion Eight Channel This bascially same that single channel Referring flow chart Figure code Figure differences front back ends Before
conversions started register initialized location accumulator then loaded with current pointer OR'ed with LDATA LDATA) finally LDATA register modified provide proper output select LDTA) Following actual conversion cycle result stored current pointer which also auto-increments register next conversion will this select next channel determine where store result Once eighth channel converted IFEQ instruction will true pointer will reset before next conversion started
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FIGURE Flow Chart
program listed below will work COP800 microcontroller COP820 COP840 COP880 COP888) 100K MICRO CYCLE TIME FIRST CONVERSION INITIALIZES RESULT STORED LOCATION CHIP LCONF40D1 LDATA40D0 TON40F2 TOTAL40F0 TOTAL LDATA LCONF IFBIT HIGH RBIT DRSZ COUNT SBIT DRSZ TOTAL LOOP RBIT LCONF RBIT IFEQ RELOAD SBIT SBIT LCONF DRSZ LOOP USED DETERMINE WHEN RELOAD PRELOAD TOTAL COUNTS MULTIPLIER (255 INIT PLUS RESULT) PRELOAD LOAD POINT LDATA PORT DATA L04WEAK PULL L14HIGH PORT CONFIG L04INPUT L14OUTPUT TEST COMPARATOR OUTPUT JUMP L041 EQUALIZE TIME SETTING RESETTING DRIVE DECREMENT WHEN DRIVING DRIVE HIGH
LOOP
HIGH
COUNT
EQUALIZE HIGH LOOPS DECREMENT TOTAL COUNTS TRISTATE MINIMIZE ERRORS FROM EXTRA CYCLES CHECK INITIALIZATION LOOP COMPLETE JUMP TRUE JUMP LOOP RELOAD WITH SYNC TOTAL COUNTERS HIGH RESTORE OUTPUT DECREMENT MULTIPLIER UNTIL ZERO CONTINUE UNTIL AFTER CONVERSION LOAD WITH STORE RESULT LOCATION FIGURE Single Channel Listing
RELOAD
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FIGURE Channel Flow Chart
SELECTS CHANNEL OUTPUT DRIVES CHIP LDATA40D0 LCONF40D1 TON40F2 TOTAL40F0 CONVER TOTAL LDATA LDATA LDATA LCONF LOOP IFBIT HIGH RBIT DRSZ COUNT HIGH SBIT COUNT DRSZ TOTAL LOOP RBIT LCONF RBIT IFEQ RELOAD RELOAD TOTAL SBIT SBIT LCONF DRSZ LOOP IFEQ CONVER
CD4051 COMP RESULTS STORED
INITIALIZE PRELOAD TOTAL COUNTS TOTAL LOOP COUNTER PRELOAD INIT POINT LDATA LDATA L0124LOW L34PULLUP L44HIGH USED CURRENT POINTER SELECTPROPER CHANNEL MODIFY LDATA CHANNEL SELECTION LCONF L44OUTPUT L34IN TEST COMPARATOR OUTPUT INPUT JUMP L34HIGH EQUALIZE TIME RESET DRIVE WHEN COMPARATOR DECREMENT WHEN APPLYING JUMP COUNT UNLESS REACHES ZERO DRIVE HIGH WHEN COMPARATOR HIGH
EQUALIZE HIGH LOOP TIMES TOTAL COUNTS EACH LOOP JUMP UNLESS TOTAL CNTS TRISTATE MINIMIZE ERROR DETERMINE WHEN RELOAD CHECK CONVERSION COMPLETE TRUE OTHERWISE JUMP RELOAD START NEXT CONV SYNC TOTAL COUNTERS HIGH RESTORE OUTPUT DECREMENT TOTAL LOOP UNTIL ZERO DONE WHEN ZERO LOAD WITH RESULT STORE RESULT CURRENT POINTER AUTO INCREMENT POINTER CHECK POINTER EIGHTH CHANNEL CONVERTER RESET POINTER
FIGURE 8-Channel Listing
ACCURACY CIRCUIT CONSIDERATIONS basic circuit will provide bits accuracy depending choice comparator passive components With this type design several tradeoffs error sources should considered First conversion equation assumes that microcontroller output switches exactly Vref) COP822C will typically switch between from with light load This will cause error equal offset voltage times duty cycle (equ Fortunately offsets tend cancel each other range voltages near input voltages offsets minimal very small voltage drop across resistor error undesirable offset voltage reduced paralleling outputs with same levels together using CMOS buffer such 74HC04 drive network (see Figure suggested circuits) Another possible source error with LM2901 worst case input bias offset current over temperature This will cause error equal Ibos which equals with 100k resistor Either resistor Ibos reduced improve error resistor reduced then port offset voltages will increase preferred approach select comparator with lower Ibos such LP339 which Ibos only comparator also introduce error LM2901 LP339 only added benefit using LP339 that since Ibos small resistor network larger addition network could used several comparator input channels (refer Figure using LM604 (Figure basic software easily extended converting several channels This will only require control line selected before conversion started Since LM604 needs powered from higher voltage than input voltage range output voltage will also higher than microcontroller supply This requires current limiting resistor used series
between LM604 output COP8XX Note that more LM604's paralleled providing several more channels utilizing control input that TRI-STATE LM604 output when high When more than channels analog signals required measured circuit Figure 7(d) recommended This circuit utilizes inexpensive CD4051 multiplexer with single comparator (which could on-board micro) When measuring several input voltages that vary TRI-STATING output driving between conversions possible necessary provide time constants charge capacitor within Note that there 1N4148's across comparator inputs diodes provide quick capacitor charge path providing that total input resistance much smaller than resistor used network resistor will meet requirements within sample times) Once capacitor charged within about diodes will start turning this point microcontroller will start dominating charge discharge capacitor After initialization cycle complete capacitor very close unknown diodes effectively circuit Depending speed accuracy requirements total number counts used conversion changed Increasing counts will give more accuracy with practical limit about bits With increased resolution capacitor ramp voltage sample time should decreased that capacitor initialized within prior conversion This done either increasing time constant using initialization routine with shorter sample time conversion time will depend total counts microcontroller oscillator frequency described below Tcon Total counts cycles) (instruction cycle time) Another factor consider when non-ratiometric conversion required reference voltage must have tolerance match desired accuracy
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High Drive with Multiple Outputs
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Multiple Channels with LP339 Ibos Comparator FIGURE Suggested Circuits
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Four Channel with LM604 MUX-Amplifier
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Eight Channel Circuit FIGURE Suggested Circuits (Continued) CONCLUSION technique described this application note provides relatively fast discrete implementation with substantial cost savings compared dedicated hardware Minimal microcontroller software required interface with comparator network Depending application requirements designer tailor basic 8-bit number ways varying total software counts desired speed resolution adjusted number channels will determine number comparators used chosing comparator recommended that designer refer data sheets match Ibos desired accuracy When other than instruction cycle used time constant should scaled provide maximum peak-peak ramp voltage desired accuracy example 8-bit accuracy desired instruction cycle time instead multiply calculate Keep mind that comparator input voltage limited that erroneous nonlinear results Another possible problem during development When doing in-circuit emulation with development equipment note that there will ground loops cable thus causing errors your measurements reduce this connecting extra wire between your prototype development system power still possible offsets sockets holding COP8XX development board however this should relatively small best test take accurate measurements with emulator actual prototype circuit
Pulse Width Modulation Conversion Techniques with COP800 Family Microcontrollers
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