DP8459 Window Strobe Function INTRODUCTION This note explains det

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DP8459 Window Strobe Function
DP8459 Window Strobe Function
INTRODUCTION This note explains detail Strobe Function incorporated DP8459 ALL-Code Data Synchronizer recommended that reader reviews data sheet prior reading this note Strobe Function within DP8459 chip considerably more intricate versatile than existing Strobe Function commercially available data synchronizers thus this application note intended point significance this device feature convey important information proper also intent this writing offer explanation concept Strobing associated terminology customers familiar with subject Further ease with which Strobe Function employed optimize system performance realize cost effective manufacturing products discussed DESCRIPTION Strobe Function implemented DP8459 chip provides powerful convenient means synchronization window shifted either Early Late with respect nominal position definition Strobe step digitally programmable time displacement (DP8459) synchronization window from nominal position expressed tVCO) where ``M'' value Strobe control word having range from fine resolution individual strobe step (LSB) conjunction with thirty-one steps movement provided DP8459 unprecedented among commercially available devices which have most fixed strobe positions strobe control word ``M'' five binary bits within Control Register shown Figure sign which determines Early Late strobe movement last control word test which when high used factory testing This always first serially loaded into shift register following truth table (refers Table maps ``tS'' corresponding Strobe word representations
National Semiconductor Application Note Kern Wong February 1989
TABLE Window Strobe Truth Table Strobe Strobe Word
Window Strobe (Typical)
uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO
uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO uVCO
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FIGURE Strobe Control Register Diagram
MICROWIREis trademark National Semiconductor Corporation C1995 National Semiconductor Corporation 10251 RRD-B30M105 Printed
Strobe Function also referred Window Strobe because strobing used adjust relative position synchronization window better illustrate relationship strobe synchronization window please refer Figure This diagram depicts concept synchronization window synchronization window defined continuously repeating time cell which nominal time span equal period Ideally Encoded Read Data pulse will captured correctly interpreted regardless position within window boundaries However ideal window width cannot realized practice noise device non-idealities such jitter Thus small fraction usuable window trun-
cated leaving correspondingly narrower available window width device mismatch other asymmetric phenomena also present another window eroding phenomenon called window shift results This phenomenon causes average data window center shift with respect expected mean position Referring Figure note that static window width this case appears congruent that Figure However early shifted data bits Figure actually have greater probability falling outside window since shifted late Strobe function simple powerful feature which will explained later allows user offset within undesirable window shift improve system performance
Synchronization Window Diagram
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FIGURE Synchronization Window
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FIGURE Window Shifted Late
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FIGURE Bitshirt Probability Occurrence
BYPASSING STROBE FEATURE fully harness Strobe feature intelligent interface environment MICROWIREbus interfaced processor controller function program internal control register during initialization between read operations information stored control register bits through defines amount sense window displacement (Important must ``0'' normal operation since ``1'' this location will place chip into test mode used during production testing typical system diagram with MICROWIRE shown Figure customer does wish Strobe feature (strobe word fixed nominal setting bits equal MICROWIRE bypassed appropriate hardwiring control register inputs depicted Figure control register content always nominal strobe upon Read Gate assertion Please note that window truncation specified ``Nominal'' Strobe setting Therefore optimum window performance realized this setting This similar device configurations usually employed when prime interest construct simple setup general device evaluation purposes course also used lower data rate systems particularly tape floppy drives where window margin requirement generally less stringent
Although technique just described serve convenient means control register content very important note that requires user correctly sequence Read Gate example chip must powered non-read mode this with Read Gate Since Read Gate tied ``CRE'' logic enables shift register portion control register serially enter data while control latch held previous state Concurrently pulses must present which serve clock pulses shift ``zeroes'' data Finally Read Gate must then switched high state thus inhibiting data entry into shift register allowing data just entered into shift register transferred latch Whether loading control registers with method shown Figure (this diagram represents typical system setup where also controls pins) employing same scheme external circuitry Read Gate tied synchronizer chip must powered with Read Gate After control data been loaded Read Gate must high (The need pulse Read Gate mentioned March 1988 datasheet)
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FIGURE Typical System with MICROWIRE
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FIGURE Typical System without MICROWIRE WINDOW TRUNCATION SPECIFICATION Strobe function also used qualify window truncation specification example DP8459 half-window loss ``tT'' represents static window truncations from relevant circuits mechanisms data synchronizer window shift jitter ``tT'' specified period) maximum with strobe used then ``tT'' maximum would typically This however tested therefore guaranteed static window truncation consists separate major contributors window loss namely ``TS'' (which window shift) ``TN'' (which truncation noise other relevant mechanisms) window strobe feature used minimize ``TS'' strobe step ``TS'' minimized typically remaining loss ``TN'' DP8459 window specifications valid over entire operating temperature power supply ranges datasheet Thus window specification ``TT'' actually comprised ``TN'' ``TS'' temperature guardbanding measurement system guardbanding ``tT'' parameter tested device checked data rates window specification compliance part final test manufacturing should noted that data sheet recommended strobe position settings determined statistical averaging many units during device characterization high performance drive system applications users take advantage this Strobe feature individually ``tune'' synchronizer optimal detection window symmetry STROBE FUNCTION There several reasons wishes alter inherent average window position generated phaselocked oscillator within synchronizer First average data window position perfectly centered about expected mean data position Second deliberately skewing window position serve recover malshifted data bits Third shifting window introduce excessive error rate testing calibration purposes There could substantial amount random displacement (jitter) individual bits dependent design read write head media signal processing electronics result interaction This exemplified Figure which shows that data displacement (also known bitshift) versus probability occurrence Gaussian distribution bitshift theory total bitshift refers movement magnetic transitions with respect position where they recorded There three dominant factors which contribute loss window margin difference between farthest shifted actual window boundary intersymbol interference which function recording components code used pulse detector imperfection which primarily caused
equalization differentiation errors phase locked loop accuracy which involves inherent window skew jitter first contribute bitshift while last reduces effective window width Fortunately fraction window loss window skew substantially nullified excessive bitshifts compensated during read mode strobe function high performance data synchronizers such DP8459 first three LSBs Strobe Control Word produce strobe steps that have shown track quite well with respect predicted values example data rate typical characterization data indicates less than nanosecond deviation between measured strobe readings corresponding calculated strobe values data taken with Strobe Control Word range from with chip operating recommended that this strobe range used applications requiring relatively accurate strobe step control such window alignment data recovery window margin test higher strobe ranges accurate cumulative error when more bits control word turned Thus this range perhaps more suitable inducing excessive soft errors system analysis experimentation purposes System designers thus perform real time system optimization studies identify correct anomalies within read channel chain example after creating significant amount soft errors component within read channel changed modified determine error reduction achieved
DESIGN CONSIDERATIONS important note that changing strobe setting requires finite response time control circuitry addition time required load 5-bit Strobe Control Word internal register user must account settling time associated with change strobe This function Timing Extractor Filter (TEF) components data rate which data synchronizer being operated highly recommended that change strobe setting done with Read Gate deasserted with sufficient time allowed settling prior initiation another read sequence Time Extractor Filter used second reference phase-locked loop within chip This loop stably locks crystal reference oscillator servo derived) frequency reference responsible producing delay time exactly one-half period this delay synchronizer data window accurately centered about mean position such that optimal capturing data becomes possible presence jittery data pulses Furthermore strobing which modifies one-half period delay achieved programming small amount change current (sourcing sinking) current controlled oscillator reference phase-locked loop circuit reference constructed identical that primary prevent frequencycontrol-voltage runaway primary loop comparator circuit connected between loops sense when primary oscillator current crosses thresholds which placed above below reference current (Please refer simplified block diagram Figure
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FIGURE Reference Primary PLLs within DP8459
either preset threshold crossed comparator directs correction signal primary limits further excursion control voltage Since reference part feedback loop that regulates primary Time Extractor Filter components also affect synchronizer performance strobe step amount (March 1988) DP8459 datasheet Figure presents table estimated settling times phase step different (TEF) loop component values operating various data rates calculated numbers that table reflect idealized settling time reference block only Assumptions made calculation empirical data available time publication were initial frequency offset values loop gain loop's natural frequency were approximately equal effect parasitic conditions were neglected Current data shows settling time from maximum strobe movement step from nearly times longer than figures projected datasheet TSETTLE (measured) instead predicted TSETTLE measured approximately versus calculated practice expected that customers would normally strobe range reasons mentioned previous section Typical data strobe movement from also included here reference with TSETTLE TSETTLE Complete settling synchronized outputs primary loop require slightly longer time Although this settling time substantially reduced either raising bandwidth increasing damping filter this usually degrades static window margin percent ideal window width) Since window margin important parameter should compromised with settling time multi-data rate system recommended employ components associated with lowest data rate general settling time critical parameter except perhaps test time considerations when multiple strobing involved margin testing production line) Other than highest performance fastest systems latency time such system factors soft-sectoring command instruction delays error correction retrys typical hard disk storage drives much longer than settling time Therefore changing strobe settings from sector sector practical many hard disk environments advisable that even systems that limited their latency time between read executions allow minimum revolution time between strobing should mentioned also that customer wants change settling time must observe stability criteria system APPLICATIONS Individual ``Trimming'' mass storage systems operating data rates less) three nanoseconds window loss skew acceptable specification
higher data rates storage systems tolerate such figures mentioned previous section portion window loss ascribed window skew Although most this loss recovered undertaking trimming synchronizer block often unpleasant manufacturing issue presently this involves technician assembly line adjusting potentiometer while monitoring oscilloscope high performance drives always desirable regain much margin practical production ability perform in-system window deskewing extremely attractive attribute because attain potential window margin available optimizing each drive individually should noted that this superior having chip statically adjusted prior system integration course such in-system trimming procedure usually tags relatively high premium such added cost time labor material Other than discrete designs monolithic devices generally afford limited adjustment nullify window skew DP8459 synchronizer's Strobe feature presents viable solution perform window adjustment easily inexpensively digitally controlled strobing within chip allows ``trimming'' detection window without need ``tweak'' external components mentioned 5-bit resolution strobe function makes possible deskew inherent window offset with subnanosecond precision higher data rates Window Centering Algorithm Truncation inherent window shift mostly nullified window strobing technique Hence intelligent drive system greatly benefit from DP8459 Strobe feature because window centering algorithm installed with extra hardware adjustment required Moreover task window deskewing readily automated with DP8459 MICROWIRE example some industrial interface standards such Rev-2 ``ESDI'' interface standard already supports 4step Early Late strobe option command level independent strobe step size implemented following describes strobing alogorithm that employed window centering typical window centering routine should establish some higher than nominal error rate thresholds strobing data window early direction then repeating same process late direction early late strobe settings which yield equivalent error distribution then stored From strobe excursion information window center skew thus determined appropriate strobe word correct window skew implement effective routine should employ periodic test pattern such that average decode window made more stable system error rate deliberately made more responsive some constant (time independent) source window degradation functions such maximum crowding reduced signal noise ratio introduced during testing performing test inner recording cylinders Winchester type disk drive Such routine could execute during system power-up produce optimal centering window system would function like having built-in tester perform window auto-calibration power scheduled maintenance interval Data Recovery Another valuable application DP8459 Strobe function service error-bound data recovery Infrequently need arises rescue vital marginally recorded data
information from removable data cartridge particular from (magnetically) damaged defective storage module Usually such operation requires repetitively reading through block data time exhaustively shifting through some range window strobe steps attempt correctly retrieve data interest However employing DP8459 conjunction with suitable data retrieval algorithm could offer mass storage system powerful tool speedy recovery error-bound data DP8459 device capable delivering typically window shift resolution furthermore thirty-one steps strobe setting programmable MICROWIRE Such features make possible incorporate sophisticated utility programs such data recovery Window Margin Test technique Strobing employed window margin testing practice Shifting detection window acceptable means ``marginalize'' window (modify generated data window) checking merit read channel Although been gaining popularity test equipment sector theory behind unfamiliar some drive users manufacturers alike Window margin testing extension window centering process discussed above Please refer Appendix discussion window shifting window narrowing techniques error-rate analysis Window strobing very time-saving method analyze drive system's error rate characteristics Unlike conventional testing does consume hours transfer data perform data integrity comparison Hence DP8459 Strobe Function very convenient this purpose example manufacturing environment data storage drive system will thoroughly characterized error rate profile with independent test techniques Then will followed series window shift induced error rate tests accelerated error rate profile thus generated next compared those produced from other test methods Error distribution statistical correlation acceptable thresholds thus established production then correlated error rate figures their corresponding Strobe settings stored permanently memory drive system during final checkout These statistics subsequently utilized criteria performance acceptance
rejection such incoming inspections Furthermore systems field routinely interrogated their current window margin status This example take form embedded system maintenance routine reduce potential hazard unexpected system crash predicament effective window margin diagnostic test routine should employ most bitshift sensitive test pattern operate maximum crowding region media SUMMARY Window Strobe feature National's latest data synchronizer chip DP8459 been presented along with background information necessary utilization versatility power embedded this digitally controlled Strobe function unparalleled Although prime intent strobing deskew inherent window asymmetry thus improving device window margin also lends itself host important system applications They include in-system calibration window centering which also allows adjustment individual drives maximize their performance margin system window margin analysis design optimization system maintenance data recovery damaged media without need dedicated test equipment DP8459 strobe feature provides economic reliable solution enhance value performance disk drive designs same time making products more cost effective manufacture Acknowledgement author would like acknowledge constructive criticisms suggestions encouragement offered Patrick Tucci preparation manuscript also thanks Gray Tietz comments improve presentation this note References ``Effects Bitshift Distribution Error Rate Magnetic Recording'' Katz Campbell IEEE Transactions Magnetics MAG-15 1979 ``Phase Margin Analysis'' Monett Memory Technology 1980
Appendix
purpose this appendix present some basic information commonly used tools methodologies window margin analysis will derive mathematical expression describing relationship between window shifting versus error rate probability will shown that this expression equivalent that which relates window narrowing method which well publicized technique analyze detection window margin There prevalent methods industry qualify window margin disk drives margin that remains when worst case jitter Encoded Read Data bits subtracted from non-ideal window (shifted truncated) method ascertain average pulse distribution from encoded data stream output usually involves precision time-interval acquisition apparatus which measures average pulse separation read from particular track that been preconditioned with worst case data pattern Another method measure accelerated soft error rate induced modifying data window derived from accurate (discrete designed) circuit Most disk drive testers employ either these methods window margin test should pointed that testers used research development usually built with variable window width design because they lend more sophisticated testing render additional useful information such system signal noise ratio media defects resolution head disk components also interesting note that because external system required such tester generally capable checking data synchronizer block disk data storage system Since system with programmable detection window width expensive difficult build nearly commercial disk drive testers manufacturing user applications employ such technique Instead they employ other methods such measuring average pulse distribution average synchronization window width Although strobing also incorporated some drive testers they contain only strobe steps Therefore window margin analysis their result compared more extensive data gathered from variable window width method This trend however changing engineers turning more sophisticated strobing both disk drive drive tester designs window shifting technique mimic window narrowing error rate response applied window margin analysis also following discussion presents accepted model used industry describe error rate probability versus window width shows that equivalent expression also holds case shifted window mentioned Strobe Function section Gaussian distribution describes error rates shift such distributions needed define error probability distribution associated with positive bitshifts associated with negative bitshifts This fact that adjacent bits pushed Early direction pushed Late direction residual bitshift denoted offset ``To'' width each distributions defined ``Tne'' which describes broadening distributions random noise environment (please refer Figure Hence appropriate Gaussian function defined distributions written No(K) (tbTo2 (Tne)2
where ``No'' number bits read revolution disc ``K'' normalizing constant normalize each resulting error constants unity when distributions integrated ``t'' time associated with bitshift distribution equation error rate which simply area tails bitshift distribution beyond available window width written Error Rate K(No) To)2 (Window- 2(Tne)2 Narrowed)
To)2 2(Tne)2
To)2 2(Tne)2 erfc erfc
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FIGURE Error Probability from Early Late Shift Distributions
where ``erfc'' complementary error function ``t'' half-window width which error rate observed error rate versus window width curve takes form represented Figure This obtainable case where data window modified narrowing window while keeping centered about phase-locked oscillator expected window This technique typical engineering drive testers employing external system window margin analysis Consider window shifted instead being narrowed limits second integration equation changed corresponding ``erfc'' term becomes Error Rate (Shifted Window)
K(No)
To)2 2(Tne)2 To)2 2(Tne)2
This corresponds error distribution evaluated with average window having nominal width ``Tw'' ``t'' being time position window's right-side boundary theory techniques with window narrowing that window shifting equivalent Empirical results from these approaches should correlate incremental change window displacement window size employed same both cases Typical error rate versus amount shifted window with respect mean distribution should similar profile depicted Figure means implement shifted window scheme DP8459 Strobe function margin testing discussed text Unlike variable PLL-window technique this method presents bootstrap test methodology wherein synchronizer system included window margin test
tbTo erfc efrc
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FIGURE Error Rate Distribution Window Width
DP8459 Window Strobe Function
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