Component Count Video Data Terminal Using DP8350 Controller 8080

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Component Count Video Data Terminal Using DP8350 Controller 8080

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Component Count Video Data Terminal Using DP8350 Controller 8080
Component Count Video Data Terminal Using DP8350 Controller 8080
INTRODUCTION DP8350 technology integrated circuit designed provide control signals cathode tube (CRT) display system This application note explains system using DP8350 8080 microprocessor design philosophy shows DP8350 interfaces 8080 completing function video data terminal with minimum component count After reading understanding this application note reader will realize ease flexibility designing video terminals with DP8350 thoroughly understand this application note reader must familiar with DP8350 8080 microprocessor video data terminal described divided into following sections (Figure DP8350 controller (CRTC) 8080 system which includes interrupt instruction port oscillator control support chips character generator communication element keyboard baud rate select ports CRTC DP8350 generates required control timing signals displaying video information video monitor Here summary controller's functions clock control counter outputs character generator Bidirectional address refresh counter refreshing video allowing microprocessor loading internal DP8350 registers Direct drive horizontal vertical sync signal outputs Direct cursor address location output cursor internally delayed pipelined allowing access time video character generator (Figure microprocessor provides CRTC operator external machine control system When controller actively refreshing video during vertical retrace blank scan lines) microprocessor enabled system housekeeping (Figure This method multiplexing with CRTC eliminates need line buffers CHARACTER GENERATOR character generator consists elements address latch hold input address character allowThe DP8350 equivalent INS8276
National Semiconductor Application Note Brilliot July 1986
access time character that stores ASCII character form parallel serial conversion shift register shift register converts character ROMs parallel output serial form serial output from shift register true video output modulating video monitors electron beam which writes characters screen COMMUNICATION ELEMENT INS8250 asynchronous communication element (ACE) data terminal allows portion data terminal communication with peripherals host computers correct baud rate (Figure programmed send receive serial data standard baud rates from 4800 baud conjunction with DS1488 DS1489 line drivers receivers also provides full RS-232C synchronous communication higher baud rates desired System communication speed must always considered insure baud rate does exceed time required process data byte Asynchronous communication baud rates higher than 4800 possible adding line buffer SYSTEM INITIALIZATION Application terminal's power supply resets microprocessor communication element controller Resetting necessary clear interrupt Resetting CRTC absolutely necessary since microprocessor loads cursor page registers initialization routine Following reset interrupts disabled avoid unwanted interrupts from CRTC ports Refer initialization routine flowchart stack pointer loaded bottom scratch (3FFFH) register save pointer (Figure entire written with ASCII spaces generating cleared screen After completion screen clear loop writes 000H cursor page registers DP8350 CRTC routine homes cursor upper left corner screen page register loaded with 000H therefore video refreshed CRTC from that starting address last address screen video (1920 characters)
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TRI-STATE registered trademark National Semiconductor Corp C1995 National Semiconductor Corporation
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RRD-B30M105 Printed
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cursor internally pipelined CRTC allow access time character generator
FIGURE Video Data Terminal Detailed Block Diagram
Abbreviations Line Rate Clock Clear Line Counter LVSR Load Video Shift Register LCGA Latch Character Generator Address Line Line Counter Enable Video Keyboard Interrupt Vertical Blanking
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FIGURE Start Interrupting Multiplexing 8080 with DP8350
ready perform communication element (ACE) load routine First baud rate divisor must determined baud rate select switch read providing code which corresponds appropriate 16-bit divisor This divisor determines baud rate which will communicate additional programming requirements needed communicate with host computer systems could also done this time software this system does contain additional programming There many programming modes related Details these modes beyond scope this application note start look-up table (Figure loaded simple algorithm that loads adds data referencing number that row's starting address reference table (Figure initialized next direct loading This table provides with page bottom page next load cursor scratch numbers system housekeeping Finally start vertical interrupt latches cleared (Figure register pointers loaded forced wait loop with interrupts enabled NON-SEQUENTIAL ADDRESSING data terminal described here designed non-sequential starting addressing many systems sequential addressing used character consists scan lines addressed repetitive times from 000H through 04FH (Figure next refreshed same manner from 050H 09FH starting address sequential 000H 050H 0A0H-EB0H numbers b2FH respectively Non-sequential addressing would equivalent 050H 000H 0A0H- EB0H numbers b2FH respectively (Figure conjunction with non-sequential addressing quite easily accomplished with DP8350 since this features designed into part Accomplishing this task basically requires following sequence events Assume CRTC finished writing video middle monitor's screen This system character font field (Figure completion last video scan line CRTC line counters continue count last lines Video present since character only scan lines high blank scan lines permitting CRTC address outputs TRI-STATE allowing When line counter outputs increment scan line interrupt signals interrupt occurring start interrupt interrupt routine fetches next CRTC number from reference table (Figure This number converted starting address explained later loaded CRTC start register finishes routine clearing interrupt readying itself next start interrupt entire routine takes scan line time approximately CRTC continues scan video from that starting address next repetitive scan lines next Many advantages become apparent using non-sequential addressing scheme Scrolling down with cursor always screen done faster easier from hardware software standpoint Exchanging with another fast since necessary rewrite video swapping useful higher terminals requiring editing functions
Address
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FIGURE Organization
Memory Reference Tables
Page Number High Address Data Address Data Number Page High Address Data Address Data
FIGURE Start Look Table
Function Last 8080 First Character CRTC Save Temp Temp
Address 3F60 3F61 3F62 3F63 3F64 3F65 3F66 3F67
Data
Initialized Data
Command
Function Clear start vertical interrupt latches Read keyboard Read baud rate select switch
FIGURE Input Output Space
FIGURE Reference Table
Device CRTC
Address 0000 0FFF 3000 3FFF 5000 5FFF 9000 9007
Number
High Address Data
Address Data
Direct device selecting used minimize system component count
Start Address 3XXX Selects 5XXX Selects CRTC
FIGURE Addressing Space
FIGURE Example from Start Look Table
LOADING DETAILS Obtaining next starting address controller accomplished addressing adding scheme from start look-up table same scheme used determine needed address given number
KEYBOARD INTERRUPT external keyboard requirements ASCII outputs with suitable strobe interrupt keyboard servicing Refer keyboard interrupt flow chart After keyboard buffer read data byte tested (CNTL baud rate command test fails writes data byte Passing test forces read baud switch load with baud rate INTERRUPT mentioned above data byte read from keyboard that baud rate command enters accumulator writes data byte from accumulator transmitter holding register proceeds shift data byte with appropriate start stop bits serially from (SOUT) output data shifted serial input (SIN) loaded into receiver holding register When register full interrupts initializating service routine Refer interrupt flow chart reads receiver holding register Reading resets interrupt data byte resides accumulator tests control escape function function executed test conditions Refer keyboard interrupt routine software listing data byte written video cursor address which appears monitor screen cursor character numbers incremented long character requires further testing recognize following situations last monitor's screen maximum video Essentially cursor forced stay visible video monitor's screen video always kept scratch (Figure FULL HALF DUPLEX OPERATION data terminal host computer full duplex mode operation would receive serial information process send back input Using terminal stand-alone mode testing serial SOUT tied serial half duplex mode data byte sent host computer same time sent terminal When data terminal communicate with host computer full duplex mode operation desirable
Figure shows number address taken from start look-up table number loaded from reference table register determines starting address from number stores 16-bit pointer register higher order bits contain address controller (Figure Here details this accomplished Refer start interrupt software listing Figure registers loaded point number reference table number accumulator moved into register register this example contains 3F20 which points HIGH DATA (3A) addressed data moved accumulator then register desired point CRTC then would have been added first register still contains 3F20H obtain DATA register moved accumulator added register contains 3F50H points DATA (00H) data loaded accumulator then register registers contain 3A00H which starting address number method just described used throughout terminals program move cursor load page load starting address CRTC
VERTICAL INTERRUPT vertical interrupt occurs when CRTC completed refreshing video page (1920 characters) information Vertical blanking identifies that condition interrupts forcing vertical interrupt routine Refer vertical interrupt flow chart routine moves first number CRTC number updating next start load occurs with page address first video screen
video screen allowed scroll only through video (000H EFFH) keeps video screen within these bounds loading start register with that address range only (row 2FH)
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FIGURE Drum Analogy
DP8350 8080 Video Data Terminal Basic Software Flow Chart Initialization
Keyboard Interrupt
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DP8350 8080 Video Data Terminal Basic Software Flow Chart (Continued) Start Interrupt
Vertical Interrupt
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DP8350 8080 Video Data Terminal Basic Software Flow Chart (Continued) Interrupt
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FEATURES Keyboard input port Serial 9600 baud kbytes kbyte video pages characters character font field size Block cursor Single crystal Maximum time frame without line buffers Line page scroll capability Full cursor control Complete software flexibility Modem control capability component count Field reverse Clear screen clear home clear swap (row interchange)
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Note DP8350 data sheet sync details Note open reverses video page
Parts DP8350 DP8228 DP8224 8080A-2 INS8250 2708 DM81LS95 DM81LS96 DM74LS32 DM74LS74 DM74LS08 DM74LS04 DM74LS73 DM74365 DM74148 DM7474 DP8212 DM74LS86 char latch arrays Xtal Bypass capacitors parts
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(VCC GND) (VCC GND) (VCC GND) (VCC GND) (VCC GND)
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Continued Next Page
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DEFINITIONS Asynchronous communication element CRTC Cathode tube controller Video Page Visible screen data Video Entire portion used only display First Address video page Last Address bottom video page CRTC Address next load 8080 Address cursor Character Character location XXXH hexidecimal numbers
REFERENCES National Semiconductor Data Sheets DP8350 Series Programmable Controllers INS8250 Asynchronous Communications Element National Semiconductor Application Notes Simplify Terminal Design with DP8350 AN-198 Data Differential Line Drivers Receivers AN-83 Transmission Line Characteristics AN-108 Hardware Reference Manual Board Level Computer National Semiconductor Microcomputer Systems Chapter System Interfacing
Component Count Video Data Terminal Using DP8350 Controller 8080
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
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Component Count Video Data Terminal Using DP8350 Controller 8080

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