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SPICE Device Model Si5941DU Vishay Siliconix Dual P-Channel (D-S) MOSFET
CHARACTERISTICS
attached spice model describes typical electrical characteristics p-channel vertical DMOS. subcircuit model extracted optimized over 125°C temperature ranges under pulsed gate drive. saturated output impedance best gate bias near threshold voltage. novel gate-to-drain feedback capacitance network used model gate charge characteristics while avoiding convergence difficulties switched model. model parameter values optimized provide best measured electrical data intended exact physical interpretation device.
SUBCIRCUIT MODEL SCHEMATIC
This document intended SPICE modeling guideline does constitute commercial product data sheet. Designers should refer appropriate data sheet same number guaranteed specification limits. Document Number: 74132 S-52019Rev. 03-Oct-05 www.vishay.com
SPICE Device Model Si5941DU Vishay Siliconix
SPECIFICATIONS 25°C UNLESS OTHERWISE NOTED) Parameter Static
Gate Threshold Voltage On-State Drain Current
Symbol
Test Condition
Simulated Data
Measured Data
Unit
VGS(th) ID(on)
VGS, -250A -5V, -4.5V -4.5V, -3.6
0.80 0.058 0.083 0.114 -0.80 0.055 0.086 0.125 -0.80
Drain-Source On-State Resistancea
rDS(on)
-2.5V, -2.9 -1.8V, -0.66
Forward Transconductancea Diode Forward Voltage
-4V, -3.6 -1A,
Dynamic
Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge
Ciss Coss Crss -4.5
Notes Pulse test; pulse width duty cycle Guaranteed design, subject production testing.
www.vishay.com
Document Number: 74132 S-52019Rev. 03-Oct-05
SPICE Device Model Si5941DU Vishay Siliconix
COMPARISON MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)
Document Number: 74132 S-52019Rev. 03-Oct-05
www.vishay.com
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