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SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 State-of-the-Art EPI
Top Searches for this datasheetSN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 State-of-the-Art EPIC-IIBBiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) 25°C High-Impedance State During Power Power Down High-Drive Outputs (-32-mA IOH, 64-mA IOL) Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat Package, Plastic Ceramic DIPs SN54ABT541.J PACKAGE SN74ABT541B.DB, PACKAGE (TOP VIEW) SN54ABT541.FK PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN54ABT541 SN74ABT541B octal buffers line drivers ideal driving lines buffering memory address registers. devices feature inputs outputs opposite sides package facilitate printed circuit board layout. ORDERING INFORMATION PDIP SOIC -40°C 85°C SSOP TSSOP CDIP -55°C 125°C LCCC PACKAGE Reel 1000 Tube Reel 2000 Reel 2000 Reel 1050 Reel 2000 Reel 1000 Reel Reel 2200 ORDERABLE PART NUMBER SN74ABT541BN SN74ABT541BDW SN74ABT541BDWR SN74ABT541BDBR SN74ABT541BDBRG4 SN74ABT541BPW SN74ABT541BPWR SNJ54ABT541J SNJ54ABT541W SNJ54ABT541FK TOP-SIDE MARKING SN74ABT541BN ABT541B AB541B AB541B SNJ54ABT541J SNJ54ABT541W SNJ54ABT541FK Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. EPIC-IIB trademark Texas Instruments. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 1993-2006, Texas Instruments Incorporated SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 DESCRIPTION/ORDERING INFORMATION (CONTINUED) 3-state control gate two-input gate with active-low inputs that either output-enable (OE1 OE2) input high, eight outputs high-impedance state. When between device high-impedance state during power power down. However, ensure high-impedance state above should tied through pullup resistor; minimum value resistor determined current-sinking capability driver. SN54ABT541 characterized operation over full military temperature range -55°C 125°C. SN74ABT541B characterized operation from -40°C 85°C. FUNCTION TABLE INPUTS OUTPUTS LOGIC SYMBOL(1) LOGIC DIAGRAM (POSITIVE LOGIC) Seven Other Channels This symbol accordance ANSI/IEEE 91-1984 Publication 617-12. with Submit Documentation Feedback SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 Absolute Maximum Ratings over recommended operating free-air temperature range (unless otherwise noted) Supply voltage range Input voltage range Voltage range applied output high power-off state Current into output state Input clamp current Output clamp current Package thermal impedance SN54ABT541 SN74ABT541B package package package package Tstg Storage temperature range -0.5 -0.5 -0.5 °C/W UNIT Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. input output negative-voltage ratings exceeded input output clamp-current ratings observed. package thermal impedance calculated accordance with JESD except through-hole packages, which trace length zero. Recommended Operating Conditions over recommended operating free-air temperature range (unless otherwise noted) SN54ABT541 Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Input transition rise fall rate Operating free-air temperature SN74ABT541B ns/V µs/V UNIT t/VCC Power-up ramp rate unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER Vhys IOZPU IOZPD IOZH IOZL Ioff ICEX (4), input Other inputs Outputs high Outputs high Outputs Outputs disabled Outputs enabled Outputs disabled Control Inputs -140 TEST CONDITIONS ±100 -180 -180 ±100 -180 0.55 0.55 0.55 0.55 25°C -1.2 SN54ABT51 -1.2 SN74ABT541B -1.2 UNIT typical values products compliant MIL-PRF-38535, this parameter does apply. products compliant MIL-PRF-38535, this parameter production tested. more than output should tested time, duration test should exceed second. This increase supply current each input that specified voltage level rather than GND. Submit Documentation Feedback SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 Switching Characteristics, SN54ABT541 over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT) 25°C UNIT Switching Characteristics, SN74ABT541B over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tsk(o) Skew between outputs same package switching same direction. FROM (INPUT) (OUTPUT) 25°C UNIT Submit Documentation Feedback SN54ABT541, SN74ABT541B OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS093L DECEMBER 1993 REVISED DECEMBER 2006 PARAMETER MEASURMENT INFORMATION From Output Under Test (see Note Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open LOAD CIRCUIT Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS Output Waveform Open (see Note Output Waveform (see Note tPZH Output Control tPZL VOLTAGE WAVEFORMS SETUP HOLD TIMES Data Input tPLZ tPHZ VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING NOTES: includes probe capacitance. Waveform output with internal conditions such that output low, except when disabled output control. Waveform output with internal conditions such that output high, except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time, with transition measurement. Figure Load Circuit Voltage Waveforms Submit Documentation Feedback PACKAGE OPTION ADDENDUM 30-Oct-2006 PACKAGING INFORMATION Orderable Device 5962-9471801Q2A 5962-9471801QRA 5962-9471801QSA SN74ABT541BDBLE SN74ABT541BDBR SN74ABT541BDBRE4 SN74ABT541BDBRG4 SN74ABT541BDW SN74ABT541BDWE4 SN74ABT541BDWR SN74ABT541BDWRE4 SN74ABT541BN SN74ABT541BNE4 SN74ABT541BNSR SN74ABT541BNSRE4 SN74ABT541BPW SN74ABT541BPWE4 SN74ABT541BPWLE SN74ABT541BPWR SN74ABT541BPWRE4 SNJ54ABT541FK SNJ54ABT541J SNJ54ABT541W Status ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type LCCC CDIP SSOP SSOP SSOP SSOP SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP LCCC CDIP Package Drawing Pins Package Plan 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Lead/Ball Finish Peak Temp POST-PLATE Type SNPB Call NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU Call NIPDAU NIPDAU Type Type Call Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call Level-1-260C-UNLIM Level-1-260C-UNLIM 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) POST-PLATE Type SNPB Type Type marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device. Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Addendum-Page PACKAGE OPTION ADDENDUM 30-Oct-2006 Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material) MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis. Addendum-Page PACKAGE MATERIALS INFORMATION 26-Apr-2007 TAPE REEL INFORMATION Pack Materials-Page PACKAGE MATERIALS INFORMATION 26-Apr-2007 Device Package Pins Site Reel Diameter (mm) Reel Width (mm) (mm) (mm) (mm) (mm) Pin1 (mm) Quadrant SN74ABT541BDBR SN74ABT541BDWR SN74ABT541BNSR SN74ABT541BPWR 10.8 6.95 13.0 13.0 TAPE REEL INFORMATION Device SN74ABT541BDBR SN74ABT541BDWR SN74ABT541BNSR SN74ABT541BPWR Package Pins Site Length (mm) 333.2 333.2 333.2 333.2 Width (mm) 333.2 333.2 333.2 333.2 Height (mm) 28.58 31.75 31.75 28.58 Pack Materials-Page PACKAGE MATERIALS INFORMATION 26-Apr-2007 Pack Materials-Page MECHANICAL DATA MLCC006B OCTOBER 1996 (S-CQCC-N**) TERMINAL SHOWN LEADLESS CERAMIC CHIP CARRIER TERMINALS 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6) 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0) 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 0.045 (1,14) 0.035 (0,89) 4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E JANUARY 1995 REVISED DECEMBER 2001 (R-PDSO-G**) PINS SHOWN 0,65 0,38 0,22 0,15 PLASTIC SMALL-OUTLINE 0,25 0,09 5,60 5,00 8,20 7,40 Gage Plane 0,25 0,95 0,55 Seating Plane 2,00 0,05 0,10 PINS 6,50 6,50 7,50 8,50 10,50 10,50 12,90 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065 12/01 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,30 0,19 0,10 0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,10 PINS 3,10 5,10 5,10 6,60 7,90 9,80 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153 POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. 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