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Top Searches for this datasheetSN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS Members Texas Instruments WidebusFamily State-of-the-Art EPIC-B BiCMOS Design Significantly Reduces Power Dissipation Typical VOLP (Output Ground Bounce) 25°C Distributed Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes Layout High-Drive Outputs (-32-mA IOH, 64-mA IOL) Latch-Up Performance Exceeds JESD Protection Exceeds 2000 MIL-STD-883, Method 3015; Exceeds Using Machine Model Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings SN54ABT16240A PACKAGE SN74ABT16240A DGG, DGV, PACKAGE (TOP VIEW) description 'ABT16240A devices 16-bit buffers line drivers designed specifically improve both performance density 3-state memory address drivers, clock drivers, bus-oriented receivers transmitters. These devices used four 4-bit buffers, 8-bit buffers, 16-bit buffer. These devices provide inverting outputs symmetrical active-low output-enable (OE) inputs. ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver. SN54ABT16240A characterized operation over full military temperature range -55°C 125°C. SN74ABT16240A characterized operation from -40°C 85°C. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Widebus EPIC-B trademarks Texas Instruments Incorporated. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 1998, Texas Instruments Incorporated products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS FUNCTION TABLE (each 4-bit buffer) INPUTS OUTPUT logic symbol This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS logic diagram (positive logic) absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Voltage range applied output high power-off state, -0.5 Current into output state, SN54ABT16240A SN74ABT16240A Input clamp current, Output clamp current, Package thermal impedance, (see Note package 89°C/W package 93°C/W package 94°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output negative-voltage ratings exceeded input output clamp-current ratings observed. package thermal impedance calculated accordance with JESD POST OFFICE 655303 DALLAS, TEXAS 75265 SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS recommended operating conditions (see Note SN54ABT16240A Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise fall rate Outputs enabled SN74ABT16240A UNIT ns/V Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS Vhys IOZH IOZL Ioff ICEX Data inputs Control inputs input Other inputs Outputs high Outputs high Outputs Outputs disabled Outputs enabled Outputs disabled -100 ±100 -180 0.05 -180 ±100 -180 0.05 25°C -1.2 0.55 0.55* 0.55 0.55 SN54ABT16240A -1.2 SN74ABT16240A -1.2 UNIT input Other inputs products compliant MIL-PRF-38535, this parameter does apply. typical values more than output should tested time, duration test should exceed second. This increase supply current each input that specified voltage level rather than GND. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS switching characteristics over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure SN54ABT16240A PARAMETER FROM (INPUT) (OUTPUT) 25°C tPLH tPHL tPZH tPZL tPHZ tPLZ UNIT switching characteristics over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure SN74ABT16240A PARAMETER FROM (INPUT) (OUTPUT) 25°C tPLH tPHL tPZH tPZL tPHZ tPLZ UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS PARAMETER MEASUREMENT INFORMATION Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open From Output Under Test (see Note LOAD CIRCUIT Input VOLTAGE WAVEFORMS PULSE DURATION Timing Input Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES Output Control tPZL Output Waveform (see Note Output Waveform Open (see Note tPZH VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING tPLZ tPHZ Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 27-Oct-2006 PACKAGING INFORMATION Orderable Device 5962-9319901MXA 74ABT16240ADGGRE4 74ABT16240ADGGRG4 74ABT16240ADGVRE4 SN74ABT16240ADGGR SN74ABT16240ADGGRG SN74ABT16240ADGVR SN74ABT16240ADL SN74ABT16240ADLG4 SN74ABT16240ADLR SN74ABT16240ADLRG4 SNJ54ABT16240AWD Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type TSSOP TSSOP TVSOP TSSOP TSSOP TVSOP SSOP SSOP SSOP SSOP Package Drawing Pins Package Plan 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Lead/Ball Finish SNPB NIPDAU NIPDAU NIPDAU NIPDAU Call NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU SNPB Peak Temp Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type 1000 Green (RoHS Sb/Br) 1000 Green (RoHS Sb/Br) marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device. Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material) MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis. Addendum-Page MECHANICAL DATA MCFP010B JANUARY 1995 REVISED NOVEMBER 1997 (R-GDFP-F**) LEADS SHOWN 0.120 (3,05) 0.075 (1,91) CERAMIC DUAL FLATPACK 0.009 (0,23) 0.004 (0,10) 1.130 (28,70) 0.870 (22,10) 0.370 (9,40) 0.250 (6,35) 0.390 (9,91) 0.370 (9,40) 0.025 (0,635) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) LEADS** 0.640 (16,26) 0.610 (15,49) 0.740 (18,80) 0.710 (18,03) 4040176 10/97 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with ceramic using glass frit. Index point provided terminal identification only Falls within 1835: GDFP1-F48 JEDEC -146AA GDFP1-F56 JEDEC -146AB POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C FEBRUARY 1996 REVISED AUGUST 2000 (R-PDSO-G**) PINS SHOWN 0,23 0,13 PLASTIC SMALL-OUTLINE 0,40 0,07 0,16 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,08 PINS 3,70 3,50 3,70 3,50 5,10 4,90 5,10 4,90 7,90 7,70 9,80 9,60 11,40 11,20 4073251/E 08/00 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0,15 side. Falls within JEDEC: 24/48 Pins MO-153 14/16/20/56 Pins MO-194 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MSSO001C JANUARY 1995 REVISED DECEMBER 2001 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0.025 (0,635) 0.0135 (0,343) 0.008 (0,203) 0.005 (0,13) 0.010 (0,25) 0.005 (0,13) 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 0.040 (1,02) 0.020 (0,51) Seating Plane 0.110 (2,79) 0.008 (0,20) 0.004 (0,10) PINS 0.380 (9,65) 0.370 (9,40) 0.630 (16,00) 0.620 (15,75) 0.730 (18,54) 0.720 (18,29) 4040048 12/01 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0.006 (0,15). Falls within JEDEC MO-118 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MTSS003D JANUARY 1995 REVISED JANUARY 1998 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,50 0,27 0,17 0,08 6,20 6,00 8,30 7,90 0,15 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,10 PINS 12,60 14,10 17,10 12,40 13,90 16,90 4040078 12/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold protrusion exceed 0,15. Falls within JEDEC MO-153 POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. 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