FLASH MEMORY MirrorFlash MBM29PL65LM-90/10 DESCRIPTION

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FLASH MEMORY MirrorFlash MBM29PL65LM-90/10 DESCRIPTION

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DS05-20903-1E
FLASH MEMORY
MirrorFlash
MBM29PL65LM-90/10
DESCRIPTION
MBM29PL65LM 67,108,864 capacity +3.0 -only Flash memory enabling word write, both across- chip, comprehensive erase by-the-unit, individual sector erase. CMOS peripheral circuitry contributes significant saving power consumption even high-speed standby mode operation. MBM29PL65LM consists Word mode erases sectors ever word. package type 48-pin TSOP Embedded Program AlgorithmTM, when executed with erase program command sequences, automatically times program pulse widths verifies proper cell margin. MBM29PL65LM, because capability electrical data erase program through write command, enables rewrite data within internal system. truly dependable device vast application possibilities.
PRODUCT LINE
Part VCCQ Address Access Time Access Time Page Read Access Time MBM29PL65LM-90 MBM29PL65LM-10
PACKAGE
48-pin plastic TSOP Marking Side
(FPT-48P-M19)
Notes: Programming byte mode prohibited. Programming address that already contains data prohibited. mandatory erase data prior overprogram same address.
MBM29PL65LM-90/10
FEATURES
MirrorFlash MemoryTM*1 0.23 Process Technology configuration Single read, program erase Standard 48-pin TSOP (Package suffix Minimum 100,000 program/erase cycles High performance Page mode words) Sector erase architecture (Sectors grouped given combination.) word sectors combination sectors concurrently erased. Also supports full chip erase. HiddenROM Region Write Protect Embedded EraseTM*2 Algorithms Embedded ProgramTM*2 Algorithms Data Polling Toggle feature detection program erase cycle completion Automatic sleep mode Erase Suspend/Resume write inhibit Sector Group Protection Extended Sector Group Protection Fast Program Temporary sector group unprotection accordance with (Common Flash Memory Interface)
MirrorFlashis trademark Fujitsu Limited. Embedded Eraseand Embedded Programare trademarks Advanced Micro Devices, Inc.
MBM29PL65LM-90/10
ASSIGNMENT
TSOP(1) RESET (Marking Side) VCCQ DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
FPT-48P-M19
DESCRIPTIONS
Name DQ15 RESET VCCQ Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Hardware Write Protection Hardware Program Acceleration Hardware Reset Pin/Temporary Sector Group Unprotection Device Power Supply Output Power Supply Device Ground Function
MBM29PL65LM-90/10
BLOCK DIAGRAM
DQ15
VCCQ
Erase Voltage Generator
Input/Output Buffers
RESET
State Control
Command Register
Program Voltage Generator
Chip Enable Output Enable Logic
Data Latch
Y-Decoder
Y-Gating
Timer Program/Erase
Address Latch
X-Decoder
Cell Matrix
LOGIC SYMBOL
RESET
MBM29PL65LM-90/10
DEVICE OPERATION
MBM29PL65LM User Operations Table Operation Standby Autoselect Manufacture Code* Autoselect Device Code*1 Read Output Disable Write (Program/Erase) Enable Sector Group Protection*2 Temporary Sector Group Unprotection Reset (Hardware) Sector Write Protection*
DQ15 RESET Hi-Z Code Code DOUT Hi-Z Hi-Z
Legend VIL, VIH, VIH. Characteristics voltage levels. Hi-Z High-Z, 11.5 12.5 Manufacturer device codes also accessed command register write sequence. "MBM29PL65LM Standard Command Definitions". Refer Sector Group Protection. Protects first words sector (SA0). DOUT required command sequence, data pulling, sector protect algorithm WP/ACC VIL, first sector remains protected. WP/ACC VIH, first sector will protected unprotected determined method specified "Sector Group Protection" FUNCTIONAL DESCRIPTION".
MBM29PL65LM-90/10
MBM29PL65LM Standard Command Definitions Table*1 Command Sequence Reset* Reset*
Write Cycles Req'd
First Second Third Write Write Write Cycle Cycle Cycle
Addr Data Addr XXXh 555h 555h 555h 555h 555h Data Addr Data 555h 555h 555h 555h 555h 555h 555h 555h 555h 555h
Fourth Read/Write Cycle
Addr
Fifth Sixth Write Write Cycle Cycle
Addr Data Addr Data
Data
2AAh 2AAh 2AAh 2AAh 2AAh
Autoselect Program Chip Erase Sector Erase Program/Erase Suspend* Program/Erase Resume* Fast Mode* Fast Program* Write Buffer Program Buffer Flash (Confirm) Write Buffer Abort Reset*6 Extended Sector Group Protection*7,*8 Query*9 HiddenROM Entry* HiddenROM Exit*11
00h*13 555h 555h SGA*13 XXXh
04h*13 SD*13
2AAh 555h 2AAh
XXXh XXXh 555h
2AAh
XXXh XXXh 555h 555h XXXh 555h 555h 555h
Reset from Fast Mode*5
XXXh 00h*12 2AAh
2AAh
2AAh 2AAh 2AAh
HiddenROM Program
Address memory location read. Address memory location programmed Addresses latched falling edge write pulse. Address sector erased. combination A21, A20, A19, A18, A17, will uniquely select sector. "Sector Address Table" Sector Group Address protected. "Sector Group Address Table". Specify which constitutes from (A6, Data read from location during read operation. Data programmed location Data latched rising edge write pulse. Write Buffer Location Address HiddenROM area 000000h 00007Fh
command combinations described "MBM29PL65LM Standard Command Definitions" illegal. Both these reset commands equivalent except "Write Buffer Abort" reset. Erase Suspend Erase Resume command valid only during sector erase operation. Fast Mode command required prior Fast Program command. Reset from Fast Mode command required return read mode when device fast mode.
MBM29PL65LM-90/10
Reset read mode. Write Buffer Abort Reset command required after Write Buffer operation aborted. This command valid while RESET VID. Sector Group Address (SGA) with valid address HiddenROM Entry command required prior HiddenROM programming. This command valid during HiddenROM mode. data "F0h" also acceptable. Indicates read cycle. Notes operations defined "User Operations Table".
Autoselect Codes Table Type Manufacturer's Code Device Code Extended Device Code*1 Sector Group Protection*3 Sector Group Address 2201h Code (HEX) 227Eh 2213h
Word mode, read cycle address outputs device code. When 227Eh output, indicates that reading additional codes, called Extended Device Codes, will required. Therefore system continue reading these Extended Device Codes address 0Eh, well 0Fh. Outputs protected sector group addresses outputs unprotected sector group addresses. Given Fix, wait cycle after rising edge (the last write command), then indicate (A6,
MBM29PL65LM-90/10
Sector Address Table
Sector SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 Sector Size (Kwords) Address Range 000000h 007FFFh 008000h 00FFFFh 010000h 017FFFh 018000h 01FFFFh 020000h 027FFFh 028000h 02FFFFh 030000h 037FFFh 038000h 03FFFFh 040000h 047FFFh 048000h 04FFFFh 050000h 057FFFh 058000h 05FFFFh 060000h 067FFFh 068000h 06FFFFh 070000h 077FFFh 078000h 07FFFFh 080000h 087FFFh 088000h 08FFFFh 090000h 097FFFh 098000h 09FFFFh 0A0000h 0A7FFFh 0A8000h 0AFFFFh 0B0000h 0B7FFFh 0B8000h 0BFFFFh 0C0000h 0C7FFFh 0C8000h 0CFFFFh 0D0000h 0D7FFFh 0D8000h 0DFFFFh 0E0000h 0E7FFFh 0E8000h 0EFFFFh 0F0000h 0F7FFFh
(Continued)
MBM29PL65LM-90/10
Sector SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62
Sector Size (Kwords)
Address Range 0F8000h 0FFFFFh 100000h 107FFFh 108000h 10FFFFh 110000h 117FFFh 118000h 11FFFFh 120000h 127FFFh 128000h 12FFFFh 130000h 137FFFh 138000h 13FFFFh 140000h 147FFFh 148000h 14FFFFh 150000h 157FFFh 158000h 15FFFFh 160000h 167FFFh 168000h 16FFFFh 170000h 177FFFh 178000h 17FFFFh 180000h 187FFFh 188000h 18FFFFh 190000h 197FFFh 198000h 19FFFFh 1A0000h 1A7FFFh 1A8000h 1AFFFFh 1B0000h 1B7FFFh 1B8000h 1BFFFFh 1C0000h 1C7FFFh 1C8000h 1CFFFFh 1D0000h 1D7FFFh 1D8000h 1DFFFFh 1E0000h 1E7FFFh 1E8000h 1EFFFFh 1F0000h 1F7FFFh
(Continued)
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Sector SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94
Sector Size (Kwords)
Address Range 1F8000h 1FFFFFh 200000h 207FFFh 208000h 20FFFFh 210000h 217FFFh 218000h 21FFFFh 220000h 227FFFh 228000h 22FFFFh 230000h 237FFFh 238000h 23FFFFh 240000h 247FFFh 248000h 24FFFFh 250000h 257FFFh 258000h 25FFFFh 260000h 267FFFh 268000h 26FFFFh 270000h 277FFFh 278000h 27FFFFh 280000h 287FFFh 288000h 28FFFFh 290000h 297FFFh 298000h 29FFFFh 2A0000h 2A7FFFh 2A8000h 2AFFFFh 2B0000h 2B7FFFh 2B8000h 2BFFFFh 2C0000h 2C7FFFh 2C8000h 2CFFFFh 2D0000h 2D7FFFh 2D8000h 2DFFFFh 2E0000h 2EE7FFh 2E8000h 2EFFFFh 2F0000h 2F7FFFh
(Continued)
MBM29PL65LM-90/10
(Continued)
Sector SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 Sector Size (Kwords) Address Range 2F8000h 2FFFFFh 300000h 307FFFh 308000h 30FFFFh 310000h 317FFFh 318000h 31FFFFh 320000h 327FFFh 328000h 32FFFFh 330000h 337FFFh 338000h 33FFFFh 340000h 347FFFh 348000h 34FFFFh 350000h 357FFFh 358000h 35FFFFh 360000h 367FFFh 368000h 36FFFFh 370000h 377FFFh 378000h 37FFFFh 380000h 387FFFh 388000h 38FFFFh 390000h 397FFFh 398000h 39FFFFh 3A0000h 3A7FFFh 3A8000h 3AFFFFh 3B0000h 3B7FFFh 3B8000h 3BFFFFh 3C0000h 3C7FFFh 3C8000h 3CFFFFh 3D0000h 3D7FFFh 3D8000h 3DFFFFh 3E0000h 3E7FFFh 3E8000h 3EFFFFh 3F0000h 3F7FFFh 3F8000h 3FFFFFh
MBM29PL65LM-90/10
Sector Group Address Table Sector Group Address SGA0 SGA1 SGA2 SGA3 SGA4 SGA5 SGA6 SGA7 SGA8 SGA9 SGA10 SGA11 SGA12 SGA13 SGA14 SGA15 SGA16 SGA17 SGA18 SGA19 SGA20 SGA21 SGA22 SGA23 SGA24 SGA25 SGA26 SGA27 SGA28 SGA29 SGA30 SGA31 Sector Group Size (Kwords) Sectors SA11 SA12 SA15 SA16 SA19 SA20 SA23 SA24 SA27 SA28 SA31 SA32 SA35 SA36 SA39 SA40 SA43 SA44 SA47 SA48 SA51 SA52 SA55 SA56 SA59 SA60 SA63 SA64 SA67 SA68 SA71 SA72 SA75 SA76 SA79 SA80 SA83 SA84 SA87 SA88 SA91 SA92 SA95 SA96 SA99 SA100 SA103 SA104 SA107 SA108 SA111 SA112 SA115 SA116 SA119 SA120 SA123 SA124 SA127
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Common Flash Memory Interface Code Table DQ15 Description 0051h 0052h Query-unique ASCII string "QRY" 0059h 0002h Primary Command 0000h AMD/FJ standard 0040h Address Primary Extended Table 0000h 0000h Alternate Command 0000h (00h applicable) 0000h Address Alternate Extended Table 0000h (write/erase) 0027h DQ4: 1V/bit, DQ0: mV/bit (write/erase) 0036h DQ4: 1V/bit, DQ0: mV/bit 0000h voltage (00h pin) 0000h voltage (00h pin) 0007h Typical timeout single write 0007h Typical timeout size buffer write 000Ah Typical timeout individual sector erase 0000h Typical timeout full chip erase 0001h timeout write times typical 0005h timeout buffer write times typical 0004h timeout individual sector erase times typical 0000h timeout full chip erase times typical 0017h Device Size byte 0001h Flash Device Interface description 0000h 0005h number byte multi-byte write 0000h 0001h Number Erase Block Regions within device (02h Boot) 007Fh Erase Block Region Information 0000h number sectors 0000h size 0001h Byte) 0000h Erase Block Region Information 0000h number sectors 0000h size 0000h Byte)
(Continued)
MBM29PL65LM-90/10
(Continued)
DQ15 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0050h 0052h 0049h 0031h 0033h 0008h 0002h 0004h
Description Erase Block Region Information number sectors size Byte) Erase Block Region Information number sectors size Byte) Query-unique ASCII string "PRI" Major version number, ASCII Minor version number, ASCII Address Sensitive Unlock Supported Supported Erase Suspend (02h Read Write) Sector Group Protection Supported Number sectors group Sector Temporary Unprotection Supported Supported Sector Group Protection Algorithm Dual Operation (00h Supported) Burst Mode Type (00h Supported) Page Mode Type (01h 4-Word Page Supported) VACC (Acceleration) Supply Minimum Supported DQ4: 1V/bit, DQ0: 100mV/bit VACC (Acceleration) Supply Maximum Supported DQ4: 1V/bit, DQ0: 100mV/bit Write Protect Uniform Sectors Bottom Write Protect Program Suspend Supported Supported
0001h 0004h 0000h 0000h 0001h
00B5h
00C5h
0004h
MBM29PL65LM-90/10
FUNCTIONAL DESCRIPTION
Standby Mode There ways implement standby mode device, using both RESET pins, other RESET only. When using both pins, CMOS standby mode achieved with RESET input held Under this condition current consumed less than Max. During Embedded Algorithm operation, active current (ICC2) required even when "H". device read with standard access time (tCE) from either these standby modes. When using RESET only, CMOS standby mode achieved with RESET input held "L") Under this condition current consumed less than Max. Once RESET high, device requires wake-up time output valid read access. During standby mode, output high impedance state regardless input. Automatic Sleep Mode Automatic sleep mode works resin power consumption during read-out device data. This useful application such handy terminal which requires power consumption. activate this mode, device automatically switches itself power mode when address remain stable during access time tACC necessary control this mode. current consumed typically (CMOS Level) During simultaneous operation, active current (ICC2) required. Since, data latched during this mode, data continuously read out. When addresses changed, mode automatically canceled device reads data changed address. Autoselect Autoselect mode allows reading binary code identifies manufacturer type. intended programming equipment purpose automatically matching device programmed with corresponding programming algorithm. This mode functional over entire temperature range device. activate this mode, programming equipment must force address Three identifier bytes then sequenced from device outputs toggling addresses. addresses DON'T CARES except manufacturer device codes also read command register, instances when device erased programmed system without access high voltage pin. command sequence illustrated "Common Definitions Table" DEVICE OPERATIONS". read cycle from address returns manufacturer's code (Fujitsu 04h) read cycle from address outputs device code. word mode, 227Eh output, indicates that additional codes, called Extended Device Codes required. Therefore system continue reading these Extended Device Codes addresses 0Fh. Refer "Autoselect Codes Table" DEVICE OPERATIONS". Read Mode device control functions required obtain data outputs. power control used device selection. output control used gate data output pins device selected. Address access time (tACC) equal delay from stable addresses valid output data. chip enable access time (tCE) delay from stable addresses stable valid data output pins. output enable access time delay from falling edge valid data output pins. Assuming addresses have been stable least tACC time. When reading data without changing addresses after power-up, input hardware reset change from "L".
MBM29PL65LM-90/10
Page Mode Read device capable fast Page mode read compatible with Page mode Mask read operation. This mode provides faster read access speed random locations within page. Page size words, within appropriate Page being selected higher address bits address bits Word mode Byte mode). initial page access equal random access (tACC) subsequent Page read access long locations specified microprocessor fall within that Page) equivalent page access time (tPACC). Output Disable With input logic high level (VIH), output from device disabled. This causes output pins high impedance state. Write Device erase programming accomplished command register. contents register serve input internal state machine. state machine output dictates device function. command register itself does occupy addressable memory location. register latch used store commands, along with address data information needed execute command. command register written bringing VIL, while VIH. Addresses latched falling edge whichever starts later, while data latched rising edge whichever starts first. Standard microprocessor write timings used. Refer Write Characteristics Erase/Programming Waveforms specific timing parameters. Sector Group Protection device features hardware sector group protection. This feature will disable both program erase operations combination sector groups memory. "Sector Group Address Table (MBM29PL65LM)" DEVICE OPERATION". user's side sector group protection using programming equipment. device shipped with sector groups that unprotected. activate programming equipment must force address control VIL, VIH. sector group addresses (A21, A20, A19, A18, A17) should sector protected. "Sector Address Table (MBM29PL65LM)" DEVICE OPERATION" defines sector address each seventy-one (71) individual sectors, "Sector Group Address Table (MBM29PL65LM)" DEVICE OPERATION" defines sector group address each twentyfour (24) individual group sectors. Programming protection circuitry begins falling edge pulse terminated with rising edge same. Sector group addresses must held constant during pulse. "Sector Group Protection Timing Diagram" TIMING DIAGRAM" "Sector Group Protection Algorithm" FLOW CHART" sector group protection timing diagram algorithm. verify programming protection circuitry, programming equipment must force address with VIH. Scanning sector group addresses (A21, A20, A19, A17) while (A6, will produce logical code device output protected sector. Otherwise device will produce unprotected sectors. this mode, lower order addresses, except either High Low. Where high order addresses (A21, A20, A19, A17) desired sector group address will produce logical protected sector group. "Sector Group Protection Verify Autoselect Codes" DEVICE OPERATION" Autoselect codes. Temporary Sector Group Unprotection This feature allows temporary unprotection previously protected sector groups devices order change data. Sector Group Unprotection mode activated setting RESET high voltage (VID). During this mode, formerly protected sector groups programmed erased selecting sector group addresses. Once taken away from RESET pin, previously protected sector groups will
MBM29PL65LM-90/10
protected again. Refer "Temporary Sector Group Unprotection Timing Diagram" SWITCHING WAVEFORMS "Temporary Sector Group Unprotection Algorithm" FLOW CHART. Hardware Reset device reset driving RESET VIL. RESET pulse requirement kept (VIL) least "tRP" order properly reset internal state machine. operation process being executed terminated internal state machine reset read mode "tREADY" after RESET driven low. Furthermore once RESET goes high device requires additional "tRH" before allows read access. When RESET low, device standby mode duration pulse data output pins tri-stated. hardware reset occurs during program erase operation, data that particular location corrupted. Write Protect (WP) Aside from Sector Group Protection, MBM29PL65LM provides another function that protects first sector (SA0) during programming erase. When VIL, this first sector (SA0) becomes protected while Sector Group Protection other sectors temporarily lifted. Accelerated Program Operation device offers accelerated program operation which enables programming high speed. system asserts VACC pin, device automatically enters acceleration mode time required program operation will reduce about 85%. This function primarily intended allow high speed program, caution needed sector group becomes temporarily unprotected. system uses fast program command sequence when programming during acceleration mode. command fast mode reset command from fast mode necessary. When device enters acceleration mode, device automatically fast mode. Therefore present sequence used programming detection completion during acceleration mode. Removing VACC from applying returns device normal operation. remove VACC from while programming. "Accelerated Program Timing Diagram". VCCQ output voltage generated device determined based VCCQ level. This feature allows device operate mixed-voltage environments, driving receiving signals from other devices same bus.
MBM29PL65LM-90/10
COMMAND DEFINITIONS
Device operations selected writing specific address data sequences into command register. "MBM29PL65LM Command Definitions Table" DEVICE OPERATION shows valid register command sequences. Note that Erase Suspend (B0h) Erase Resume (30h) commands valid only while Sector Erase operation progress. Also Program Suspend (B0h) Program Resume (30h) commands valid only while Program operation progress. Moreover, Read/Reset commands functionally equivalent, resetting device read mode. Please note that commands always written DQ15 bits ignored. Reset Command order return from Autoselect mode Exceeded Timing Limits (DQ5 Reset mode, verify mode secter protect commands, Read/Reset operation initiated writing Read/Reset command sequence into command register. Microprocessor read cycles retrieve array data from memory. device remains enabled reads until command register contents altered. device automatically powers-up Read/Reset state. this case, command sequence required read data. Standard microprocessor read cycles retrieve array data. This default value ensures that spurious alteration memory content occurs during power transition. Refer Read Characteristics Waveforms specific timing parameters. Autoselect Command Flash memories intended applications where local alters memory contents. Therefore manufacture device codes must accessible while device resides target system. PROM programmers typically access signature codes raising higher voltage. However multiplexing high voltage onto address lines generally desired system design practice. device contains Autoselect command operation supplement traditional PROM programming methodology. operation initiated writing Autoselect command sequence into command register. This followed third write cycle that contains address Autoselect command. Then manufacture device codes read from address, actual data memory cell read from another address. Following command write, read cycle from address returns manufacturer's code (Fujitsu=04h). And, double word mode, read cycle address outputs device code. word mode, 227Eh output, this indicates that additional codes, called Extended Device Codes will required. Therefore system continue reading these Extended Device Codes address 0Eh, well (BA) word mode, 1Eh). Refer "MBM29PL65LX Autoselect Codes Table" DEVICE OPERATION. terminate operation, necessary write Reset command sequence into register. execute Autoselect command during operation, Reset command sequence must written before Autoselect command. Program Command device programmed word-by-word basis double word-by-double word). Programming four cycle operation. There "unlock" write cycles. These followed program set-up command data write cycles. Addresses latched falling edge whichever happens later, data latched rising edge whichever happens first. rising edge (whichever happens first) starts programming. Upon executing Embedded Program Algorithm command sequence, system required provide further controls timings. device automatically provides adequate internally generated program pulses verify programmed cell margin. system determine status program operation using (Data Polling), (Toggle Bit) RY/BY. Data Polling Toggle automatically performed memory location being programmed.
MBM29PL65LM-90/10
programming operation completed when data equivalent data written this which devices return read mode plogram addresses longer latched. Therefore, devices require that valid address devices supplied system this particular instance. Hence Data Polling requires same address which being programmed. hardware reset occurs during programming operation, data being written guaranteed. Programming allowed sequence across sector boundaries. Beware that data cannot programmed back "1". Attempting either hang device result apparent success according data polling algorithm read from Reset mode will show that data still "0". Only erase operations convert from "0"s "1"s.Refer "Embedded ProgramAlgorithm" using typical command strings operations. Program Suspend/Resume Command Program Suspend command allows system interrupt program operation that data read from address. Writing Program Suspend command (B0h) during Embedded Program operation immediately suspends programming. bank addresses sector being programmed should when writing Program Suspend command. When Program Suspend command written during programming process, device halts program operation within updates status bits. After program operation been suspended, system read data from address. data program-suspended address valid. Normal read timing command definitions apply. After Program Resume command (30h) written, device reverts programming. bank addresses sectors being suspended should when writing Program Resume command. system determine program operation status using status bits, just standard program operation. "Write Operation Status" more information. When issuing program suspend command after issuing program command, determine status program operation reading status more after issuing program resume command. system also write Autoselect command sequence Program Suspend mode. device allows reading Autoselect codes addresses within programming sectors, since codes stored memory. When device exits from Autoselect mode, device reverts Program Suspend mode, ready another valid operation. "Autoselect Command Sequence" more information. system must write Program Resume command exit from Program Suspend mode continue programming operation. Further writes Resume command ignored. Another Program Suspend command written after device resumes programming. read code after HiddenROM Entry Exit program suspend mode. Write Buffer Programming Operations Write Buffer Programming allows system write series words programming operation. This results faster effective word programming time than standard programming algorithms. Write Buffer Programming command sequence initiated first writing unlock cycles. This followed third write cycle selecting Sector Address which programming will occur. forth cycle contains both Sector Address unique code data width will loaded into page buffer Sector Address which programming will occur. system then writes starting address/data combination. This "starting address" must same Sector Address used third fourth cycles lower addresses should subsequent address must incremented Addresses latched falling edge whichever happens later data latched rising edge whichever happens first. rising edge (whichever happens first) starts programming. Upon executing Write Buffer Programming Operations com-
MBM29PL65LM-90/10
mand sequence, system required provide further controls timings. device will automatically provide adequate internally generated program pulses verify programmed cell margin. DQ7(Data Polling), DQ6(Toggle Bit), DQ5(Exceeded Timing Limits), DQ1(Write-to-Buffer Abort) should monitored determine device status during Write Buffer Programming. addition these functions, also possible indicate host system that Write Buffer Programming Operations either progress have been completed RY/BY. "Hardware Sequence Flags".The Data polling techniques described "Data Polling Algorithm" FLOW CHART should used while monitoring last address location loaded into write buffer. addition, neccessary specify address Toggle techniques described "Toggle Algorithm" FLOW CHART. automatic programing operation completed when data equivalent data written this which time device returns read mode addresses longer latched "Hardware Sequence Flags"). write-buffer programming operation suspended using standard program suspend/resume commands. Once write buffer programming set, system must then write "Program Buffer Flash" command Sector Address. other address/data combination will abort Write Buffer Programming operation device will continue busy state. Write Buffer Programming Sequence ABORTED doing following Different Sector Address asserted. Write data other than "Program Buffer Flash" command after specified number "data load" cycles. "Write-to-Buffer-Abort Reset" command sequence must written device return read mode. (See "MBM29PL65LM Standard Command Definitions" DEVICE OPERATION details this command sequence.) Chip Erase Command Chip erase six-bus cycle operation. There "unlock" write cycles. These followed writing "set-up" command. more "unlock" write cycles then followed chip erase command. Chip erase does require user program prior erase. Upon executing Embedded Erase Algorithm command sequence device automatically programs verifies entire memory zero data pattern prior electrical erase. (Preprogram Function) system required provide controls timings during these operations. system determine erase operation status using (Data Polling), (Toggle Bit). chip erase begins rising edge last whichever happens first command sequence terminates when data which device returns read mode. Chip Erase Time: Sector Erase Time sectors Chip Program Time (Preprogramming) Refer "Embedded EraseAlgorithm" typical command strings operations. Sector Erase Command Sector erase cycle operation. There "unlock" write cycles. These followed writing "set-up" command. more "unlock" write cycles then followed Sector Erase command. sector address (any address location within desired sector) latched falling edge whichever starts later, while command (Data 30h) latched rising edge whichever states first. After time-out "tTOW" from rising edge last sector erase command, sector erase operation will begin. Multiple sectors erased concurrently writing cycle operations "MBM29XL12DF Command Definitions Table" DEVICE OPERATION. This sequence followed with writes Sector Erase command addresses other sectors desired concurrently erased. time between writes must less than "tTOW" otherwise that command accepted erasure does start. recommended that processor interrupts disabled during this time guarantee this condition. interrupts re-enabled after last Sector Erase command written. time-out "tTOW" from rising edge last whichever starts first initiates execution Sector Erase command(s). another falling edge whichever
MBM29PL65LM-90/10
starts first occurs within "tTOW" time-out window timer reset. (Monitor determine sector erase timer window still open, section DQ3, "Sector Erase Timer".) command other than Sector Erase Erase Suspend during this time-out period will reset device read mode, ignoring previous command string. Resetting device once execution begun corrupt data sector. that case restart erase those sectors allow them complete. Refer "Write Operation Status" section Sector Erase Timer operation. Loading sector erase buffer done sequence with number sectors. Sector erase does require user program prior erase. device automatically programs memory locations sector(s) erased prior electrical erase (Preprogram function). When erasing sector sectors remaining unselected sectors affected. system required provide controls timings during these operations. system determine status erase operation using (Data Polling), (Toggle Bit). sector erase begins after "tTOW" time from rising edge whichever starts first last sector erase command pulse terminates when data which time device returns read mode. "Write Operation Status" section. Data polling Toggle must performed address within sectors being erased. Multiple Sector Erase Time; [Sector Erase Time Sector Program Time (Preprogramming)] Number Sector Erase. Erase Suspend/Resume Command Erase Suspend command allows user interrupt Sector Erase operation then perform read sector being erased. This command applicable ONLY during Sector Erase operation within timeout period Sectore erase. Writting Erase Suspend command (B0h) during Sector Erase time-out results immediate termination time-out period suspension erase operation. Writing Erase Resume command (30h) resumes erase operation. When "Erase Suspend" command written during Sector Erase operation, device takes maximum "tSPD" suspend erase operation. When devices have entered erase-suspended mode, output will High-Z will logic will stop toggling. user must address erasing sector reading determine erase operation been suspended. Further writes Erase Suspend command ignored. When erase operation suspended, device defaults erase-suspend-read mode. Reading data this mode same reading from standard read mode except that data must read from sectors that have been erase-suspended. Successively reading from erase-suspended sector while device erase-suspend-read mode causes toggle. section DQ2. resume operation Sector Erase, Resume command (30h) should written. further writes Resume command this point ignored. Another Erase Suspend command written after chip resumes erasing. issuing program command after entering erase-suspend-read mode. Fast Mode Set/Reset Command Fast Mode function dispenses with initial unlock cycles required standard program command sequence writing Fast Mode command into command register. this mode required cycle programming cycles instead four cycles standard program command. read operation also executed after exiting this mode. During Fast mode, write commands other than Fast program/ Fast mode reset command. exit this mode, write Fast Mode Reset command into command register. Refer "Embedded Program Algorithm Fast Mode". active current required even during Fast Mode.
MBM29PL65LM-90/10
Fast Programming During Fast Mode, programming executed with cycles operation. Embedded Program Algorithm executed writing program set-up command (A0h) data write cycles (PA/PD). Refer "Embedded Program Algorithm Fast Mode". Extended Sector Group Protection addition normal sector group protection, device Extended Sector Group Protection extended function. This function enables protection sector group forcing RESET writes command sequence. Unlike conventional procedures, necessary force control timing control pins. only RESET requires sector group protection this mode. extended sector group protection requires RESET pin. With this condition, operation initiated writing set-up command (60h) into command register. Then sector group addresses pins (A21, A20, A19, A18, A17) (A6, should sector group protected (set other addresses pins recommended), write extended sector group protection command (60h). sector group typically protected verify programming protection circuitry, sector group addresses pins (A20, A19, A18, A17, A16, A15, A14, A12) (A6, should write command (40h). Following command write, logical device output will produce protected sector read operation. output data logical "0", write extended sector group protection command (60h) again. terminate operation, RESET VIH. (Refer "Extended Sector Group Protection Timing Diagram" SWITCHING WAVEFORMS "Extended Sector Group Protection Algorithm" FLOW CHART.) Query Command (CFI Common Flash Memory Interface) verify programming protection circuitry, sector group addresses pins (A20, A19, A18, A17, A16, A15, A14, A12) (A6, should write command (40h). Following command write, logical device output will produce protected sector read operation. output data logical "0", write extended sector group protection command (60h) again. terminate operation, RESET VIH. (Refer "Extended Sector Group Protection Timing Diagram" SWITCHING WAVEFORMS "Extended Sector Group Protection Algorithm" FLOW CHART.) operation initiated writing query command (98h) into command register. Following command write, read cycle from specific address retrives device information. Refer "Common Flash Memory Interface Code" DEVICE OPERATION detail. Please note that output data upper byte (DQ15 DQ8) word mode bit) read. terminate operation, write Read/Reset command sequence into register. HiddenROM Mode HiddenROM Region HiddenROM (HiddenROM) feature provides Flash memory region that system access through command sequence. This primarily intended customers wish Electronic Serial Number (ESN) device with protected against modification. Once HiddenROM region protected, further modification that region impossible. This ensures security once product shipped field. This device occupies address 000000h 00007Fh. After system writes HiddenROM Entry command sequence, read HiddenROM region using device addresses (A20 "0"). That device sends only program command that would normally sent address HiddenROM region. This mode operation continues until system issues Exit HiddenROM command sequence, until power removed from device. power-up, following hardware reset, device reverts sending commands address. request Fujitsu program device, please contact Fujitsu representative more information.
MBM29PL65LM-90/10
HiddenROM Entry Command device HiddenROM area with Time Protect function. This area enter security code unable change code once set. Program/erase possible this area until protected. However once protected, impossible unprotect. Therefore extreme caution required. HiddenROM area words. This area normally "outermost" words boot block area. Therefore, write HiddenROM entry command sequence enter HiddenROM area. called HiddenROM mode when HiddenROM area appears. Sectors other than block area read during HiddenROM mode. Read/program HiddenROM area possible during HiddenROM mode. Write HiddenROM reset command sequence exit HiddenROM mode. Note that other commands should issued than HiddenROM program/protection/reset commands during HiddenROM mode. When issue other commands including suspend resume capability, send HiddenROM reset command first exit HiddenROM mode then issue each command. HiddenROM Program Command program data HiddenROM area, write HiddenROM program command sequence during HiddenROM mode. This command same program command usual except write command during HiddenROM mode. Therefore detection completion method same using data polling, toggle bit. Need attention address programmed. address other than HiddenROM area selected program, data address changed.During write into HiddenROM region, program suspend command issuance prohibited. HiddenROM Protect Command method protect HiddenROM apply high voltage (VID) sector address HiddenROM area (A6, apply write pulse during HiddenROM mode. same command sequence used because same extension sector group protect past, except that HiddenROM mode does apply high voltage RESET pin. Please refer above mentioned "Extended Sector Group Protection" details sector group protect setting. same command sequence used because same extension sector group protect past, except that HiddenROM mode does apply high voltage RESET pin. Please refer above mentioned "Extended Sector Group Protection" details sector group protect setting. Other sector will effected address other than those HiddenROM area selected sector address, please carefull. Once protected, protection cancelled, please closest attention. Write Operation Status Hardware Sequence Flags Detailed "Hardware Sequence Flags" status flags which determine status bank current mode operation. During sector erase, part provides status flags automatically ports. information address-sensitive. This means that address from erasing sector consecutively read, will toggle. However, will toggle address from non-erasing sector consecutively read. This allows users determine which sectors erase which not.
MBM29PL65LM-90/10
Hardware Sequence Flags Table Data Data Data Toggle Toggle Data Data Data Toggle Toggle Toggle Toggle Toggle Toggle Toggle
Status Embedded Erase Algorithm Program Suspend Mode
Data Data Data
Data Data Data
Toggle Data Data Toggle Data
Data Data Data
Embedded Program Algorithm Program-Suspend-Read (Program Suspend Sector) Program-Supend -Read (Non-Program Suspended Sector) Erase Suspend Read (Erase Suspended Sector) Erase Suspend Read (Non-Erase Suspended Sector) Erase Suspend Program (Non-Erase Suspended Sector)
Progress
Erase Suspend Mode
Embedded Program Algorithm Exceeded Embedded Erase Algorithm Time Erase Erase Suspend Program Limits Suspend (Non-Erase Suspended Sector) Mode Write Buffer BUSY State Exceeded Timing Limits ABORT State
Successive reads from erasing erase-suspend sector will cause toggle. Reading from non-erase suspend sector address will indicate logic bit. indicates Write-to-Buffer ABORT status during Write-Buffer-Programming operations. Data Polling algorithm detailed "Data Polling Algorithm" FLOW CHART" should used WriteBuffer-Programming operations. Note that during Write-Buffer-Programming indicates data-bar data LAST LOADED WRITE-BUFFER ADDRESS location. Data Polling device features Data Polling method indicate host that Embedded Algorithms progress completed. During Embedded Program Algorithm, attempt read device will produce complement data last written DQ7. Upon completion Embedded Program Algorithm, attempt read device will produce true data last written DQ7. During Embedded Erase Algorithm, attempt read device will produce output. Upon completion Embedded Erase Algorithm, attempt read device will produce DQ7. flowchart Data Polling (DQ7) shown "Data Polling Algorithm". programming, Data Polling valid after rising edge fourth write pulse four write pulse sequences. programming, Data Polling valid after rising edge fourth write pulse four write pulse sequences. chip erase sector erase, Data Polling valid after rising edge sixth write pulse write pulse sequences. Data Polling must performed sector addresses sectors being erased, protected sectors. Otherwise status become invalid. program address falls within protected sector, Data Polling active approximately then that bank returns read mode. After erase command sequence written, sectors selected erasing protected, Data Polling active approximately then bank returns read mode.
MBM29PL65LM-90/10
Once Embedded Algorithm operation close being completed, device data pins (DQ7) change asynchronously while output enable (OE) asserted low. This means that device driving status information instant, then that byte's valid data next instant. Depending when system samples output, read status valid data. Even device completed Embedded Algorithm operation valid data, data outputs still invalid. valid data will read successive read attempts. Data Polling feature active only during Embedded Programming Algorithm, Embedded Erase Algorithm sector erase time-out. "Toggle Status" "Data Polling during Embedded Algorithm Operation Timing Diagram". Toggle device also features "Toggle method indicate host system that Embedded Algorithms progress completed. During Embedded Program Erase Algorithm cycle, successive attempts read toggling) data from busy bank will result toggling between zero. Once Embedded Program Erase Algorithm cycle completed, will stop toggling valid data will read next successive attempts. During programming, Toggle valid after rising edge fourth write pulse four write pulse sequences. chip erase sector erase, Toggle valid after rising edge sixth write pulse write pulse sequences. Toggle active during sector time out. programming, sector being written protected, toggle will toggle about then stop toggling with data unchanged. erase, device will erase selected sectors except protected ones. selected sectors protected, chip will toggle toggle about then drop back into read mode, having data kept remained. Either toggling will cause toggle. addition, Erase Suspend/Resume command will cause toggle. system determine whether sector actively erased erase-suspended. When bank actively erased (that Embedded Erase Algorithm progress) toggles. When bank enters Erase Suspend mode, stops toggling. Successive read cycles during erase-suspend-program cause toggle. Wavefrom Toggle during Embedded Algorithm Operations". Exceeded Timing Limits will indicate program erase time exceeded specified limits (internal pulse count) Under these conditions will produce "1". This failure condition indicating that program erase cycle successfully completed. Data Polling only operating function device under this condition. circuit will partially power down device under these conditions approximately pins will control output disable functions described "MBM29PL65LM User Operations Table (DW/W VIL)" "MBM29XL12DF User Operations Table (DW/W VIH)" DEVICE OPERATION. failure condition also appear user tries program non-blank location without pre-erase. this case device locks never completes Embedded Algorithm operation. Hence, system never reads valid data never stop toggling. Once device exceeded timing limits, will indicate "1." Please note that this device failure condition since device incorrectly used. this occurs, reset device with command sequence. Sector Erase Timer After completion initial sector erase command sequence, sector erase time-out begins. will remain until time-out completed. Data Polling Toggle valid after initial sector erase command sequence.
MBM29PL65LM-90/10
Data Polling Toggle indicates that valid erase command been written, used determine whether sector erase timer window still open. high ("1") internally controlled erase cycle begun. ("0") device will accept additional sector erase commands. insure command been accepted, system software should check status prior following each subsequent Sector Erase command. were high second status check, command have been accepted. "Hardware Sequence Flags". Toggle This toggle along with DQ6, used determine whether device Embedded Erase Algorithm Erase Suspend. Successive reads from erasing sector will cause toggle during Embedded Erase Algorithm. device erase-suspended-read mode, successive reads from erase-suspended sector will cause toggle. When device erase-suspended-program mode, successive reads from non-erase suspended sector will indicate logic bit. different from that toggles only when standard program Erase, Erase Suspend Program operation progress. behavior these status bits, along with that DQ7, summarized follows example, used together determine erase-suspend-read mode progress. (DQ2 toggles while does not.) also "Toggle Status" "DQ2 DQ6". Furthermore also used determine which sector being erased. erase mode, toggles this read from erasing sector. Reading Toggle Bits DQ6/DQ2 Whenever system initially begins reading toggle status, must read least twice determine whether toggle toggling. Typically system would note store value toggle after first read. After second read, system would compare value toggle with first. toggle toggling, device completed program erase operation. system read array data following read cycle. However, after initial read cycles, system determines that toggle still toggling, system also should note whether value high (see section DQ5) system should then determine again whether toggle toggling, since toggle have stopped toggling just went high. toggle longer toggling, device successfully completed program erase operation. still toggling, device complete operation successfully, system must write reset command return reading array data. remaining scenario that system initially determines that toggle toggling gone high. system continue monitor toggle through successive read cycles, determining status described previous paragraph. Alternatively, choose perform other system tasks. this case, system must start beginning algorithm when returns determine status operation. Refer "Toggle Algorithm".
MBM29PL65LM-90/10
Toggle Status Table
Mode Program Erase Erase-Suspend-Read (Erase-Suspended Sector) Erase-Suspend-Program
Toggle Toggle Toggle
Toggle Toggle
Successive reads from erasing erase-suspend sector will cause toggle. Reading from non-erase suspend sector address will indicate logic bit. Write-to-Buffer Abort indicates whether Write-to-Buffer operation aborted. Under these conditions produces "1". system must issue Write-to-Buffer-Abort-Reset command sequence return device reading array data. "Write Buffer Programming Operations" section more details. Data Protection device designed offer protection against accidental erasure programming caused spurious system level signals that exist during power transitions. During power device automatically resets internal state machine Read mode. Also, with control register architecture, alteration memory contents only occurs after successful completion specific multi-bus cycle command sequence. Device also incorporates several features prevent inadvertent write cycles resulting from power-up power-down transitions system noise. Write Inhibit avoid initiation write cycle during power-up power-down, write cycle locked less than VLKO. VLKO, command register disabled internal program/erase circuits disabled. Under this condition, device will reset read mode. Subsequent writes will ignored until level greater than VLKO. user's responsibility ensure that control pins logically correct prevent unintentional writes when above VLKO. Embedded Erase Algorithm interrupted, intervened erasing sector(s) is(are) valid. Write Pulse "Glitch" Protection Noise pulses less than (typical) will initiate write cycle. Logical Inhibit Writing inhibited holding VIL, VIH, VIH. initiate write cycle, must logical zero while logical one. Power-up Write Inhibit Power-up device with will accept commands rising edge internal state machine automatically reset read mode power-up. Sector Protection Device user able protect each sector group individually store protect data. Protection circuit voids both write erase commands that addressed protected sectors. commands write erase addressed protected sector ignored.
MBM29PL65LM-90/10
ABSOLUTE MAXIMUM RATINGS
Parameter Storage Temperature Ambient Temperature with Power Applied Voltage with Respect Ground Pins Except RESET *1,*2 Power Supply Voltage RESET WP/ACC *1,*3 Voltage defined basis Minimum voltage input pins -0.5 During voltage transitions, input pins undershoot -0.2 periods Maximum voltage input pins +0.5 During voltage transitions, input pins overshoot +2.0 periods Minimum input voltage -0.5V. During voltage transitions, these pins undershoot -0.2 periods ns.Voltage difference between input supply voltage VIN-VCC) dose exceed +9.0 V.Maximum input voltage +12.5 which overshoot +14.0 periods WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
Symbol Tstg VIN, VOUT VCC,VCCQ VACC
Rating -0.5 -0.5 -0.5 -0.5 +125 +0.5 +4.0 +12.5 +12.5
Unit
RECOMMENDED OPERATING RANGES*1
Parameter Ambient Temperature Supply Voltage VCCQ Supply Voltage
Symbol VCCQ
Value +3.0 +3.6
Unit
Operating ranges define those limits between which functionality device guaranteed. Voltage defined basis VCCQ supply voltage must same level. WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representatives beforehand.
MBM29PL65LM-90/10
MAXIMUM OVERSHOOT/MAXIMUM UNDERSHOOT
Maximum Undershoot Waveform
+0.6 -0.5 -2.0
Maximum Overshoot Waveform
+2.0 +0.5
Maximum Overshoot Waveform
+14.0 +12.5 +0.5
Note This waveform applied RESET.
MBM29PL65LM-90/10
ELECTRICAL CHARACTERISTICS
Characteristics
Parameter Input Leakage Current Output Leakage Current RESET Inputs Leakage Current Active Current (Read *1,*2 Active Current (Intra-Page Read Active Current (Program Erase) *2,*3 Standby Current Symbol ILIT ICC1 ICC2 ICC3 Conditions VCC, Others Value -2.0 -1.0 -1.0 +2.0 +1.0 +1.0 Unit
VOUT VCC, Max, RESET 12.5 VIL, VIH, VIL, VIH, VIL, VIH, tPRC 4-Word VIL, RESET VIH, RESET RESET VIL, VIL, VIH, Max, =VACC
ICC4
Reset Current Automatic Sleep Current Active Current (Erase-Suspend-Program) Accelerated Program Current Input Level Input High Level Voltage Sector Protection/Unprotection Program Acceleration Voltage Autoselect, Temporary Sector Unprotected Output Voltage Level Output High Voltage Level Lock-Out Voltage
ICC5
ICC6
ICC7
-0.5 11.5
12.0
12.5
IACC
VACC
VLKO
Min, VCCQ VCCQ -2.0 Min, VCCQ VCCQ
11.5 0.85 VCCQ
12.0
12.5 0.45
current listed includes both operating current frequency dependent component. Maximum values tested with VCCQ VCCQ Max. active while Embedded Erase Embedded Program Write Buffer Programming progress. Automatic sleep mode enables power mode when address remain stable tACC
MBM29PL65LM-90/10
Characteristics
Read Only Operations Characteristics Parameter Read Cycle Time Address Output Delay Chip Enable Output Delay Page Read Cycle Time Page Address Output Delay Output Enable Output Delay Chip Enable Output High-Z Output Enable Hold Time Read Toggle Data Polling tOEH tREADY tOEH tREADY Symbol
JEDEC Standard
Condition VIL, VIL,
MBM29PL65LM-90*
MBM29PL65LM-10*
Unit
tACC tPRC tPACC
tACC tPRC tPACC
Output Enable Output High-Z Output Hold Time From Addresses, Whichever Occurs First RESET Read Mode
Test Conditions; Input pulse levels Input rise times Input fall times Timing measurement reference level Input Output Output Load
Conditions
Diode 1N3064 Equivalent Device Under Test Diode 1N3064 Equivalent
MBM29PL65LM-90/10
Write (Erase/Program) Operations Symbol Parameter
JEDEC Standard
MBM29PL65LM-90 MBM29PL65LM-10 Unit 23.5 23.5
Write Cycle Time Address Setup Time Address Setup Time During Toggle Polling Address Hold Time Address Hold Time from High During Toggle Polling Data Setup Time Data Hold Time Output Enable Setup Time High During Toggle Polling High During Toggle Polling Read Recover Time Before Write High Low) Read Recover Time Before Write High Low) Setup Time Setup Time Hold Time Hold Time Pulse Width Write Pulse Width Pulse Width High Write Pulse Width High
tASO tAHT tOES tCEPH tOEPH tGHWL tGHEL tCPH tWPH
tASO tAHT tOES tCEPH tOEPH tGHWL tGHEL tCPH tWPH
Effective Page Programming Time Word (Write Buffer Programming) tWHWH1 Programming Time Sector Erase Operation Setup Time Word tWHWH2 tVCS
tWHWH1 tWHWH2 tVCS
(Continued)
MBM29PL65LM-90/10
(Continued)
Parameter Rise Time Rise Time
Symbol
JEDEC Standard
MBM29PL65LM-90
MBM29PL65LM-10
Unit
tVIDR tVACCR
tVIDR tVACCR tVLHT tWPP tOESP tCSP tEOE tTOW tSPD
Voltage Transition Time Write Pulse Width
tVLHT tWPP
Setup Time Active Setup Time Active RESET Pulse Width
tOESP tCSP tEOE tTOW tSPD
RESET High Time Before Read Delay Time from Embedded Output Enable Erase Time-out Time Erase Suspend Transition Time
This does include preprogramming time. This timing Sector Group Protection operation. This timing Accelerated Program operation.
ERASE PROGRAMMING PERFORMANCE
Parameter Sector Erase Time Programming Time Effective Page Programming Time (Write Buffer Programming) Chip Programming Time Absolute Maximum Programming Time words) Erase/Program Cycle Limits 100,000 23.5 3000 Unit cycle programming within same page Excludes system-level overhead Remarks Excludes programming time prior erasure
TSOP CAPACITANCE
Parameter Input Capacitance Output Capacitance Control Capacitance RESET Capacitance Symbol COUT CIN2 CIN3 Test Setup VOUT Value Unit
Note Test conditions +25°C, DQ15 capacitance stipulated output capacitance.
MBM29PL65LM-90/10
TIMING DIAGRAM
Switching Waveforms
WAVEFORM INPUTS Must Steady Change from Change from Change Permitted Does Apply OUTPUTS Will Steady Will Changing from Will Changing from Changing State Unknown Center Line HighImpedance "Off" State
Read Operation Timing Diagram
Address
Address Stable
tACC
tOEH
Data
High-Z
Output Valid
High-Z
MBM29PL65LM-90/10
Page Read Operation Timing Diagram
Address Valid
tACC
tPRC
tOEH
Data High-Z
tPACC
tPACC
Hardware Reset Timing Diagram
Address
tACC
Address Stable
RESET
Data
High-Z
Output Valid
MBM29PL65LM-90/10
Alternate Controlled Program Operation Timing Diagram
Cycle Address
555h
Data Polling
tGHWL tWPH tWHWH1
Data
DOUT
DOUT
DOUT
Address memory location programmed. Data programmed word address. output complement data written device. output data written device
Note Figure indicates last cycles four cycle sequence.
MBM29PL65LM-90/10
Alternate Controlled Program Operation Timing Diagram
Cycle Data Polling
Address
555h
tGHEL tCPH tWHWH1
Data
DOUT
Address memory location programmed. Data programmed word address. output complement data written device. output data written device.
Note Figure indicates last cycles four cycle sequence.
MBM29PL65LM-90/10
Chip/Sector Erase Operation Timing Diagram
Address
555h
2AAh
555h
555h
2AAh
tGHWL tWPH tTOW
Chip Erase 10h/ tBUSY
Data
RY/BY
tVCS
sector address Sector Erase. Address 555h (Word), AAAh (Byte) Chip Erase.
MBM29PL65LM-90/10
Erase Suspend Operation Timing Diagram
Address
XXXh
tSPD
Data RY/BY
Data Polling during Embedded Algorithm Operation Timing Diagram
Address
tOEH
Data Valid Data High-Z
tWHWH1
Data
Output Flag tEOE
Valid Data
High-Z
Valid Data (The device completed Embedded operation.)
Note When checking Hardware Sequence Flags during program operations, should checked after issuing program command.
MBM29PL65LM-90/10
Toggle Timing Diagram during Embedded Algorithm Operations
Address
tAHT tASO tAHT
tCEPH
tOEPH tOEH
6/DQ2
Data
Toggle Data
Toggle Data
Toggle Data
Stop
Toggling
Output Valid
stops toggling (The device completed Embedded operation). Note When checking Hardware Sequence Flags during program operations, should checked after issuing program command.
(10)
nter bedded rasing
rase uspend rase
nter rase uspend rogram rase uspend rogram
rase esum rase uspend rase rase plete
rase uspend
DQ2* oggle
read from erase-suspended sector.
MBM29PL65LM-90/10
(11) RESET Timing Diagram during Embedded Algorithms
RESET
tREADY
(12) RESET Timing Diagram During Embedded Algorithms
tREADY
RESET
MBM29PL65LM-90/10
(13) Sector Group Protection Timing Diagram
A21, A20, A18,
SGAX
SGAY
tVLHT
tVLHT tWPP tVLHT tVLHT
tOESP
tCSP
Data
tVCS
SGAX Sector Group Address protected SGAY Next Sector Group Address protected
MBM29PL65LM-90/10
(14) Temporary Sector Group Unprotection Timing Diagram
tvCS tVIDR
tVLHT
VSS, RESET
tVLHT
Program Erase Command Sequence
tVLHT
Unprotection period
MBM29PL65LM-90/10
(15) Extended Sector Group Protection Timing Diagram
RESET ddress SGAX SGAX SGAY
Sector Group Address protected Next Sector Group Address protected TIME-OUT Time-Out window (Min)
SGAX SGAY
MBM29PL65LM-90/10
(16) Accelerated Program Timing Diagram
tVCS VACC
tVACCR tVLHT
tVLHT Program Command Sequence tVLHT
Acceleration period
MBM29PL65LM-90/10
FLOW CHART
Embedded ProgramAlgorithm EMBEDDED ALGORITHMS
Start
Write Program Command Sequence (See Below)
Data Polling Embedded Program Algorithm progress
Verify Data
Increment Address
Last Address
Programming Completed
Program Command Sequence (Address/Command): 555h/AAh
2AAh/55h
555h/A0h
Program Address/Program Data
MBM29PL65LM-90/10
Embedded EraseAlgorithm EMBEDDED ALGORITHMS
Start
Write Erase Command Sequence (See Below)
Data Polling Embedded Erase Algorithm progress
Data Erasure Completed
Chip Erase Command Sequence (Address/Command): 555h/AAh
Individual Sector/Multiple Sector Erase Command Sequence (Address/Command): 555h/AAh
2AAh/55h
2AAh/55h
555h/80h
555h/80h
555h/AAh
555h/AAh
2AAh/55h
2AAh/55h Sector Address /30h Sector Address /30h Sector Address /30h
555h/10h
Additional sector erase commands optional.
MBM29PL65LM-90/10
Data Polling Algorithm
Start Wait after issuing Program command Read Byte Addr.
Data? Read Byte Addr.
Data? Fail
Pass
Valid address programming sector addresses within sector being erased during sector erase multiple sector erases operation sector addresses within sector being protected during chip erase operation (There accurate indications determine that data polling been completed.)
rechecked even because change simultaneously with DQ5.
MBM29PL65LM-90/10
Toggle Algorithm
Start Wait after issuing Program command Read Addr. Read Addr.
Toggle?
Read Addr. Read Addr.
Toggle? Program/Erase Operation Complete.Write Reset Command
Program/Erase Operation Complete
Read Toggle twice determine whether toggling. Recheck Toggle because stop toggling changes "1".
MBM29PL65LM-90/10
Sector Group Protection Algorithm
Start
Setup Sector Group Addr. (A21, A20, A19, A18, A17)
PLSCNT VID, VIL, RESET VIL,
Activate Pulse Increment PLSCNT Time
VIH, should remain VID) Read from Sector Group Addr. SGA, Data 01h? Protect Another Sector Group? Device Failed Remove from Write Reset Command
PLSCNT Remove from Write Reset Command
Sector Group Protection Completed
MBM29PL65LM-90/10
Temporary Sector Group Unprotection Algorithm
Start
RESET
Perform Erase Program Operations
RESET
Temporary Sector Group Unprotection Completed
protected sector groups unprotected. previously protected sector groups protected.
MBM29PL65LM-90/10
Extended Sector Group Protection Algorithm
Start
RESET
Wait
Device Operating Temporary Sector Group Unprotection Mode
Extended Sector Group Protection Entry? Setup Sector Group Protection Write XXXh/60h
PLSCNT
Protect Sector Group Write Sector Address
=VIL, VIH)
Increment PLSCNT
Time Setup Next Sector Group Address
Verify Sector Group Protection Write Sector Address =VIL, VIH)
Read from Sector Group Address =VIL, VIH) PLSCNT Remove from RESET Write Reset Command Data 01h? Protection Other Sector Group Device Failed Remove from RESET Write Reset Command
Sector Group Protection Completed
MBM29PL65LM-90/10
Embedded ProgramAlgorithm Fast Mode FAST MODE ALGORITHM
Start
555h/AAh
2AAh/55h
Fast Mode
555h/20h
XXXh/A0h
Program Address/Program Data
Data Polling
Verify Data?
Fast Program
Increment Address
Last Address Programming Completed
XXXh/90h Reset Fast Mode XXXh/F0h
Note sequence applied Word mode.
MBM29PL65LM-90/10
ORDERING INFORMATION
Part MBM29PL65LM90TN MBM29PL65LM10TN Package 48-pin, plastic TSOP (FPT-48P-M19) (Normal Bend) Access Time (ns) Remarks
MBM29PL65LM
PACKAGE TYPE 48-Pin Thin Small Outline Package (TSOP(1)) Standard Pinout
SPEED OPTION access time access time
DEVICE NUMBER/DESCRIPTION Mega-bit V-only Page Mode MirrorFlash
MBM29PL65LM-90/10
PACKAGE DIMENSION
48-pin plastic TSOP(1) (FPT-48P-M19) Note Values include resin protrusion. Resin protrusion gate protrusion +0.15(.006)Max(each side). Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
LEAD
INDEX
Details part
0.25(.010)
0~8°
0.60±0.15 (.024±.006)
20.00±0.20 (.787±.008) 18.40±0.20 (.724±.008)
12.00±0.20
(.472±.008) 1.10 -0.05
+0.10 +.004
.043 -.002 (Mounting height)
0.50(.020)
0.10(.004)
0.17 -0.08 .007 -.003
+0.03 +.001
0.10±0.05 (.004±.002) (Stand height) 0.22±0.05 (.009±.002) 0.10(.004)
2003 FUJITSU LIMITED F48029S-c-6-7
Dimensions (inches) Note values parentheses reference values.
MBM29PL65LM-90/10
FUJITSU LIMITED
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FLASH MEMORY MirrorFlash MBM29PL65LM-90/10 DESCRIPTION

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