SDRAM Buffer Desktop with DIMMS Generates output buffers from inp

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SDRAM Buffer Desktop with DIMMS Generates output buffers from inp

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PLL103-02
SDRAM Buffer Desktop with DIMMS
Generates output buffers from input. Supports four DIMMS. Supports 266MHz SDRAM. additional output feedback. Less than delay. Skew between outputs less than 2.5V Supply range. Enhanced Output Drive selected I2C. Available SSOP.
CONFIGURATION
FBOUT VDD2.5 DDR0T DDR0C DDR1T DDR1C VDD2.5 DDR2T DDR2C VDD2.5 BUF_IN
DDR0T
VDD2.5 DDR11T DDR11C DDR10T DDR10C VDD2.5 DDR9T DDR9C VDD2.5 DDR8T DDR8C VDD2.5 DDR7T DDR7C DDR6T DDR6C SCLK
PLL103-02
BLOCK DIAGRAM
SDATA SCLK
Control
DDR0C DDR1T DDR1C DDR2T DDR2C DDR3T DDR3C DDR4T
DDR3T DDR3C VDD2.5 DDR4T DDR4C DDR5T DDR5C VDD2.5 SDATA
Note: Active
BUF_IN
DDR4C DDR5T DDR5C DDR6T DDR6C DDR7T DDR7C DDR8T DDR8C DDR9T DDR9C DDR10T DDR10C DDR11T DDR11C
DESCRIPTION
PLL103-02 designed 2.5V buffer distribute high-speed clocks applications. device outputs. These outputs configured support four unbuffered DIMMS. PLL103-02 used conjunction with clock synthesizer chipset. PLL103-02 also interface, which enable disable each output clock. When powered output clocks enabled (have internal pull ups).
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 09/09/04 Page
PLL103-02
SDRAM Buffer Desktop with DIMMS
DESCRIPTIONS
Name
FBOUT BUF_IN DDR[0:11]T DDR[0:11]C VDD2.5
Number
4,6,10,15,19, 21,28,30,34, 39,43,45 5,7,11,16,20, 22,27,29,33, 38,42,44 2,8,12,17,23, 32,37,41,47 3,9,14,18,26, 31,35,40,46
Type
Description
Feedback clock chipset. Reference input from chipset. Power Down Control input. When low, will tri-state outputs. connected. These outputs provide True copies BUF_IN. These outputs provide complementary copies BUF_IN. 2.5V power supply. Ground.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 09/09/04 Page
PLL103-02
SDRAM Buffer Desktop with DIMMS
CONFIGURATION SETTING
Address Assignment Slave Receiver/Transmitter Data Transfer Rate
Provides both slave write readback functionality Standard mode 100kbits/s This serial protocol designed allow both blocks write read from controller. bytes must accessed sequential order from lowest highest byte. Each byte transferred must followed acknowledge bit. byte transferred without acknowledged will terminate transfer. write read block both begins with master sending slave address write condition (0xD2) read condition (0xD3). Following acknowledge this address byte, Write Mode: Command Byte Byte Count Byte must sent master ignored slave, Read Mode: Byte Count Byte will read master then other Data Byte. Byte Count Byte default power-up (0x09).
Data Protocol
CONTROL REGISTERS
BYTE Outputs Register (1=Enable, 0=Disable)
Pin#
Default
Description
Reserved Reserved Enhanced Drive. Enhanced Reserved DDR11T, DDR11C DDR10T, DDR10C DDR9T, DDR9C DDR8T, DDR8C
BYTE Outputs Register (1=Enable, 0=Disable)
Pin#
Default
Description
DDR7T, DDR6T, DDR5T, DDR4T, DDR3T, DDR2T, DDR1T, DDR0T, DDR7C DDR6C DDR5C DDR4C DDR3C DDR2C DDR1C DDR0C
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 09/09/04 Page
PLL103-02
SDRAM Buffer Desktop with DIMMS
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, Output Voltage, Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) Protection, Human Body Model
SYMBOL
MIN.
-0.5 -0.5
MAX.
+0.5 +0.5
UNITS
Exposure device under conditions beyond limits specified Maximum Ratings extended periods cause permanent damage device affect product reliability. These conditions represent stress rating only, functional operations device these other conditions above operational limits noted this specification implied. Note: Operating Temperature guaranteed design parts (COMMERCIAL INDUSTRIAL), tested COMMERCIAL grade only.
Operating Conditions PARAMETERS
Supply Voltage Input Capacitance Output Capacitance
SYMBOL
DD2.5
MIN.
2.375
MAX.
2.625
UNITS
Electrical Specifications PARAMETERS
Input High Voltage Input Voltage Input High Current Input Current Output High Voltage Output Voltage Output High Current Output Current
Note: TBM: measured
SYMBOL
CONDITIONS
Inputs except inputs except -12mA, 2.375V 12mA, 2.375V 2.375V, VOUT=1V 2.375V, VOUT=1.2V
MIN.
-0.3
TYP.
MAX.
+0.3
UNITS
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 09/09/04 Page
PLL103-02
SDRAM Buffer Desktop with DIMMS
Electrical Specifications (Continued) PARAMETERS
Supply Current Output Crossing Voltage Output Voltage Swing Duty Cycle Max. Operating Frequency Rising Edge Rate Falling Edge Rate Clock Skew Stabilization Time
Note: TBM: measured
SYMBOL
SKEW
CONDITIONS
MIN.
(VDD/2) -0.1
TYP.
VDD/2
MAX.
(VDD/2)+ VDD-0.4
UNITS
V/ns V/ns
Measured 1.5V Measured Measured 0.4V 2.4V 2.4V 0.4V
outputs equally loaded
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 09/09/04 Page
PLL103-02
SDRAM Buffer Desktop with DIMMS
PACKAGE INFORMATION
0.400 0.410 10.160 10.414
0.292 0.299 7.417 7.959
0.008 0.0135 0.203 0.343
0.025 0.835
0.015 (0.381) 0.010 0.016 (0.25 0.41)
0.620 0.630 (15.75 16.00)
0.088 0.096 (2.250 2.450)
0.097 0.104 (2.467 2.642) 30-60 0.050 (1.346) 0.008 0.016 (0.20 0.41)
48PIN SSOP
ORDERING INFORMATION
part ordering, please contact Sales Department:
47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
order number this device combination following: Device number, Package type Operating temperature range
PLL103-02
PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE X=SSOP
Order Number PLL103-02XC-R PLL103-02XC
Marking P103-02XC P103-02XC
Package Option SSOP Tape Reel SSOP Tube
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished PhaseLink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 09/09/04 Page

SDRAM Buffer Desktop with DIMMS Generates output buffers from inp

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