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MC74HC02A identical pinout LS02. device inputs compatible with standar
Top Searches for this datasheetMC74HC02A Quad 2-Input Gate MC74HC02A identical pinout LS02. device inputs compatible with standard CMOS outputs; with pullup resistors, they compatible with LSTTL outputs. http://onsemi.com MARKING DIAGRAMS PDIP-14 SUFFIX CASE SOIC-14 SUFFIX CASE 751A HC02AG AWLYWW Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Input Current: High Noise Immunity Characteristic CMOS Devices Compliance with Requirements Defined JEDEC Standard Chip Complexity: FETs Equivalent Gates Pb-Free Packages Available LOGIC DIAGRAM MC74HC02AN AWLYYWWG TSSOP-14 SUFFIX CASE 948G Y=A+B ALYWG Assembly Location Wafer Year Work Week Pb-Free Package (Note: Microdot either location) FUNCTION TABLE Inputs Output ASSIGNMENT ORDERING INFORMATION detailed ordering shipping information package dimensions section page this data sheet. Semiconductor Components Industries, LLC, 2006 October, 2006 Rev. Publication Order Number: MC74HC02A/D MC74HC02A MAXIMUM RATINGS* Symbol Vout Iout Parameter Value Unit Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Current, Supply Current, Pins Power Dissipation Still Air, Plastic SOIC Package TSSOP Package Tstg Storage Temperature Lead Temperature, from Case Seconds Plastic DIP, SOIC TSSOP Package This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open. Stresses exceeding Maximum Ratings damage device. Maximum Ratings stress ratings only. Functional operation above Recommended Operating Conditions implied. Extended exposure stresses above Recommended Operating Conditions affect device reliability. Derating Plastic DIP: mW/_C from 125_C SOIC Package: mW/_C from 125_C TSSOP Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Supply Voltage (Referenced GND) Vin, Vout Input Voltage, Output Voltage (Referenced GND) Operating Temperature, Package Types Input Rise Fall Time (Figure 1000 Symbol Parameter Unit http://onsemi.com NOTE: propagation delays with loads other than information typical parametric values, Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). NOTE: Information typical parametric values found Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). Used determine no-load dynamic power consumption: Semiconductor High-Speed CMOS Data Book (DL129/D). ELECTRICAL CHARACTERISTICS Input ELECTRICAL CHARACTERISTICS (Voltages Referenced GND) Symbol Symbol tPLH, tPHL tTLH, tTHL Maximum Input Capacitance Maximum Output Transition Time, Output (Figures Maximum Propagation Delay, Input Output (Figures Power Dissipation Capacitance (Per Gate)* Maximum Quiescent Supply Current (per Package) Maximum Input Leakage Current Maximum Low-Level Output Voltage Minimum High-Level Output Voltage Maximum Low-Level Input Voltage Minimum High-Level Input Voltage Parameter Parameter Vout |Iout| Vout |Iout| |Iout| |Iout| |Iout| Test Conditions http://onsemi.com MC74HC02A |Iout| |Iout| |Iout| |Iout| |Iout| |Iout| load considerations, Chapter 25_C 25_C Typical 25°C, 1.35 3.15 0.26 0.26 0.26 2.48 3.98 5.48 Guaranteed Limit Guaranteed Limit 85_C 85_C 1.35 3.15 0.33 0.33 0.33 2.34 3.84 5.34 1.35 3.15 2.20 125_C 125°C Unit Unit MC74HC02A ORDERING INFORMATION Device MC74HC02AN MC74HC02ANG MC74HC02AD MC74HC02ADG MC74HC02ADR2 MC74HC02ADR2G MC74HC02ADTR2 MC74HC02ADTR2G MC74HC02AFEL MC74HC02AFELG Package PDIP-14 PDIP-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* SOEIAJ-14 SOEIAJ-14 (Pb-Free) 2000/Tape Reel 2500/Tape Reel Units Rail Units/Rail Shipping information tape reel specifications, including part orientation tape sizes, please refer Tape Reel Packaging Specifications Brochure, BRD8011/D. *This package inherently Pb-Free. INPUT tPLH OUTPUT tTLH TEST POINT tPHL DEVICE UNDER TEST OUTPUT tTHL *Includes probe capacitance Figure Switching Waveforms Figure Test Circuit EXPANDED LOGIC DIAGRAM (1/4 DEVICE) http://onsemi.com MC74HC02A PACKAGE DIMENSIONS PDIP-14 CASE 646-06 ISSUE NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 0.015 0.039 MILLIMETERS 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 0.38 1.01 SEATING PLANE 0.13 (0.005) http://onsemi.com MC74HC02A PACKAGE DIMENSIONS SOIC-14 CASE 751A-03 ISSUE 0.25 (0.010) NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. SEATING PLANE 0.25 (0.010) MILLIMETERS 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.19 0.25 0.10 0.25 5.80 6.20 0.25 0.50 INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019 SOLDERING FOOTPRINT* 7.04 0.58 1.52 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information Pb-Free strategy soldering details, please download Semiconductor Soldering Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com MC74HC02A PACKAGE DIMENSIONS TSSOP-14 CASE 948G-01 ISSUE 0.10 (0.004) 0.15 (0.006) 0.25 (0.010) IDENT. DETAIL 0.15 (0.006) SECTION 0.10 (0.004) SEATING PLANE DETAIL SOLDERING FOOTPRINT* 7.06 0.36 1.26 *For additional information Pb-Free strategy soldering details, please download Semiconductor Soldering Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS INCHES 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 1.20 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 0.026 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 0.252 0.65 PITCH DIMENSIONS: MILLIMETERS MC74HC02A Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. 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