MC74AC377/74ACT377 eight edge-triggered, D-type flip-flops with indivi

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MC74AC377/74ACT377 eight edge-triggered, D-type flip-flops with indivi

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MC74AC377, MC74ACT377 Octal Flip-Flop with Clock Enable
MC74AC377/74ACT377 eight edge-triggered, D-type flip-flops with individual inputs outputs. common buffered Clock (CP) input loads flip-flops simultaneously, when Clock Enable (CE) LOW. register fully edge-triggered. state each input, setup time before LOW-to-HIGH clock transition, transferred corresponding flip-flop's output. input must stable only setup time prior LOW-to-HIGH clock transition predictable operation.
PDIP-20 SUFFIX CASE
Ideal Addressable Register Applications Clock Enable Address Data Synchronization Applications Eight Edge-Triggered Flip-Flops Buffered Common Clock Outputs Source/Sink MC74AC273 Master Reset Version MC74AC373 Transparent Latch Version MC74AC374 3-State Version ACT377 Compatible Inputs Surface Mount Chip Complexity: FETs Gates Pb-Free Packages Available
SOIC-20W SUFFIX CASE 751D
TSSOP-20 SUFFIX CASE 948E
SOEIAJ-20 SUFFIX CASE
ORDERING INFORMATION
detailed ordering shipping information package dimensions section page this data sheet.
DEVICE MARKING INFORMATION
general marking information device marking section page this data sheet.
Figure Pinout: 20-Lead Packages Conductors
(Top View)
NAMES
D0-D7 Q0-Q7 FUNCTION Data Inputs Clock Enable (Active LOW) Data Outputs Clock Pulse Input
Figure Logic Symbol
Semiconductor Components Industries, LLC, 2006
December, 2006 Rev.
Publication Order Number: MC74AC377/D
MC74AC377, MC74ACT377
MODE SELECT-FUNCTION TABLE
Inputs Operating Mode Load Load Hold Nothing)
HIGH Voltage Level Voltage Level Immaterial LOW-to-HIGH Clock Transition
Outputs Change Change
Please note that this diagram provided only understanding logic operations should used estimate propagation delays.
Figure Logic Diagram
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MC74AC377, MC74ACT377
MAXIMUM RATINGS
Symbol Vout Iout Tstg Parameter Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Sink/Source Current, Current Output Storage Temperature Thermal Resistance, (Junction-to-Ambient) SOIC TSSOP PDIP Human Body Model (Note Machine Model (Note Charged Device Model (Note 125°C (Note Value -0.5 +7.0 -0.5 +0.5 -0.5 +0.5 +150 2000 1000 Unit °C/W
VESD
Withstand Voltage
ILatchup
Latchup Performance
Stresses exceeding Maximum Ratings damage device. Maximum Ratings stress ratings only. Functional operation above Recommended Operating Conditions implied. Extended exposure stresses above Recommended Operating Conditions affect device reliability. Tested EIA/JESD22-A114-A Tested EIA/JESD22-A115-A Tested JESD22-C101-A Tested EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol Vin, Vout Supply Voltage Input Voltage, Output Voltage (Ref. GND) Input Rise Fall Time (Note Devices except Schmitt Inputs Input Rise Fall Time (Note Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current High Output Current Parameter ns/V ns/V Unit
from VCC; individual Data Sheets devices that differ from typical input rise fall times. from individual Data Sheets devices that differ from typical input rise fall times.
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MC74AC377, MC74ACT377
74AC CHARACTERISTICS
Symbol Parameter Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage IOLD IOHD Maximum Input Leakage Current Maximum Input Leakage Current Maximum Quiescent Supply Current +25°C 1.50 2.25 2.75 1.50 2.25 2.75 2.99 4.49 5.49 -40°C +85°C Unit Conditions VOUT VOUT IOUT
Guaranteed Limits 2.10 3.15 3.85 0.90 1.35 1.65 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 2.10 3.15 3.85 0.90 1.35 1.65 2.46 3.76 4.76 0.44 0.44 0.44 ±1.0
*VIN IOUT
0.002 0.001 0.001
*VIN VCC, VOLD 1.65 VOHD 3.85
*All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. NOTE: guaranteed less than equal respective limit VCC.
74AC CHARACTERISTICS Figures Waveforms, Figures
Symbol Parameter VCC* +25°C 13.0 13.0 10.0 -40°C +85°C 14.0 10.0 14.5 11.0 Unit
fmax tPLH tPHL
Maximum Clock Frequency Propagation Delay Propagation Delay
Voltage Range ±0.3 Voltage Range ±0.5
74AC OPERATING REQUIREMENTS
Symbol Parameter Setup Time, HIGH Hold Time, HIGH Setup Time, HIGH Hold Time, HIGH Pulse Width HIGH VCC* +25°C 4.07 -40°C +85°C Guaranteed Minimum Unit
Voltage Range ±0.3 Voltage Range ±0.5
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MC74AC377, MC74ACT377
74ACT CHARACTERISTICS
Symbol Parameter Minimum High Level Input Voltage Maximum Level Output Voltage DICCT IOLD IOHD Maximum Input Leakage Current Additional ICC/Input Minimum Dynamic Output Current Maximum Quiescent Supply Current +255C 4.49 5.49 0.001 0.001 -405C +855C Unit Conditions VOUT VOUT IOUT *VIN IOUT *VIN VCC, VOLD 1.65 VOHD 3.85
Guaranteed Limits 3.86 4.86 0.36 0.36 ±0.1 3.76 4.76 0.44 0.44 ±1.0
Maximum Level Input Voltage
Minimum High Level Output Voltage
*All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time.
74ACT CHARACTERISTICS Figures Waveforms Figures
Symbol fmax tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay Propagation Delay VCC* +25°C -40°C +85°C Unit
*Voltage Range ±0.5
74ACT OPERATING REQUIREMENTS
Symbol Parameter Setup Time, HIGH Hold Time, HIGH Setup Time, HIGH Hold Time, HIGH Pulse Width VCC* +25°C -40°C +85°C Unit
Guaranteed Minimum
HIGH
*Voltage Range ±0.5
CAPACITANCE
Symbol Parameter Input Capacitance Power Dissipation Capacitance Value Unit Test Conditions
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MC74AC377, MC74ACT377
SWITCHING WAVEFORMS
CLOCK 1/fmax tPLH
tPHL CLOCK
Figure
Figure
VALID DATA CLOCK
Figure
OUTPUT DEVICE UNDER TEST SCOPE TEST POINT
*Includes probe capacitance
Figure Test Circuit
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MC74AC377, MC74ACT377
ORDERING INFORMATION
Device MC74AC377N MC74AC377NG MC74ACT377N MC74ACT377NG MC74AC377DW MC74AC377DWG MC74AC377DWR2 MC74AC377DWR2G MC74ACT377DW MC74ACT377DWG MC74ACT377DWR2 MC74ACT377DWR2G MC74AC377DT MC74AC377DTG MC74AC377DTR2 MC74AC377DTR2G MC74ACT377MEL MC74ACT377MELG Package PDIP-20 PDIP-20 (Pb-Free) PDIP-20 PDIP-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) TSSOP-20* TSSOP-20* TSSOP-20* TSSOP-20* SOEIAJ-20 SOEIAJ-20 (Pb-Free) 2000 Tape Reel 2500 Tape Reel Units Rail 1000 Tape Reel Units Rail 1000 Tape Reel Units Rail Units Rail Shipping
information tape reel specifications, including part orientation tape sizes, please refer Tape Reel Packaging Specifications Brochure, BRD8011/D. *These packages inherently Pb-Free.
MARKING DIAGRAMS
PDIP-20 MC74ACT377N AWLYYWWG MC74AC377N AWLYYWWG AC377 AWLYYWWG ACT377 AWLYYWWG SOIC-20W ALYWG TSSOP-20 SOEIAJ-20
74ACT377 AWLYWWG
ALYWG Assembly Location Wafer Year Work Week Pb-Free Package (Note: Microdot either location)
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MC74AC377, MC74ACT377
PACKAGE DIMENSIONS
PDIP-20 SUFFIX PLASTIC PACKAGE CASE 738-03 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEAD WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH.
SEATING PLANE
0.25 (0.010)
0.25 (0.010)
INCHES 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 0.050 0.070 0.100 0.008 0.015 0.110 0.140 0.300 0.020 0.040
MILLIMETERS 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 1.27 1.77 2.54 0.21 0.38 2.80 3.55 7.62 0.51 1.01
SOIC-20W SUFFIX CASE 751D-05 ISSUE
0.25
NOTES: DIMENSIONS MILLIMETERS. INTERPRET DIMENSIONS TOLERANCES ASME Y14.5M, 1994. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL 0.13 TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 10.05 10.55 0.25 0.75 0.50 0.90
0.25
SEATING PLANE
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MC74AC377, MC74ACT377
PACKAGE DIMENSIONS
TSSOP-20 SUFFIX CASE 948E-02 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS INCHES 6.40 6.60 0.252 0.260 4.30 4.50 0.169 0.177 0.047 1.20 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 0.026 0.27 0.37 0.011 0.015 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 0.252
IDENT
0.15 (0.006)
DETAIL
0.100 (0.004) SEATING
PLANE
DETAIL
SOLDERING FOOTPRINT*
7.06
0.36
1.26
*For additional information Pb-Free strategy soldering details, please download Semiconductor Soldering Mounting Techniques Reference Manual, SOLDERRM/D.
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SECTION 0.25 (0.010)
0.15 (0.006)
0.10 (0.004)
0.65 PITCH
DIMENSIONS: MILLIMETERS
MC74AC377, MC74ACT377
PACKAGE DIMENSIONS
SOEIAJ-20 SUFFIX CASE 967-01 ISSUE
DETAIL
VIEW
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS MEASURED PARTING LINE. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.15 (0.006) SIDE. TERMINAL NUMBERS SHOWN REFERENCE ONLY. LEAD WIDTH DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS LEAD WIDTH DIMENSION MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT LOCATED LOWER RADIUS FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS ADJACENT LEAD 0.46 0.018). MILLIMETERS 2.05 0.05 0.20 0.35 0.50 0.15 0.25 12.35 12.80 5.10 5.45 1.27 7.40 8.20 0.50 0.85 1.10 1.50 0.70 0.90 0.81 INCHES 0.081 0.002 0.008 0.014 0.020 0.006 0.010 0.486 0.504 0.201 0.215 0.050 0.291 0.323 0.020 0.033 0.043 0.059 0.028 0.035 0.032
0.13 (0.005)
0.10 (0.004)
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MC74AC377/D

MC74AC377/74ACT377 eight edge-triggered, D-type flip-flops with indivi

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