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MC33680 dual DC-DC regulator designed electronic organizer application


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MC33680 Dual DC-DC Regulator Electronic Organizer
MC33680 dual DC-DC regulator designed electronic organizer applications. Both regulators apply Pulse-Frequency-Modulation (PFM). main step-up regulator output externally adjusted from 2.7V internal synchronous rectifier used ensure high efficiency (achieve 87%). auxiliary regulator with built-in power transistor configured produce wide range positive voltage (can used contrast voltage). This voltage adjusted from +25V external potentiometer. MC33680 been designed battery powered hand-held products. With start-up voltage from quiescent current (typical MC33680 best suited operate from cell. Moreover, supervisory functions such battery detection, Power-Good signal, back-up battery control, lithium battery supercap also included chip.
32-LEAD LQFP SUFFIX CASE 873A
CONNECTIONS DEVICE MARKING
VAUXBASE VAUXCHG VAUXBDV VAUXFBN VAUXFBP VAUXEN VAUXSW VAUXEMR LIBATIN LIBATOUT VMAINGND VMAINSW VMAIN MC33680 AWLYYWW DGND LIBATCL LIBATON LOWBATB PORB DGND LOWBATSEN
Input Voltage, Quiescent Current Standby Mode: typical Synchronous Rectification ensure high efficiency
(87% @60mA Load)
Adjustable Main Output: +2.7V
nominal 3.3V 100mA max, with 1.8V input Auxiliary Output Voltage: +25V 25mA max, with 1.8V input +25V 15mA max, with 1.8V input Current Limit Protection Power-Good Signal with Programmable Delay Battery Detection Lithium Battery Supercap Back-up 32-Pin LQFP Package
APPLICATIONS:
Digital Organizer Dictionary Dual Output Power Supply (For MPU, Logic, Memory, LCD) Handheld Battery Powered Device (1-2 AA/AAA cell)
ORDERING INFORMATION
Device MC33680FTB MC33680FTBR2 Package LQFP LQFP Shipping 1250 Tray Drypack 1800 Tape Reel
Semiconductor Components Industries, LLC, 2006
July, 2006 Rev.
VMAINFB VBAT VBAT PDELAY VREF AGND IREF
(Top View)
Publication Order Number: MC33680/D
MC33680
VBAT CMAINb RMAINb VBAT VBAT VMAINFB 1000 MBRA130LT1
VBAT RIref VBAT RLBa LOBAT- RLBb DGND PORB Power-On Reset DGND Edge Delay Max. Time IREF AGND CPOR VREF CVDD PDELAY
COMP3
VMAINSW VMAIN
senseFET
CMAIN
VMAINGND
1-SHOT Min. Time ILIM COMP2 Voltage Reference 1.22 COMP1 VCOMP AGND Main Regulator with Synchronous Rectifier Edge Delay LOWBATB LIBATON LIBATCL DGND Voltage Reference Current Bias Supervisory VAUXEN VAUXFBP VAUXFBN RAUXa Lithium Battery Backup AGND 0.85 VCOMP COMP1 1-SHOT Min. Time AGND Auxiliary Regulator 2200 RAUXb VAUXBDV VBAT Max. Time
LIBATOUT LIBATIN
DGND
VBAT MBRA140T3 VAUXSW
senseBJT
CAUX
VAUXEMR ILIM COMP2
VAUXCHG
VAUXBASE
Figure Detailed Application Block Diagram
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MC33680
TIMING DIAGRAMS
VBAT VMAINreg 0.15 VMAINreg
VMAIN
1.22
RIref
PORB
tPORC
VAUXEN
Figure Startup Timing
VBAT
LOWBAT Threshold
LOWBATB
VMAIN VMAINreg
PORB
Figure Power Down Timing
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LOWBATSEN VMAINGND VAUXBASE VAUXCHG VAUXEMR LOWBATB LIBATOUT VMAINSW
Function
VAUXBDV
VAUXFBN
VAUXFBP
VMAINFB
VAUXSW
LIBATON
VAUXEN
LIBATCL
PDELAY
LIBATIN
VMAIN
DGND
DGND
AGND
PORB
VREF
VBAT
VBAT
IREF
Type/Direction
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
CMOS Output
CMOS Output
Analog Ground
Power Ground
Digital Ground
Digital Ground
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
CMOS Input
CMOS Input
CMOS Input
Power
Power
Power
FUNCTION DESCRIPTION
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VMAIN output VMAIN inductor connection Ground VMAIN side switch connection Lithium battery output Lithium battery input backup purposes Emitter output VAUX power Collector output VAUX power connection test test VAUX base drive circuit power supply Feedback VAUX connection Feedback VAUX VAUX enable, Active high connection microprocessor control signal Lithium battery backup switch, HIGH, switch controlled LIBATON, otherwise, controlled internal logic microprocessor control signal Lithium battery backup switch, switch when LIBATON=HIGH LIBATCL=HIGH Active battery detect output Active Power-On reset signal Resistive network connection defining battery detect threshold Resistor connection defining internal current bias PDELAY current Bandgap Reference output voltage. Nominal voltage 1.25V Capacitor connection defining Power-On signal delay Connect decoupling capacitor internal logic supply Main battery supply Main battery supply Feedback VMAIN
MC33680
Description
MC33680
ABSOLUTE MAXIMUM RATINGS 25°C, unless otherwise noted.)
Parameter Power Supply Voltage Digital Voltage General Analog Voltage VAUXSW VAUXEMR Voltage (Continuous) VMAINSW VMAIN Voltage (Continuous) Operating Junction Temperature Ambient Operating Temperature Storage Temperature Symbol VBAT Vdigital Vanalog VAUXCE Vsyn (max) Tstg -0.3 -0.3 -0.3 -0.3 Unit
otherwise noted.)
STATIC ELECTRICAL CHARACTERISTICS (Circuit Figure 1.8V, Iload 70°C unless
Rating Symbol VBAT Vmain Vmain_range I3.3_1.8 frequency4 Freqmax_VM ILIM_VM VAUX_range Freqmax_VL ILIM_VL Iqstandby Vrefno_load threshold6 VLOBAT_L VLOBAT_H IchgPDELAY VthPDELAY 1.16 1.05 1.16 1.22 0.85 1.22 0.85
Unit
Operating Supply
Voltage1
VMAIN output voltage VMAIN output voltage range2 VMAIN output current3 VMAIN maximum switching
1.15
VMAIN peak coil static current limit VAUX output voltage range VAUX maximum switching frequency VAUX peak coil static current limit Quiescent Supply Current Standby Mode5 Reference Voltage load Battery Detect lower hysteresis
1.28 1.15 1.28
Battery Detect upper hysteresis threshold PDELAY output charging current PDELAY voltage threshold
NOTE: Output current capability reduced with supply voltage decreased energy transfer. supply voltage must higher than VMAIN+0.6V ensure boost operation. Start-up loading typically 1.8V 2.2V NOTE: Output voltage adjusted external resistor VMAINFB pin. NOTE: VBAT 1.8V, output current capability increases with VBAT. NOTE: Only when current limit reached. NOTE: This average current consumed from VDD, which low-pass filtered from VMAIN, when only VMAIN enabled loading. NOTE: This minimum "LOWBATB" threshold battery voltage, threshold increased external resistor divider from "VBAT" "LOWBATSEN".
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MC33680
DYNAMIC ELECTRICAL CHARACTERISTICS (Refer TIMING DIAGRAMS, 70°C unless otherwise noted.)
Rating Minimum PORB Control delay Symbol tPORC Unit
VMAIN EFFICIENCY VMAIN VMAIN EFFICIENCY VMAIN
1.8V 1.5V
Iout 10mA Iout 60mA Iout 100mA
IOUT_MAIN, MAIN OUTPUT CURRENT (mA)
VIN, INPUT VOLTAGE
Figure Efficiency VMAIN versus Output Current (VMAIN Various VIN)
Figure Efficiency VMAIN versus Input Voltage (VMAIN Various IOUT)
VAUX EFFICIENCY VAUX VAUX EFFICIENCY VAUX IOUT_AUX, OUTPUT CURRENT (mA) 1.8V 1.5V
VIN, INPUT VOLTAGE Iout Iout Iout 10mA Iout 15mA
Figure Efficiency VAUX versus Output Current (VAUX Various VIN)
Figure Efficiency VAUX versus Input Voltage (VAUX Various IOUT)
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MC33680
VAUX, EFFICIENCY VAUX IOUT_AUX, OUTPUT CURRENT (mA) 1.8V 1.5V VAUX, EFFICIENCY VAUX VIN, INPUT VOLTAGE Iout Iout Iout 10mA Iout 15mA
Figure Efficiency VAUX versus Output Current (VAUX Various VIN)
Figure Efficiency VAUX versus Input Voltage (VAUX Various IOUT)
VAUX, EFFICIENCY VAUX 2.4V 1.8V 1.5V VAUX, EFFICIENCY VAUX
VIN, INPUT VOLTAGE IOUT_AUX, OUTPUT CURRENT (mA) Iout Iout Iout Iout Iout
Figure Efficiency VAUX versus Output Current (VAUX Various VIN)
Figure Efficiency VAUX versus Input Voltage (VAUX Various IOUT)
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MC33680
VMAIN mV/div, COUPLED) Voltage VMAINSW V/div)
VMAIN mV/div, COUPLED) Voltage VMAINSW V/div)
Figure VMAIN Output Ripple (Medium Load)
Figure VMAIN Output Ripple (Heavy Load)
VAUX mV/div, COUPLED) Voltage VAUXSW V/div)
VAUX mV/div, COUPLED) Voltage VAUXSW V/div)
Figure VAUX Output Ripple (Medium Load)
Figure VAUX Output Ripple (Heavy Load)
VMAIN from V/div) Voltage PORB V/div) Voltage ENABLE V/div)
VAUX from V/div) VAUXEN V/div)
Figure VMAIN Startup Power-Good Signal
Figure VAUX Startup
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MC33680
DETAILED OPERATING DESCRIPTION
General Iref RIref
MC33680 dual DC-DC regulator designed electronic organizer applications. Both regulators apply Pulse-Frequency-Modulation (PFM). main boost regulator output externally adjusted from 2.7V internal synchronous rectifier used ensure high efficiency (achieve 87%). auxiliary regulator with built-in power transistor configured produce wide range positive voltage (can used contrast voltage). This voltage adjusted from +25V external potentiometer. MC33680 been designed battery powered hand-held products. With start-up voltage from quiescent current (typical MC33680 best suited operate from cell. Moreover, supervisory functions such battery detection, Power-Good signal, back-up battery control, also included chip. makes MC33680 best one-chip power management solution applications such electronic organizers PDAs.
Pulse Frequency Modulation (PFM)
This bias current used internal current bias well setting VMAIN value. latter application, Iref doubled current sink With external resistor RMAINb tied from Pin1 Pin32, constant voltage level shift generated between pins. close-loop operation, voltage (i.e. Output feedback voltage) needed regulated internal reference voltage level, 1.22V. Therefore, delta voltage across which adjusted RMAINb determines Main Output voltage. feedback voltage drops below 1.22V, internal comparator sets switching cycle start. VMAIN calculated follows.
VMAIN 1.22 RMAINb RIref
Both regulators apply PFM. With this switching scheme, every cycle started feedback voltage lower than internal reference. This normally performed internal comparator. cycle starts, Low-Side switch (i.e. Figure turned fixed time duration (namely, Ton) unless current limit comparator senses coil current reached preset limit. latter case, instantly. defined maximum time When coil current ramps energy being stored inside coil. moment just after OFF, Synchronous Rectifier (i.e. Figure rectification device (such Schottky Diode Auxiliary Regulator) turned direct coil current charge output bulk capacitor. Provided that coil current limit reached, every switching cycle delivers fixed amount energy bulk capacitor. higher loading, larger amount energy (Charge) withdrawn from bulk capacitor, larger amount Charge then supplied bulk capacitor regulate output voltage. This implies switching frequency increased; vice-versa.
Main Regulator
From above equation, although VMAIN adjusted RMAINb RIref ratio, setting VMAIN, suggested, changing RMAINb value with RIref kept 480K. Since changing RIref will alter internal bias current which will affect timing functions time (TON1 time (TOFF1 Their relationships follows;
RIref RIref
Continuous Conduction Mode Discontinuous Conduction Mode
Figure shows simplified block diagram Main Regulator. Notice that precise bias current Iref generated converter external resistor RIref, where
Figure regulator operating Continuous Conduction Mode. switching cycle started output feedback voltage drops below internal voltage reference VREF. that instant, coil current zero, starts ramp next cycle. coil current ramps loading makes output voltage decrease energy supply path output bulk capacitor disconnected. After elapses, OFF, energy pumped bulk capacitor. Output voltage increased excessive charge pumped then decreased after coil current drops below loading. Notice abrupt spike output voltage bulk capacitor. Feedback voltage resistor-divided down level-shift down from output voltage. this feedback voltage drops below VREF, next switching cycle starts.
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MC33680
DETAILED OPERATING DESCRIPTION (Cont'd)
VBAT CMAINb Iref RMAINb 1000 kOhm COMP3 Iref IREF RIref kOhm Voltage Reference 1.22 VCOMP COMP1 1-SHOT Min. Time AGND Voltage Reference Current Bias Main Regulator with Synchronous Rectifier ILIM DGND COMP2 DGND VMAINGND Edge Delay Max. Time senseFET VMAIN CMAIN VMAINSW 33uH
VMAINFB
AGND
Figure Simplified Block Diagram Main Regulator
Figure regulator operating Discontinuous Conduction Mode, waveforms similar those Figure However, coil current drops zero before next switching cycle starts. estimate conduction mode, below equation used.
Iroom LOAD Vout
Vout LOAD
(S);
where, efficiency, refer Figure
Discontinuous Conduction mode, provided that current limit reached,
2@L@I LOAD Vout h@Vin (S);
Iroom regulator Discontinuous Conduction mode Iroom regulator Critical Conduction mode where coil current just drops zero next cycle starts. Iroom regulator Continuous Conduction mode Continuous Conduction mode, provided that current limit reached,
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MC33680
Cycle Starts VREF Feedback Voltage
Loading Current, ILOAD Coil Current VMAIN VMAIN
V@SW
VMAIN Zoom-In
Figure Waveforms Continuous Conduction Mode
Cycle Starts Feedback Voltage VREF
Loading Current, ILOAD Coil Current VMAIN VMAIN V@SW VMAIN Zoom-In
Figure Waveforms Discontinuous Conduction Mode http://onsemi.com
MC33680
DETAILED OPERATING DESCRIPTION (Cont'd)
Synchronous Rectification
Therefore, determination offset voltage essential optimum performance.
Auxiliary Regulator
Synchronous Rectifier used main regulator enhance efficiency. Synchronous rectifier normally realized powerFET with gate control circuitry which, however, involved relative complicated timing concerns. Figure main switch being turned OFF, synchronous switch just turned with being completely turned OFF, current will shunted from output bulk capacitor through ground. This power loss lowers overall efficiency. certain amount dead time introduced make sure completely before being turned this timing indicated Figure When main regulator operating continuous mode, being turned OFF, just turned with being completed OFF, above mentioned situation will occur. dead time introduced make sure completed before being turned this indicated Figure When main regulator operating discontinuous mode, coil current dropped zero, supposed OFF. Fail reverse current will flow from output bulk capacitor through then inductor battery input. causes damage battery. M2-voltage-drop sensing comparator (COMP3 Figure comes with fixed offset voltage switch before reverse current builds However, switch early, large residue coil current flows through body diode increases conduction loss.
Auxiliary Regulator boost regulator, applies scheme enhance high efficiency reduce quiescent current. internal voltage comparator (COMP1 Figure detects when voltage VAUXFBN drops below that VAUXFBP. internal power then switched fixed-ON-time until internal current limit reached), coil current allowed build switched OFF, coil current will flow through external Schottky diode charge bulk capacitor. After fixed-mimimum-OFF time elapses, next switching cycle will start output voltage comparator HIGH. Refer Figure VAUX regulation level determined equation follows,
VAUXFBP AUXb AUXa
Where Time, TON2, Time, TOFF2 determined following equations.
RIref RIref
Auxiliary Regulator control scheme same Main Regulator, equations conduction mode, also applied, However, used calculation referred Figures
VBAT 33uH
RAUXa kOhm VREF
RAUXb 2200 kOhm VBAT
VAUXFBP
VAUXFBN Edge Delay
VAUXBDV
VAUXSW senseBJT CAUX VAUXEMR
Max. Time
VCOMP COMP1
1-SHOT Min. Time ILIM COMP2 Auxiliary Regulator
AGND
Figure Simplified Block Diagram Auxiliary Regulator
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MC33680
DETAILED OPERATING DESCRIPTION (Cont'd)
Current Limit Both regulators LOBAThigh
From Figure Figure sense devices (senseFET senseBJT) applied sample coil current low-side switch With that sample current flowing through sense resistor, sense-voltage developed. Threshold detector (COMP2 both Figures) detects whether sense-voltage higher than preset level. happens, detector output reset flip-flop switch low-side switch, switch only next cycle starts.
Power-Good Signal
0.85 LOBATlow Lithium-Battery backup
During startup period (see Figure internal startup circuitry enabled pump VMAIN certain voltage level, which user-defined VMAIN output level minus offset 0.15V. internal Power-Good signal then enabled activate main regulator conditionally auxiliary regulator. Meanwhile, startup circuitry will shut down. Power-Good signal block also starts charge external capacitor tied from PDELAY ground with precise constant current. PDELAY's voltage reaches internal threshold, PORB will HIGH awake microprocessor. This delay stated follows;
1.22 RIref
backup conduction path which provided internal power switch (typ. Ohm) controlled internal logic microprocessor. LIBATCL LOW, switch, which then controlled internal logic, when battery removed VMAIN dropped below LIBATIN more than 100mV, returns when battery plugged back LIBATCL HIGH, switch controlled microprocessor through LIBATON. truth table shown Figure
Efficiency Output Ripple
From Figure chance, VMAIN dropped below user-defined VMAIN output level minus 0.5V, PORB will indicate OUTPUT situation. And, will continue function until VMAIN dropped below
Low-Battery-Detect
both regulators, when large values used feedback resistors 50kOhm), stray capacitance (VMAINFB) (VAUXFBN) "lag" feedback response, destabilizing regulator creating larger ripple output. From Figure ripple Main regulator reduced capacitors parallel with RMAINb, RAUXa RAUXb ranging from 100pF 100nF respectively. Reducing ripple also with improving efficiency, system designers recommended experiments capacitance values based design.
Bypass Capacitors
Low-Battery-Detect block actually voltage comparator. LOWBAT LOW, voltage external LOWBATSEN lower than 0.85V. will neglect this warning signal. LOWBAT will become HIGH, voltage external LOWBATSEN recovered more than 1.1V. From Figure with external resistors RLBa RLBb, thresholds Low-Battery-Detect adjusted based equations below.
LIBATCL
metal lead from battery coils long, stray resistance additional power loss system current being conducted. that case, bypass capacitors should placed closely coil, connected from VBAT ground. This reduces component coil current passing through long metal lead, thus minimizing that portion power loss.
LIBATON
Action
switch when battery removed VMAIN dropped below LIBATIN more than 100mV; switch when battery plugged switch switch
Figure Lithium Battery Backup Control Truth Table
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MC33680
PACKAGE DIMENSIONS
32-LEAD LQFP PLASTIC PACKAGE CASE 873A-02 ISSUE
0.20 (0.008)
BASE METAL
DETAIL
SECTION AE-AE 0.20 (0.008)
DETAIL
-T-, -U-,
0.20 (0.008)
-AB-
SEATING PLANE
-AC- 0.10 (0.004)
DETAIL
DETAIL
Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer. This literature subject applicable copyright laws resale manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center Semiconductor P.O. 5163, Denver, Colorado 80217 Phone: 303-675-2175 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East Africa Technical Support: Phone: 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit additional information, please contact your local Sales Representative
GAUGE PLANE
0.250 (0.010)
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NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DATUM PLANE -AB- LOCATED BOTTOM LEAD COINCIDENT WITH LEAD WHERE LEAD EXITS PLASTIC BODY BOTTOM PARTING LINE. DATUMS -T-, -U-, DETERMINED DATUM PLANE -AB-. DIMENSIONS DETERMINED SEATING PLANE -AC-. DIMENSIONS INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION 0.250 (0.010) SIDE. DIMENSIONS INCLUDE MOLD MISMATCH DETERMINED DATUM PLANE -AB-. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL CAUSE DIMENSION EXCEED 0.520 (0.020). MINIMUM SOLDER PLATE THICKNESS SHALL 0.0076 (0.0003). EXACT SHAPE EACH CORNER VARY FROM DEPICTION. MILLIMETERS 7.000 3.500 7.000 3.500 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 0.050 0.150 0.090 0.200 0.500 0.700 0.090 0.160 0.400 0.150 0.250 9.000 4.500 9.000 4.500 0.200 1.000 INCHES 0.276 0.138 0.276 0.138 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 0.002 0.006 0.004 0.008 0.020 0.028 0.004 0.006 0.016 0.006 0.010 0.354 0.177 0.354 0.177 0.008 0.039
MC33680/D

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