8-bit Microcontroller with Bytes In-System Programmable Flash ATmega16

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8-bit Microcontroller with Bytes In-System Programmable Flash ATmega16

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8-bit Microcontroller with Bytes In-System Programmable Flash ATmega165P ATmega165PV Preliminary Summary
8019HS-AVR-11/06
Configurations
Figure 1-1. Pinout ATmega165P
(ADC5/TMS) (ADC6/TDO) (ADC4/TCK) (ADC7/TDI) (ADC0) (ADC1) (ADC2) (ADC3)
AVCC
AREF
(RXD/PCINT0) (TXD/PCINT1) (XCK/AIN0/PCINT2) (AIN1/PCINT3) (USCK/SCL/PCINT4) (DI/SDA/PCINT5) (DO/PCINT6) (CLKO/PCINT7) (SS/PCINT8) (SCK/PCINT9) (MOSI/PCINT10) (MISO/PCINT11) (OC0A/PCINT12) (OC1A/PCINT13) (OC1B/PCINT14)
INDEX CORNER
(OC2A/PCINT15) (T1) (T0) RESET/PG5
(TOSC2) XTAL2
(TOSC1) XTAL1
(ICP1)
(INT0)
Note:
large center underneath QFN/MLF packages made metal internally connected GND. should soldered glued board ensure good mechanical stability. center left unconnected, package might loosen from board.
Disclaimer
Typical values contained this datasheet based simulations characterization other microcontrollers manufactured same process technology. values will available after device characterized.
ATmega165P
8019HS-AVR-11/06
ATmega165P
Overview
ATmega165P low-power CMOS 8-bit microcontroller based enhanced RISC architecture. executing powerful instructions single clock cycle, ATmega165P achieves throughputs approaching MIPS allowing system designer optimize power consumption versus processing speed.
Block Diagram
Block Diagram
Figure 2-1.
PORTF DRIVERS PORTA DRIVERS PORTC DRIVERS
DATA REGISTER PORTF
DATA DIR. REG. PORTF
DATA REGISTER PORTA
DATA DIR. REG. PORTA
DATA REGISTER PORTC
DATA DIR. REG. PORTC
8-BIT DATA
AVCC AREF INTERNAL OSCILLATOR
CALIB.
OSCILLATOR JTAG PROGRAM COUNTER STACK POINTER WATCHDOG TIMER
TIMING CONTROL
ON-CHIP DEBUG
PROGRAM FLASH
SRAM
CONTROL REGISTER
BOUNDARYSCAN
INSTRUCTION REGISTER
GENERAL PURPOSE REGISTERS
TIMER/ COUNTERS
PROGRAMMING LOGIC
INSTRUCTION DECODER
INTERRUPT UNIT
RESET
CONTROL LINES
EEPROM
STATUS REGISTER
USART
UNIVERSAL SERIAL INTERFACE
ANALOG COMPARATOR
DATA REGISTER PORTE
DATA DIR. REG. PORTE
DATA REGISTER PORTB
DATA DIR. REG. PORTB
DATA REGISTER PORTD
DATA DIR. REG. PORTD
DATA REG. PORTG
XTAL1
XTAL2
DATA DIR. REG. PORTG
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
8019HS-AVR-11/06
core combines rich instruction with general purpose working registers. registers directly connected Arithmetic Logic Unit (ALU), allowing independent registers accessed single instruction executed clock cycle. resulting architecture more code efficient while achieving throughputs times faster than conventional CISC microcontrollers. ATmega165P provides following features: bytes In-System Programmable Flash with Read-While-Write capabilities, bytes EEPROM, byte SRAM, general purpose lines, general purpose working registers, JTAG interface Boundary-scan, On-chip Debugging support programming, three flexible Timer/Counters with compare modes, internal external interrupts, serial programmable USART, Universal Serial Interface with Start Condition Detector, 8-channel, 10-bit ADC, programmable Watchdog Timer with internal Oscillator, serial port, five software selectable power saving modes. Idle mode stops while allowing SRAM, Timer/Counters, port, interrupt system continue functioning. Power-down mode saves register contents freezes Oscillator, disabling other chip functions until next interrupt hardware reset. Power-save mode, asynchronous timer continues run, allowing user maintain timer base while rest device sleeping. Noise Reduction mode stops modules except asynchronous timer ADC, minimize switching noise during conversions. Standby mode, crystal/resonator Oscillator running while rest device sleeping. This allows very fast start-up combined with low-power consumption. device manufactured using Atmel's high density non-volatile memory technology. On-chip Flash allows program memory reprogrammed In-System through serial interface, conventional non-volatile memory programmer, On-chip Boot program running core. Boot program interface download application program Application Flash memory. Software Boot Flash section will continue while Application Flash section updated, providing true Read-While-Write operation. combining 8-bit RISC with In-System Self-Programmable Flash monolithic chip, Atmel ATmega165P powerful microcontroller that provides highly flexible cost effective solution many embedded control applications. ATmega165P supported with full suite program system development tools including: Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, Evaluation kits.
ATmega165P
8019HS-AVR-11/06
ATmega165P
2.2.1
Descriptions
Digital supply voltage.
2.2.2
Ground.
2.2.3
Port (PA7:PA0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running.
2.2.4
Port (PB7:PB0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port better driving capabilities than other ports. Port also serves functions various special features ATmega165P listed "Alternate Functions Port page
2.2.5
Port (PC7:PC0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running.
2.2.6
Port (PD7:PD0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port also serves functions various special features ATmega165P listed "Alternate Functions Port page
2.2.7
Port (PE7:PE0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up
8019HS-AVR-11/06
resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port also serves functions various special features ATmega165P listed "Alternate Functions Port page 2.2.8 Port (PF7:PF0) Port serves analog inputs Converter. Port also serves 8-bit bi-directional port, Converter used. Port pins provide internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. JTAG interface enabled, pull-up resistors pins PF7(TDI), PF5(TMS), PF4(TCK) will activated even reset occurs. Port also serves functions JTAG interface, "Alternate Functions Port page 2.2.9 Port (PG5:PG0) Port 6-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port also serves functions various special features ATmega165P listed page 2.2.10 RESET Reset input. level this longer than minimum pulse length will generate reset, even clock running. minimum pulse length given Table page Shorter pulses guaranteed generate reset. 2.2.11 XTAL1 Input inverting Oscillator amplifier input internal clock operating circuit. 2.2.12 XTAL2 Output from inverting Oscillator amplifier. 2.2.13 AVCC AVCC supply voltage Port Converter. should externally connected VCC, even used. used, should connected through low-pass filter. 2.2.14 AREF This analog reference Converter.
ATmega165P
8019HS-AVR-11/06
ATmega165P
Resources
comprehensive development tools, application notes datasheets available download http://www.atmel.com/avr.
8019HS-AVR-11/06
Register Summary
Address
(0xFF) (0xFE) (0xFD) (0xFC) (0xFB) (0xFA) (0xF9) (0xF8) (0xF7) (0xF6) (0xF5) (0xF4) (0xF3) (0xF2) (0xF1) (0xF0) (0xEF) (0xEE) (0xED) (0xEC) (0xEB) (0xEA) (0xE9) (0xE8) (0xE7) (0xE6) (0xE5) (0xE4) (0xE3) (0xE2) (0xE1) (0xE0) (0xDF) (0xDE) (0xDD) (0xDC) (0xDB) (0xDA) (0xD9) (0xD8) (0xD7) (0xD6) (0xD5) (0xD4) (0xD3) (0xD2) (0xD1) (0xD0) (0xCF) (0xCE) (0xCD) (0xCC) (0xCB) (0xCA) (0xC9) (0xC8) (0xC7) (0xC6) (0xC5) (0xC4) (0xC3) (0xC2) (0xC1) (0xC0)
Name
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved UDR0 UBRR0H UBRR0L Reserved UCSR0C UCSR0B UCSR0A
Page
USART0 Data Register USART0 Baud Rate Register High USART0 Baud Rate Register RXCIE0 RXC0 UMSEL0 TXCIE0 TXC0 UPM01 UDRIE0 UDRE0 UPM00 RXEN0 USBS0 TXEN0 DOR0 UCSZ01 UCSZ02 UPE0 UCSZ00 RXB80 U2X0 UCPOL0 TXB80 MPCM0
ATmega165P
8019HS-AVR-11/06
ATmega165P
Address
(0xBF) (0xBE) (0xBD) (0xBC) (0xBB) (0xBA) (0xB9) (0xB8) (0xB7) (0xB6) (0xB5) (0xB4) (0xB3) (0xB2) (0xB1) (0xB0) (0xAF) (0xAE) (0xAD) (0xAC) (0xAB) (0xAA) (0xA9) (0xA8) (0xA7) (0xA6) (0xA5) (0xA4) (0xA3) (0xA2) (0xA1) (0xA0) (0x9F) (0x9E) (0x9D) (0x9C) (0x9B) (0x9A) (0x99) (0x98) (0x97) (0x96) (0x95) (0x94) (0x93) (0x92) (0x91) (0x90) (0x8F) (0x8E) (0x8D) (0x8C) (0x8B) (0x8A) (0x89) (0x88) (0x87) (0x86) (0x85) (0x84) (0x83) (0x82) (0x81) (0x80) (0x7F) (0x7E)
Name
Reserved Reserved Reserved Reserved Reserved USIDR USISR USICR Reserved ASSR Reserved Reserved OCR2A TCNT2 Reserved TCCR2A Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved OCR1BH OCR1BL OCR1AH OCR1AL ICR1H ICR1L TCNT1H TCNT1L Reserved TCCR1C TCCR1B TCCR1A DIDR1 DIDR0
USISIF USISIE
USIOIF USIOIE
USIPF USIWM1
USIDC USIWM0 EXCLK
USICNT2 USICS0 TCN2UB
USICNT1 USICLK OCR2UB
Page
Data Register USICNT3 USICS1 USICNT0 USITC TCR2UB
Timer/Counter2 Output Compare Register Timer/Counter2 (8-bit) FOC2A WGM20 COM2A1 COM2A0 WGM21 CS22 CS21 CS20
Timer/Counter1 Output Compare Register High Byte Timer/Counter1 Output Compare Register Byte Timer/Counter1 Output Compare Register High Byte Timer/Counter1 Output Compare Register Byte Timer/Counter1 Input Capture Register High Byte Timer/Counter1 Input Capture Register Byte Timer/Counter1 Counter Register High Byte Timer/Counter1 Counter Register Byte FOC1A ICNC1 COM1A1 ADC7D FOC1B ICES1 COM1A0 ADC6D COM1B1 ADC5D WGM13 COM1B0 ADC4D WGM12 ADC3D CS12 ADC2D CS11 WGM11 AIN1D ADC1D CS10 WGM10 AIN0D ADC0D
8019HS-AVR-11/06
Address
(0x7D) (0x7C) (0x7B) (0x7A) (0x79) (0x78) (0x77) (0x76) (0x75) (0x74) (0x73) (0x72) (0x71) (0x70) (0x6F) (0x6E) (0x6D) (0x6C) (0x6B) (0x6A) (0x69) (0x68) (0x67) (0x66) (0x65) (0x64) (0x63) (0x62) (0x61) (0x60) 0x3F (0x5F) 0x3E (0x5E) 0x3D (0x5D) 0x3C (0x5C) 0x3B (0x5B) 0x3A (0x5A) 0x39 (0x59) 0x38 (0x58) 0x37 (0x57) 0x36 (0x56) 0x35 (0x55) 0x34 (0x54) 0x33 (0x53) 0x32 (0x52) 0x31 (0x51) 0x30 (0x50) 0x2F (0x4F) 0x2E (0x4E) 0x2D (0x4D) 0x2C (0x4C) 0x2B (0x4B) 0x2A (0x4A) 0x29 (0x49) 0x28 (0x48) 0x27 (0x47) 0x26 (0x46) 0x25 (0x45) 0x24 (0x44) 0x23 (0x43) 0x22 (0x42) 0x21 (0x41) 0x20 (0x40) 0x1F (0x3F) 0x1E (0x3E) 0x1D (0x3D) 0x1C (0x3C)
Name
Reserved ADMUX ADCSRB ADCSRA ADCH ADCL Reserved Reserved Reserved Reserved Reserved Reserved Reserved TIMSK2 TIMSK1 TIMSK0 Reserved PCMSK1 PCMSK0 Reserved EICRA Reserved Reserved OSCCAL Reserved Reserved Reserved CLKPR WDTCR SREG Reserved Reserved Reserved Reserved Reserved SPMCSR Reserved MCUCR MCUSR SMCR Reserved OCDR ACSR Reserved SPDR SPSR SPCR GPIOR2 GPIOR1 Reserved Reserved OCR0A TCNT0 Reserved TCCR0A GTCCR EEARH EEARL EEDR EECR GPIOR0 EIMSK EIFR
REFS1 ADEN
REFS0 ACME ADSC
ADLAR ADATE
MUX4 ADIF
MUX3 ADIE
MUX2 ADTS2 ADPS2
MUX1 ADTS1 ADPS1
MUX0 ADTS0 ADPS0
Page
208,
Data Register High byte Data Register byte PCINT15 PCINT7 CLKPCE PCINT14 PCINT6 ICIE1 PCINT13 PCINT5 PCINT12 PCINT4 WDCE PCINT11 PCINT3 PRTIM1 CLKPS3 OCIE1B PCINT10 PCINT2 PRSPI CLKPS2 WDP2 SP10 OCIE2A OCIE1A OCIE0A PCINT9 PCINT1 ISC01 PRUSART0 CLKPS1 WDP1 TOIE2 TOIE1 TOIE0 PCINT8 PCINT0 ISC00
Oscillator Calibration Register PRADC CLKPS0 WDP0
SPMIE IDRD/OCD SPIF SPIE
RWWSB OCDR6 ACBG WCOL
OCDR5 DORD
RWWSRE JTRF OCDR4 MSTR
BLBSET WDRF OCDR3 ACIE
PGWRT BORF OCDR2 ACIC CPHA
PGERS IVSEL EXTRF OCDR1 ACIS1 SPR1
SPMEN IVCE PORF OCDR0 ACIS0
Data Register CPOL SPI2X SPR0
General Purpose Register General Purpose Register
Timer/Counter0 Output Compare Register Timer/Counter0 Bit) FOC0A WGM00 COM0A1 COM0A0 WGM01 CS02 CS01 PSR2 CS00 PSR10 EEAR8
132,
EEPROM Address Register Byte EEPROM Data Register PCIE1 PCIF1 PCIE0 PCIF0 EERIE EEMWE EEWE EERE INT0 INTF0 General Purpose Register
ATmega165P
8019HS-AVR-11/06
ATmega165P
Address
0x1B (0x3B) 0x1A (0x3A) 0x19 (0x39) 0x18 (0x38) 0x17 (0x37) 0x16 (0x36) 0x15 (0x35) 0x14 (0x34) 0x13 (0x33) 0x12 (0x32) 0x11 (0x31) 0x10 (0x30) 0x0F (0x2F) 0x0E (0x2E) 0x0D (0x2D) 0x0C (0x2C) 0x0B (0x2B) 0x0A (0x2A) 0x09 (0x29) 0x08 (0x28) 0x07 (0x27) 0x06 (0x26) 0x05 (0x25) 0x04 (0x24) 0x03 (0x23) 0x02 (0x22) 0x01 (0x21) 0x00 (0x20)
Name
Reserved Reserved Reserved Reserved TIFR2 TIFR1 TIFR0 PORTG DDRG PING PORTF DDRF PINF PORTE DDRE PINE PORTD DDRD PIND PORTC DDRC PINC PORTB DDRB PINB PORTA DDRA PINA
PORTF7 DDF7 PINF7 PORTE7 DDE7 PINE7 PORTD7 DDD7 PIND7 PORTC7 DDC7 PINC7 PORTB7 DDB7 PINB7 PORTA7 DDA7 PINA7
PORTF6 DDF6 PINF6 PORTE6 DDE6 PINE6 PORTD6 DDD6 PIND6 PORTC6 DDC6 PINC6 PORTB6 DDB6 PINB6 PORTA6 DDA6 PINA6
ICF1 PORTG5 DDG5 PING5 PORTF5 DDF5 PINF5 PORTE5 DDE5 PINE5 PORTD5 DDD5 PIND5 PORTC5 DDC5 PINC5 PORTB5 DDB5 PINB5 PORTA5 DDA5 PINA5
PORTG4 DDG4 PING4 PORTF4 DDF4 PINF4 PORTE4 DDE4 PINE4 PORTD4 DDD4 PIND4 PORTC4 DDC4 PINC4 PORTB4 DDB4 PINB4 PORTA4 DDA4 PINA4
PORTG3 DDG3 PING3 PORTF3 DDF3 PINF3 PORTE3 DDE3 PINE3 PORTD3 DDD3 PIND3 PORTC3 DDC3 PINC3 PORTB3 DDB3 PINB3 PORTA3 DDA3 PINA3
OCF1B PORTG2 DDG2 PING2 PORTF2 DDF2 PINF2 PORTE2 DDE2 PINE2 PORTD2 DDD2 PIND2 PORTC2 DDC2 PINC2 PORTB2 DDB2 PINB2 PORTA2 DDA2 PINA2
OCF2A OCF1A OCF0A PORTG1 DDG1 PING1 PORTF1 DDF1 PINF1 PORTE1 DDE1 PINE1 PORTD1 DDD1 PIND1 PORTC1 DDC1 PINC1 PORTB1 DDB1 PINB1 PORTA1 DDA1 PINA1
TOV2 TOV1 TOV0 PORTG0 DDG0 PING0 PORTF0 DDF0 PINF0 PORTE0 DDE0 PINE0 PORTD0 DDD0 PIND0 PORTC0 DDC0 PINC0 PORTB0 DDB0 PINB0 PORTA0 DDA0 PINA0
Page
Note:
compatibility with future devices, reserved bits should written zero accessed. Reserved memory addresses should never written. Registers within address range 0x00 0x1F directly bit-accessible using instructions. these registers, value single bits checked using SBIS SBIC instructions. Some Status Flags cleared writing logical them. Note that, unlike most other AVRs, instructions will only operate specified bit, therefore used registers containing such Status Flags. instructions work with registers 0x00 0x1F only. When using specific commands OUT, addresses 0x00 0x3F must used. When addressing Registers data space using instructions, 0x20 must added these addresses. ATmega165P complex microcontroller with more peripheral units than supported within location reserved Opcode instructions. Extended space from 0x60 0xFF SRAM, only ST/STS/STD LD/LDS/LDD instructions used.
8019HS-AVR-11/06
Instruction Summary
Mnemonics
ADIW SUBI SBCI SBIW ANDI MULS MULSU FMUL FMULS FMULSU RJMP IJMP RCALL ICALL CALL RETI CPSE SBRC SBRS SBIC SBIS BRBS BRBC BREQ BRNE BRCS BRCC BRSH BRLO BRMI BRPL BRGE BRLT BRHS BRHC BRTS BRTC BRVS Rd,Rr Rd,Rr Rd,Rr Rd,K
Operands
Rdl,K Rdl,K Rd,K Rd,K Registers
Description
Operation
Flags
Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,C,N,V Z,C,N,V,H Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V None None None None None None None None None N,V,C,H N,V,C,H N,V,C,H None None None None None None None None None None None None None None None None None None None None None
#Clocks
1/2/3 1/2/3 1/2/3 1/2/3 1/2/3
ARITHMETIC LOGIC INSTRUCTIONS with Carry Registers Immediate Word Subtract Registers Subtract Constant from Register Subtract with Carry Registers Subtract with Carry Constant from Reg. Subtract Immediate from Word Logical Registers Logical Register Constant Logical Registers Logical Register Constant Exclusive Registers One's Complement Two's Complement Bit(s) Register Clear Bit(s) Register Increment Decrement Test Zero Minus Clear Register Register Multiply Unsigned Multiply Signed Multiply Signed with Unsigned Fractional Multiply Unsigned Fractional Multiply Signed Fractional Multiply Signed with Unsigned Relative Jump Indirect Jump Direct Jump Relative Subroutine Call Indirect Call Direct Subroutine Call Subroutine Return Interrupt Return Compare, Skip Equal Compare Compare with Carry Compare Register with Immediate Skip Register Cleared Skip Register Skip Register Cleared Skip Register Branch Status Flag Branch Status Flag Cleared Branch Equal Branch Equal Branch Carry Branch Carry Cleared Branch Same Higher Branch Lower Branch Minus Branch Plus Branch Greater Equal, Signed Branch Less Than Zero, Signed Branch Half Carry Flag Branch Half Carry Flag Cleared Branch Flag Branch Flag Cleared Branch Overflow Flag Rdh:Rdl Rdh:Rdl Rdh:Rdl Rdh:Rdl 0xFF 0x00 (0xFF 0xFF R1:R0 R1:R0 R1:R0
R1:R0 R1:R0
STACK STACK (Rr(b)=0) (Rr(b)=1) (P(b)=0) (P(b)=1) (SREG(s) then PCPC+k (SREG(s) then PCPC+k then then then then then then then then then then then then then then then
R1:R0
BRANCH INSTRUCTIONS
ATmega165P
8019HS-AVR-11/06
ATmega165P
Mnemonics
BRVC BRIE BRID SWAP BSET BCLR DATA TRANSFER INSTRUCTIONS MOVW Rd,Y+q Y+q,Rr Z+q,Rr Move Between Registers Copy Register Word Load Immediate Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Direct from SRAM Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Direct SRAM Load Program Memory Load Program Memory Load Program Memory Post-Inc Store Program Memory Port Port Rd+1:Rd Rr+1:Rr (X), (Y), (Z), (Z), R1:R0 None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None
Operands
Description
Branch Overflow Flag Cleared Branch Interrupt Enabled Branch Interrupt Disabled Register Clear Register Logical Shift Left Logical Shift Right Rotate Left Through Carry Rotate Right Through Carry Arithmetic Shift Right Swap Nibbles Flag Flag Clear Store from Register load from Register Carry Clear Carry Negative Flag Clear Negative Flag Zero Flag Clear Zero Flag Global Interrupt Enable Global Interrupt Disable Signed Test Flag Clear Signed Test Flag Twos Complement Overflow. Clear Twos Complement Overflow SREG Clear SREG Half Carry Flag SREG Clear Half Carry Flag SREG
Operation
then then then I/O(P,b) I/O(P,b) Rd(n+1) Rd(n), Rd(0) Rd(n) Rd(n+1), Rd(7) Rd(0)C,Rd(n+1) Rd(n),CRd(7) Rd(7)C,Rd(n) Rd(n+1),CRd(0) Rd(n) Rd(n+1), n=0.6 Rd(3.0)Rd(7.4),Rd(7.4)Rd(3.0) SREG(s) SREG(s) Rr(b) Rd(b)
Flags
None None None None None Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V None SREG(s) SREG(s) None
#Clocks
BIT-TEST INSTRUCTIONS
8019HS-AVR-11/06
Mnemonics
PUSH SLEEP BREAK
Operands
Push Register Stack
Description
STACK STACK Register from Stack Operation Sleep Watchdog Reset Break
Operation
Flags
None None None
#Clocks
CONTROL INSTRUCTIONS (see specific descr. Sleep function) (see specific descr. WDR/timer) On-chip Debug Only None None None
ATmega165P
8019HS-AVR-11/06
ATmega165P
Ordering Information
Speed (MHz)(3) Notes: Power Supply 5.5V 5.5V Ordering Code(2) ATmega165PV-8AU ATmega165PV-8MU ATmega165P-16AU ATmega165P-16MU Package(1) 64M1 64M1 Operation Range Industrial (-40°C 85°C) Industrial (-40°C 85°C)
This device also supplied wafer form. Please contact your local Atmel sales office detailed ordering information minimum quantities. Pb-free packaging, complies European Directive Restriction Hazardous Substances (RoHS directive). Also Halide free fully Green. Speed VCC, Figure 26-2 page Figure 26-3 page 308.
Package Type 64M1 64-Lead, Thin (1.0 Plastic Gull Wing Quad Flat Package (TQFP) 64-pad, body, lead pitch 0.50 Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
8019HS-AVR-11/06
Packaging Information
IDENTIFIER
0°~7°
COMMON DIMENSIONS (Unit Measure SYMBOL 0.05 0.95 15.75 13.90 15.75 13.90 0.30 0.09 0.45 1.00 16.00 14.00 16.00 14.00 0.80 1.20 0.15 1.05 16.25 14.10 16.25 14.10 0.45 0.20 0.75 Note Note NOTE
Notes:
This package conforms JEDEC reference MS-026, Variation AEB. Dimensions include mold protrusion. Allowable protrusion 0.25 side. Dimensions maximum plastic body size dimensions including mold mismatch. Lead coplanarity 0.10 maximum.
10/5/2001 2325 Orchard Parkway Jose, 95131 TITLE 64A, 64-lead, Body Size, Body Thickness, Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) DRAWING REV.
ATmega165P
8019HS-AVR-11/06
ATmega165P
64M1
Marked Pin#
VIEW
SEATING PLANE
Corner
0.08
SIDE VIEW
Option
Triangle
COMMON DIMENSIONS (Unit Measure SYMBOL
Option
Chamfer 0.30)
0.80 0.18 8.90 5.20 8.90 5.20
0.90 0.02 0.25 9.00 5.40 9.00 5.40 0.50
1.00 0.05 0.30 9.10 5.60 9.10 5.60
NOTE
Option
Notch (0.20
BOTTOM VIEW
0.35 1.25
0.40 1.40
0.45 1.55
Note: JEDEC Standard MO-220, (SAW Singulation) Fig. VMMD. Dimension tolerance conform ASMEY14.5M-1994.
5/25/06 2325 Orchard Parkway Jose, 95131 TITLE 64M1, 64-pad, Body, Lead Pitch 0.50 5.40 Exposed Pad, Micro Lead Frame Package (MLF) DRAWING 64M1 REV.
8019HS-AVR-11/06
Errata
ATmega165P Rev.
known errata.
ATmega165P Rev.
sampled.
ATmega165P
8019HS-AVR-11/06
ATmega165P
Datasheet Revision History
Please note that referring page numbers this section referring this document. referring revision this section referring document revision.
Rev. 11/06
Updated "Low-frequency Crystal Oscillator" page Updated Table 26-6 page 307. Updated note Table 26-6 page 307.
Rev. 09/06
Updated "Calibrated Internal Oscillator" page Updated "System Control Reset" page Updated Table page Table 7-10 page Added note Table 25-15 page Updated "Parallel Programming Characteristics" page 282. Updated "Electrical Characteristics" page 301.
Rev. 08/06
Updated Table 1s2-12 page Updated Characteristics" page 304.
Rev. 08/06
Updated "Low-frequency Crystal Oscillator" page Updated "Device Identification Register" page 236. Updated "Signature Bytes" page 275. Added Table 25-6 page 275.
Rev. 07/06
Updated "Register Description I/O-Ports" page Updated "Fast Mode" page Updated "Fast Mode" page 115. Updated Features "USI Universal Serial Interface" page 194. Added "Clock speed considerations." page 201.
8019HS-AVR-11/06
Updated Table 13-2 page Table 13-4 page Table 14-2 page 123,Table 14-3 page 124, Table 14-4 page 125, Table 16-2 page Table 16-4 page 149. Updated "UCSRnC USART Control Status Register page 187. Updated "Register Summary" page 348.
Rev. 06/06
Updated typos. Updated "Calibrated Internal Oscillator" page Updated "OSCCAL Oscillator Calibration Register" page Added Table 26-5 page 312.
Rev. 04/06
Updated "Calibrated Internal Oscillator" page Updated "Sleep Modes" page
Rev. 03/06
Initial revision.
ATmega165P
8019HS-AVR-11/06
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8019HS-AVR-11/06

8-bit Microcontroller with Bytes In-System Programmable Flash ATmega16

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