Rail-to-Rail Gain Bandwidth Product: (typ.) Supply Current: (typ.

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Rail-to-Rail Gain Bandwidth Product: (typ.) Supply Current: (typ.

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MCP6241/2/4
Rail-to-Rail
Gain Bandwidth Product: (typ.) Supply Current: (typ.) Supply Voltage: 1.8V 5.5V Rail-to-Rail Input/Output Extended Temperature Range: -40°C +125°C Available 5-pin SC-70 SOT-23 packages
Description
Microchip Technology Inc. MCP6241/2/4 operational amplifiers amps) provide wide bandwidth quiescent current. MCP6241/2/4 Gain Bandwidth Product (GBWP) (typ.) phase margin. This family operates from single supply voltage 1.8V, while drawing (typ.) quiescent current. addition, MCP6241/2/4 family supports rail-to-rail input output swing, with common mode input voltage range These amps designed Microchip's advanced CMOS processes.
Applications
Automotive Portable Equipment Photodiode (Transimpedance) Amplifier Analog Filters Notebooks PDAs Battery-Powered Systems
Package Types
MCP6241 SOT-23-5
VOUT VIN+
MCP6241 PDIP, SOIC, MSOP
VIN- VIN- VIN+ VOUT
Available Tools
SPICE Macro Models www.microchip.com) FilterLab® Software www.microchip.com)
MCP6241R
MCP6242 PDIP, SOIC, MSOP
VOUTA VINA
Typical Application
VIN2 VIN1 MCP6241 VOUT
VOUT VIN+
SOT-23-5
VOUTB VINB_ VINB+
VIN-
VINA+
MCP6241U SC-70-5, SOT-23-5
VIN+ VIN-
MCP6244 PDIP, SOIC, TSSOP
VOUTA VINA- VOUTD VIND- VIND+ VINC+ VOUTC
VOUT VINA+
Summing Amplifier Circuit
VINB+ VINB- VOUTB
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability.
Absolute Maximum Ratings
.7.0V Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current .continuous Current Input Pins Current Output Supply Pins .±30 Storage Temperature.-65°C +150°C Maximum Junction Temperature (TJ) +150°C Protection Pins (HBM;MM) 300V
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VDD/2 VOUT VDD/2. Parameters Input Offset Input Offset Voltage Extended Temperature Input Offset Drift with Temperature Power Supply Rejection Input Bias Current Impedance Input Bias Current: Temperature Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Range Common Mode Rejection Ratio Open-Loop Gain Open-Loop Gain (large signal) Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier Note: 0.5V VOL, 0.5V Output Overdrive 1.8V 5.5V VOUT 0.3V 0.3V, VCMR CMRR -0.3V 5.3V, ZDIFF ±1.0 1100 ±1.0 1013||6 1013||3 ||pF ||pF +85°C +125°C VOS/TA PSRR -5.0 -7.0 ±3.0 +5.0 +7.0 -40°C +125°C, (Note) Units Conditions
µV/°C -40°C +125°C,
SC-70 package only tested +25°C.
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, +25°C, +1.8 5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVP-P nV/Hz fA/Hz GBWP 0.30 V/µs Units Conditions
TEMPERATURE CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, +1.8V +5.5V GND. Parameters Temperature Ranges Extended Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-MSOP Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W +125 +125 +150 (Note) Units Conditions
internal Junction Temperature (TJ) must exceed Absolute Maximum specification +150°C.
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
Note:
TYPICAL PERFORMANCE CURVES
graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range.
Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
CMRR, PSRR (dB)
Percentage Occurrences
Samples
PSRR (VCM VSS)
CMRR (VCM -0.3V +5.3V, 5.0V) Ambient Temperature (°C)
Input Offset Voltage (mV)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4: Temperature.
Open-Loop Gain (dB)
CMRR, PSRR Ambient
PSRR, CMRR (dB) 1.E+01 1.E+02 1.E+03 1.E+04 Frequency (Hz) 100k 1.E+05 PSRR+ PSRRCMRR
Gain Open-Loop Phase 10.0 VDD/2 Phase -120 -150 -180 -210 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 100k 1.E+ Frequency (Hz)
1.E- 1.E+ 1.E+
FIGURE 2-2: Frequency.
Percentage Occurrences
PSRR, CMRR
FIGURE 2-5: Frequency.
Samples VDD/2 +125°C
Open-Loop Gain, Phase
Percentage Occurrences
Samples VDD/2 +85°C
Input Bias Current (pA)
Input Bias Current (nA)
FIGURE 2-3:
Input Bias Current +85°C.
FIGURE 2-6:
Input Bias Current +125°C.
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
10,000 Input Noise Voltage Density (nV/
1,000
100k 1.E-01 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 Frequency (Hz)
Percentage Occurrences
Samples -40°C +125°C
Input Offset Voltage Drift (µV/°C)
FIGURE 2-7: Frequency.
Input Offset Voltage (µV)
Input Noise Voltage Density
FIGURE 2-10:
Input Offset Voltage Drift.
Input Offset Voltage (µV)
1.8V
-100 -200 -300 -0.4 -0.2 -40°C +25°C +85°C +125°C
1.8V
5.5V
Output Voltage
Common Mode Input Voltage
FIGURE 2-8: Input Offset Voltage Common Mode Input Voltage 1.8V.
Input Offset Voltage (µV) 5.5V -100 -200 -0.5 Common Mode Input Voltage -40°C +25°C +85°C +125°C
FIGURE 2-11: Output Voltage.
Input Offset Voltage
Short Circuit Current (mA)
+ISC
+125°C +85°C +25°C -40°C
-ISC Power Supply Voltage
FIGURE 2-9: Input Offset Voltage Common Mode Input Voltage 5.5V.
FIGURE 2-12: Output Short-Circuit Current Ambient Temperature.
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2
0.50 0.45 Slew Rate (V/µs) 0.40 0.35 0.30 0.25 0.20 0.15 0.10 Ambient Temperature (°C)
Time µs/div)
1.8V Rising Edge Falling Edge
FIGURE 2-13: Temperature.
1,000 Output Voltage Headroom (mV)
Slew Rate Ambient
FIGURE 2-16: Pulse Response.
Output Voltage
Output Voltage mV/div)
5.5V
Small-Signal, Non-Inverting
5.0V
1.E-02
100µ 1.E-01 1.E+00 Output Current Magnitude
1.E+01
Time µs/div)
FIGURE 2-14: Output Voltage Headroom Output Current Magnitude.
Max. Output Voltage Swing (VP-P) 5.5V 1.8V
FIGURE 2-17: Pulse Response.
Quiescent Current Amplifier (µA)
Large-Signal, Non-Inverting
0.9VDD
+125°C +85°C +25°C -40°C Power Supply Voltage
1.E+03
100k 1.E+04 1.E+05 Frequency (Hz)
1.E+06
FIGURE 2-15: Maximum Output Voltage Swing Frequency.
FIGURE 2-18: Quiescent Current Power Supply Voltage.
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
DESCRIPTIONS
Descriptions pins listed Table (single amps) Table (dual quad amps).
TABLE 3-1:
FUNCTION TABLE SINGLE AMPS
MCP6241 (SOT-23-5) MCP6241R (SOT-23-5) MCP6241U (SOT-23-5) Symbol VOUT VIN- VIN+ Description Analog Output Inverting Input Non-inverting Input Positive Power Supply Negative Power Supply Internal Connection
MCP6241 (PDIP, SOIC, MSOP)
TABLE 3-2:
MCP6242
FUNCTION TABLE DUAL QUAD AMPS
MCP6244 Symbol VOUTA VINA- VINA+ VINB+ VINB- VOUTB VOUTC VINC- VINC+ VIND+ VIND- VOUTD Description Analog Output Inverting Input Non-inverting Input Positive Power Supply Non-inverting Input Inverting Input Analog Output Analog Output Inverting Input Non-inverting Input Negative Power Supply Non-inverting Input Inverting Input Analog Output
Analog Outputs
Power Supply (VSS VDD)
output pins low-impedance voltage sources.
Analog Inputs
positive power supply (VDD) 1.8V 5.5V higher than negative power supply (VSS). normal operation, other pins between VDD. Typically, these parts used single-(positive) supply configuration. this case, connected ground connected supply. will need local bypass capacitor (typically 0.01 within pin. These parts share bulk capacitor (typically with other nearby analog parts; needs within pin.
non-inverting inverting inputs highimpedance CMOS inputs with bias currents.
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
APPLICATION INFORMATION
MCP624X VOUT MCP6241/2/4 family amps manufactured using Microchip's state-of-the-art CMOS process specifically designed low-power generalpurpose applications. supply voltage, quiescent current wide bandwidth makes MCP6241/2/4 ideal battery-powered applications.
Rail-to-Rail Inputs
Maximum expected Minimum expected
MCP6241/2/4 amps designed prevent phase reversal when input pins exceed supply voltages. Figure shows input voltage exceeding supply voltage without phase reversal.
Input, Output Voltage Time ms/div) VOUT 5.0V
FIGURE 4-2: Resistor (RIN).
Input Current-Limiting
Rail-to-Rail Output
output voltage range MCP6241/2/4 amps (max.) (min.) when connected VDD/2 5.5V. Refer Figure 2-14 more information.
Capacitive Loads
FIGURE 4-1: Phase Reversal.
MCP6241/2/4 Show
input stage MCP6241/2/4 amps differential input stages parallel. operates common mode input voltage (VCM) other high VCM. With this topology, device operates with above below VSS. Input Offset Voltage measured ensure proper operation. Input voltages that exceed input voltage range (VSS 0.3V 0.3V 25°C) cause excessive current flow into input pins. Current beyond cause reliability problems. Applications that exceed this rating must externally limited with resistor, shown Figure 4-2.
Driving large capacitive loads cause stability problems voltage-feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain peaking frequency response, with overshoot ringing step response. unity-gain buffer most sensitive capacitive loads, gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-3) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load.
MCP624X
RISO VOUT
FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads.
Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, signal gain equal. inverting gains, |Signal Gain| (e.g., gives V/V).
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
1.E+04 Recommended RISO
Surface Leakage
1.E+03
applications where input bias current critical, (printed circuit board) surface leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current flow, which greater than MCP6241/2/4 family's bias current 25°C typ.). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. example this type layout shown Figure 4-6. VINVIN+
1.E+02 100p 1.E+01 1.E+02 1.E+03 1.E+04 Normalized Load Capacitance; CL/GN
FIGURE 4-4: Recommended RISO Values Capacitive Loads.
After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Evaluation bench simulations with MCP6241/2/4 SPICE macro model very helpful. Modify RISO's value until response reasonable.
Supply Bypass
Guard Ring
With this amp, power supply (VDD single-supply) should have local bypass capacitor (i.e., 0.01 within good highfrequency performance. bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with other nearby analog parts.
FIGURE 4-6: Inverting Gain.
Example Guard Ring Layout
Unused Amps
unused quad package (MCP6244) should configured shown Figure 4-5. Both circuits prevent output from toggling causing crosstalk. Circuit reference voltage between supplies, provides buffered voltage, minimizes supply current draw unused amp. Circuit minimizes number components, draw little more supply current unused amp.
MCP6244
MCP6244
Non-inverting Gain Unity-Gain Buffer: Connect non-inverting (VIN+) input with wire that does touch surface. Connect guard ring inverting input (VIN-). This biases guard ring common mode input voltage. Inverting Gain Transimpedance Amplifiers (convert current voltage, such photo detectors): Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface.
FIGURE 4-5:
Unused Amps.
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
4.7.1
Application Circuits
MATCHING IMPEDANCE INPUTS
4.7.2
COMPENSATING PARASITIC CAPACITANCE
minimize effect offset voltage amplifier circuit, impedances inverting noninverting inputs need matched. This done choosing circuit resistor values that total resistance each input same. Figure shows summing amplifier circuit.
VIN2 VIN1 MCP624X VOUT
analog circuit design, parasitic capacitance compromise circuit behavior; Figure shows typical scenario. input amplifier sees parasitic capacitance several picofarad (CPARA, which includes common mode capacitance typical) large frequency response circuit will include zero. This parasitic zero introduces gain peaking cause circuit instability.
MCP624X VOUT
CPARA
CPARA
FIGURE 4-7:
Summing Amplifier Circuit.
match inputs, voltage sources ground calculate total resistance input nodes. this summing amplifier circuit, resistance inverting input calculated setting VIN1, VIN2 VOUT ground. this case, RG1, parallel. total resistance inverting input Where: RVIN- total resistance inverting input non-inverting input, only voltage source. When ground, both parallel. total resistance non-inverting input Where: RVIN+ total resistance inverting input minimize offset voltage increase circuit accuracy, resistor values need meet condition:
FIGURE 4-8: Effect Parasitic Capacitance Input.
solution smaller resistor values push zero higher frequency. Another solution compensate introducing pole point which zero occurs. This done adding parallel with feedback resistor (RF). needs selected that ratio CPARA:CF equal ratio RF:RG
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
DESIGN TOOLS
Microchip provides basic design tools needed MCP6241/2/4 family amps.
SPICE Macro Model
latest SPICE macro model MCP6241/2/4 amps available site www.microchip.com. This model intended initial design tool that works well amp's linear region operation room temperature. macro model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves.
FilterLab® Software
Microchip's FilterLab software innovative tool that simplifies analog active-filter (using amps) design. Available cost from site www.microchip.com, FilterLab design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance.
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
PACKAGING INFORMATION
Package Marking Information
5-Lead SC-70 (MCP6241U Only) Example:
(Front) (Back)
XXNN
(Front) (Back)
Example:
AT25
5-Lead SOT-23
Device MCP6241 MCP6241R MCP6241U BRNN BSNN
Code BQNN
XXNN
BQ25
Note:
Applies 5-Lead SOT-23.
8-Lead MSOP XXXXXX YWWNNN
Example: 6242E 546256
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example: MCP6242 ^^256 0546
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW
Example: MCP6242E SN^^ 0546
Legend: XX.X
Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package.
Note:
event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information.
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6244) Example:
XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN
MCP6244 E/P^^ 0546256
14-Lead SOIC (150 mil) (MCP6244)
Example:
XXXXXXXXXX XXXXXXXXXX YYWWNNN
MCP6244 E/SL^^ 0546256
14-Lead TSSOP (MCP6244)
Example:
XXXXXXXX YYWW
6244E 0546
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
5-Lead Plastic Small Outline Transistor Package (LT) (SC-70)
Units Dimension Limits INCHES .026 (BSC) MILLIMETERS* 0.65 (BSC) 0.80 0.80 0.00 1.80 1.15 1.80 0.10 0.10 0.10 0.15
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Molded Lead Shoulder Lead Thickness Lead Width
.031 .031 .000 .071 .045 .071 .004 .004 .004 .006
.043 .039 .004 .094 .053 .087 .012 .016 .007 .012
1.10 1.00 0.10 2.40 1.35 2.20 0.30 0.40 0.18 0.30
*Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. JEITA (EIAJ) Standard: SC-70
Drawing C04-061
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
Number Pins Pitch Outside lead pitch (basic) Overall Height .035 .057 0.90 Molded Package Thickness .035 .051 0.90 Standoff .000 .006 0.00 Overall Width .102 .118 2.60 Molded Package Width .059 .069 1.50 Overall Length .110 .122 2.80 Foot Length .014 .022 0.35 Foot Angle Lead Thickness .004 .008 0.09 Lead Width .014 .020 0.35 Mold Draft Angle Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. EIAJ Equivalent: SC-74A
Drawing C04-091
Units Dimension Limits
INCHES* .038 .075 .046 .043 .003 .110 .064 .116 .018 .006 .017
MILLIMETERS 0.95 1.90 1.18 1.10 0.08 2.80 1.63 2.95 0.45 0.15 0.43
1.45 1.30 0.15 3.00 1.75 3.10 0.55 0.20 0.50
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
Number Pins Pitch .043 Overall Height .030 .037 Molded Package Thickness .000 .006 Standoff Overall Width Molded Package Width Overall Length .016 .031 Foot Length Footprint (Reference) Foot Angle Lead Thickness .003 .009 .009 .016 Lead Width Mold Draft Angle Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MO-187
Drawing C04-111
Units Dimension Limits
INCHES .026 .033 .193 TYP. .118 .118 .024 .037 .006 .012
MILLIMETERS* 0.65 0.75 0.85 0.00 4.90 3.00 3.00 0.40 0.60 0.95 0.08 0.22
1.10 0.95 0.15
0.80 0.23 0.40
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
8-Lead Plastic Dual In-line (PDIP)
Number Pins Pitch Seating Plane Molded Package Thickness Base Seating Plane Shoulder Shoulder Width Molded Package Width Overall Length Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Spacing Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
INCHES* .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370
.140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430
MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-018
2005 Microchip Technology Inc.
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MCP6241/2/4
8-Lead Plastic Small Outline (SN) Narrow, (SOIC)
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
.053 .052 .004 .228 .146 .189 .010 .019 .008 .013
INCHES* .050 .061 .056 .007 .237 .154 .193 .015 .025 .009 .017
.069 .061 .010 .244 .157 .197 .020 .030 .010 .020
MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0.20 0.23 0.33 0.42
1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 0.25 0.51
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-057
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
14-Lead Plastic Dual In-line (PDIP)
Number Pins Pitch Seating Plane .140 .170 Molded Package Thickness .115 .145 Base Seating Plane .015 Shoulder Shoulder Width .300 .313 .325 Molded Package Width .240 .250 .260 Overall Length .740 .750 .760 Seating Plane .125 .130 .135 Lead Thickness .008 .012 .015 Upper Lead Width .045 .058 .070 Lower Lead Width .014 .018 .022 Overall Spacing .310 .370 .430 Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-005
Units Dimension Limits
INCHES* .100 .155 .130
MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40
4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
14-Lead Plastic Small Outline (SL) Narrow, (SOIC)
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
.053 .052 .004 .228 .150 .337 .010 .016 .008 .014
INCHES* .050 .061 .056 .007 .236 .154 .342 .015 .033 .009 .017
.069 .061 .010 .244 .157 .347 .020 .050 .010 .020
MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0.20 0.23 0.36 0.42
1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 0.25 0.51
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-065
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
14-Lead Plastic Thin Shrink Small Outline (ST) (TSSOP)
Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic
Units Dimension Limits
INCHES .026 .035 .004 .251 .173 .197 .024 .006 .010
.033 .002 .246 .169 .193 .020 .004 .007
.043 .037 .006 .256 .177 .201 .028 .008 .012
MILLIMETERS* 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0.09 0.15 0.20 0.19 0.25 0.30
Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. JEDEC Equivalent: MO-153 Drawing C04-087
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
NOTES:
DS21882C-page
2005 Microchip Technology Inc.
MCP6241/2/4
APPENDIX REVISION HISTORY
Revision (March 2005)
following list modifications: Added MCP6244 quad amp. Re-compensated parts. Specifications that change are: Gain Bandwidth Product (BWP) Phase Margin (PM) Electrical Characteristics table. Corrected plots Section "Typical Performance Curves". Added Section "Pin Descriptions". Added SC-70 package markings. Added PDIP-14, SOIC-14, TSSOP-14 packages corrected package marking information (Section "Packaging Information"). Added Appendix "Revision History".
Revision (August 2004) Revision (March 2004)
Original Release this Document.
2005 Microchip Technology Inc.
DS21882C-page
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NOTES:
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2005 Microchip Technology Inc.
MCP6241/2/4
PRODUCT IDENTIFICATION SYSTEM
order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Tape Reel and/or Alternate Pinout
MCP6241: MCP6241T: MCP6241RT: MCP6241UT: MCP6242: MCP6242T: MCP6244: MCP6244T:
Examples: Extended Temp., SOIC package. MCP6241-E/MS: Extended Temp., MSOP package. MCP6241-E/P: Extended Temp., PDIP package. MCP6241RT-E/OT: Tape Reel, Extended Temp., SOT-23 package MCP6241UT-E/OT: Tape Reel, Extended Temp., SOT-23 package. MCP6241UT-E/LT: Tape Reel, Extended Temp., SC-70 package. MCP6242-E/SN: MCP6242-E/MS: MCP6242-E/P: MCP6242T-E/SN: Extended Temp., SOIC package. Extended Temp., MSOP package. Extended Temp., PDIP package. Tape Reel, Extended Temp., SOIC package. Extended Temp., 14LD PDIP package. Extended Temp., 14LD SOIC package. Extended Temp., 14LD TSSOP package. Tape Reel, Extended Temp., 14LD SOIC package. Tape Reel, Extended Temp., 14LD TSSOP package. MCP6241-E/SN:
Temperature Package Range
Device:
Single (MSOP, PDIP, SOIC) Single (Tape Reel) (MSOP, SOIC, SOT-23) Single (Tape Reel) (SOT-23) Single (Tape Reel) (SC-70, SOT-23) Dual Dual (Tape Reel) (MSOP, SOIC) Quad Quad (Tape Reel) (SOIC, TSSOP)
Temperature Range:
-40°C +125°C
Package:
Plastic Package (SC-70), 5-lead (MCP6241U only) Plastic Micro Small Outline (MSOP), 8-lead Plastic (300 Body), 8-lead, 14-lead Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6241, MCP6241R, MCP6241U) Plastic SOIC (150 Body), 8-lead Plastic SOIC (150 Body), 14-lead Plastic TSSOP (4.4 Body), 14-lead
MCP6244-E/P: MCP6244-E/SL: MCP6244-E/ST:
MCP6244T-E/SL:
MCP6244T-E/ST:
2005 Microchip Technology Inc.
DS21882C-page
MCP6241/2/4
NOTES:
DS21882C-page
2005 Microchip Technology Inc.
Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable."
Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act.
Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip's products critical components life support systems authorized except with express written approval Microchip. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights.
Trademarks Microchip name logo, Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, MATE, PowerSmart, rfPIC, SmartShunt registered trademarks Microchip Technology Incorporated U.S.A. other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance WiperLock trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2005, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona Mountain View, California October 2003. Company's quality system processes procedures PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified.
2005 Microchip Technology Inc.
DS21882C-page
WORLDWIDE SALES SERVICE
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03/01/05
DS21882C-page
2005 Microchip Technology Inc.

Rail-to-Rail Gain Bandwidth Product: (typ.) Supply Current: (typ.

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