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2.3V 5.5V Micropower Bi-CMOS Amps Input Offset Voltage: ±150 (max
Top Searches for this datasheetMCP616/7/8/9 2.3V 5.5V Micropower Bi-CMOS Amps Input Offset Voltage: ±150 (max.) Noise: µVP-P (typ., Rail-to-Rail Output Input Offset Current: (typ.) Quiescent Current: (max.) Power Supply Voltage: 2.3V 5.5V Unity Gain Stable Chip Select (CS) Capability: MCP618 Industrial Temperature Range: -40°C +85°C Phase Reversal Available Single, Dual Quad Packages Description MCP616/7/8/9 family operational amplifiers amps) from Microchip Technology Inc. capable precision, low-power, single-supply operation. These amps unity-gain stable, have input offset voltage (±150 max.), rail-to-rail output swing input offset current (0.3 typ.). These features make this family amps well suited batterypowered applications. single MCP616, single MCP618 with Chip Select (CS) dual MCP617 available standard 8-lead PDIP, SOIC MSOP packages. quad MCP619 offered standard 14-lead PDIP, SOIC TSSOP packages. devices fully specified from -40°C +85°C, with power supplies from 2.3V 5.5V. Typical Applications Battery Power Instruments Weight Scales Strain Gauges Medical Instruments Test Equipment Package Types MCP616 PDIP, SOIC, MSOP VIN- VIN+ MCP617 PDIP, SOIC, MSOP VOUTB VINB- VINB+ Available Tools SPICE Macro Models www.microchip.com) FilterLab® Software www.microchip.com) VOUTA VINA- VOUT VINA+ Input Offset Voltage Percentage Occurrences -100 Samples 5.5V MCP618 PDIP, SOIC, MSOP VIN- VIN+ MCP619 PDIP, SOIC, TSSOP VOUTD VIND- VIND+ VINC+ VINC- VOUTC VOUTA VINA- VOUT VINA+ VINB+ VINB- VOUTB Input Offset Voltage (µV) 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Absolute Maximum Ratings .7.0V Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current Continuous Current Input Pins Current Output Supply Pins .±30 Storage Temperature .-65°C +150°C Maximum Junction Temperature (TJ) +150°C protection pins (HBM;MM) 200V ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2 VDD/2. Parameters Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Input Bias Current Impedance Input Bias Current Temperature Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Voltage Range Common Mode Rejection Ratio Open-Loop Gain Open-Loop Gain (large signal) Open-Loop Gain (large signal) Output Maximum Output Voltage Swing VOS/TA PSRR ZDIFF VCMR CMRR -150 ±2.5 ±0.15 600||4 3||2 +150 Units µV/°C Conditions -40°C +85°C -40°C +85°C M||pF M||pF 5.0V, 0.0V 4.1V VDD/2, VOUT 0.05V 0.05V VDD/2, VOUT 0.1V 0.1V VDD/2, 0.5V output overdrive VDD/2, 0.5V output overdrive VDD/2, VDD/2, 2.3V 5.5V VOL, VOL, Linear Output Voltage Range VOUT VOUT Output Short Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Parameters Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density GBWP 0.08 Units V/µs µVP-P nV/Hz fA/Hz Conditions MCP618 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Parameters Specifications Logic Threshold, Input Current, High Specifications Logic Threshold, High Input Current, High Current Amplifier Output Leakage Dynamic Specifications Amplifier Output Turn-on Time High Amplifier Output High-Z Hysteresis Units Conditions ICSL -1.0 0.01 ICSH IO(LEAK) 0.01 -0.05 tOFF VHYST 0.2VDD VOUT 0.9(VDD/2), V/V, 0.8VDD VOUT 0.1(VDD/2), V/V, 5.0V VOUT High-Z tOFF High-Z (typ.) (typ.) (typ.) (typ.) (typ.) FIGURE 1-1: Timing Diagram MCP618. 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +2.3V +5.5V GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note +125 +150 Units °C/W °C/W °C/W °C/W °C/W °C/W Note Conditions MCP616/7/8/9 operate over this extended temperature range, with reduced performance. case, Junction Temperature (TJ) must exceed Absolute Maximum specification +150°C. DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 Note: TYPICAL PERFORMANCE CURVES graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range. Note: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 -100 Samples 5.5V Percentage Occurrences Percentage Occurrences Samples 5.5V -40°C +85°C Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-1: 5.5V. Percentage Occurrences -100 Input Offset Voltage FIGURE 2-4: 5.5V. Percentage Occurrences Input Offset Voltage Drift Samples 2.3V Samples 2.3V -40°C +85°C Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-2: 2.3V. Percentage Occurrences Input Offset Voltage FIGURE 2-5: 2.3V. Percentage Occurrences Input Offset Voltage Drift Samples 5.5V Samples 5.5V -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 Input Bias Current (nA) Input Offset Current (nA) FIGURE 2-3: 5.5V. Input Bias Current FIGURE 2-6: 5.5V. Input Offset Current 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 Note: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Input Offset Voltage (µV) -100 -150 Ambient Temperature (°C) 2.3V 5.5V Representative Part Ambient Temperature (°C) FIGURE 2-7: Input Offset Voltage Ambient Temperature. FIGURE 2-10: Input Bias, Offset Currents Ambient Temperature. CMRR, PSRR (dB) Quiescent Current (µA/Amplifier) 5.5V CMRR PSRR 2.3V Ambient Temperature (°C) Ambient Temperature (°C) FIGURE 2-8: Quiescent Current Ambient Temperature. Output Voltage Headroom (mV) FIGURE 2-11: Temperature. Output Voltage Headroom (mV) CMRR, PSRR Ambient 5.5V 5.5V 2.3V Ambient Temperature (°C) 2.3V Ambient Temperature (°C) FIGURE 2-9: Maximum Output Voltage Swing Ambient Temperature FIGURE 2-12: Maximum Output Voltage Swing Ambient Temperature DS21613B-page 2005 Microchip Technology Inc. Input Offset Current (nA) 5.5V Input Bias Current (nA) MCP616/7/8/9 Note: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Gain Bandwidth Product (kHz) ISC+ Ambient Temperature (°C) ISC- 2.3V 5.5V Output Short Circuit Current (mA) GBWP Ambient Temperature (°C) FIGURE 2-13: Output Short Circuit Current Ambient Temperature. 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.00 FIGURE 2-16: Gain Bandwidth Product, Phase Margin Ambient Temperature. -100 Low-to-High Transition High-to-Low Transition Input Offset Voltage (µV) 5.5V Slew Rate (V/µs) +85°C +25°C -40°C 5.0V Ambient Temperature (°C) -0.5 Common Mode Input Voltage FIGURE 2-14: Temperature. Slew Rate Ambient FIGURE 2-17: Input Offset Voltage Common Mode Input Voltage. 5.5V 2.3V +85°C +25°C -40°C 5.5V 0.30 0.25 0.20 0.15 0.10 0.05 0.00 -0.05 -0.10 -0.15 -0.20 -0.25 -0.30 Input Offset Current (nA) Input Offset Voltage (µV) Input Bias Current (nA) Output Voltage Common Mode Input Voltage FIGURE 2-15: Input Bias, Offset Currents Common Mode Input Voltage. FIGURE 2-18: Output Voltage. Input Offset Voltage 2005 Microchip Technology Inc. DS21613B-page Phase Margin MCP616/7/8/9 Note: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Output Voltage Headroom (mV) Quiescent Current (µA/Amplifier) Power Supply Voltage +85°C +25°C -40°C 1,000 2.3V 5.5V 0.01 100µ Output Current Magnitude FIGURE 2-19: Quiescent Current Power Supply Voltage. Open-Loop Gain (dB) Load Resistance 100k 2.3V 5.5V FIGURE 2-22: Output Voltage Headroom Output Current Magnitude. Open-Loop Gain (dB) Power Supply Voltage FIGURE 2-20: Load Resistance. Open-Loop Gain FIGURE 2-23: Open-Loop Gain Power Supply Voltage. Channel-to-Channel Seperation (dB) Gain Bandwidth Product (kHz) GBWP Phase Margin Referred Input 1.E+02 1.E+03 1.E+04 Frequency (Hz) 100k 1.E+05 100k Load Resistance 1,000 FIGURE 2-21: Gain-Bandwidth Product, Phase Margin Load Resistance. FIGURE 2-24: Channel-to-Channel Separation Frequency (MCP617 MCP619 only). DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 Note: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Open-Loop Gain (dB) Gain Phase Open-Loop Phase -120 -150 -180 -210 CMRR, PSRR (dB) 1.E-01 PSRR+ CMRR PSRR- -240 0.01 1.E+ 1.E- 1.E- 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 100k 1.E+ Frequency (Hz) 1.E+00 1.E+01 1.E+02 Frequency (Hz) 1.E+03 1.E+04 FIGURE 2-25: Frequency. 10,000 Input Noise Voltage Density (nV/ Open-Loop Gain, Phase FIGURE 2-28: Frequency. Maximum Output Voltage Swing P-P) CMRR, PSRR 10,000 Input Noise Current Density (fA/ 5.5V 2.3V 1,000 1,000 1.E- 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 Frequency (Hz) 1.E+02 1.E+03 1.E+04 Frequency (Hz) 100k 1.E+05 FIGURE 2-26: Input Noise Voltage, Current Densities Frequency. Gain FIGURE 2-29: Maximum Output Voltage Swing Frequency. Gain Output Voltage mV/div) Output Voltage mV/div) Time µs/div) Time µs/div) FIGURE 2-27: Pulse Response. Small-Signal, Non-Inverting FIGURE 2-30: Pulse Response. Small-Signal, Inverting 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 Note: Unless otherwise indicated, +2.3V +5.5V, GND, 25°C, VDD/2, VOUT VDD/2, VDD/2 Time µs/div) Gain 5.0V Output Voltage Time µs/div) Gain 5.0V Output Voltage FIGURE 2-31: Pulse Response. Output Voltage Output High-Z Large-Signal, Non-Inverting FIGURE 2-34: Pulse Response. Internal Switch Output Large-Signal, Inverting Chip Select Voltage 5.0V Gain VOUT Output Output High-Z Time µs/div) 5.0V Hysteresis Output swept High-to-Low swept Low-to-High Output High-Z Chip Select Voltage FIGURE 2-32: Chip Select (CS) Amplifier Output Response Time (MCP618 only). Input, Output Voltages Time (100 µs/div) VOUT Gain 5.0V FIGURE 2-35: Chip Select (CS) Internal Hysteresis (MCP618 only). FIGURE 2-33: MCP616/7/8/9 Show Phase Reversal. DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 DESCRIPTIONS Descriptions pins listed Table 3-1. TABLE 3-1: MCP616 FUNCTION TABLE MCP617 MCP618 MCP619 Symbol VOUT, VOUTA VIN-, VINA- VIN+, VINA+ VINB+ VINB- VOUTB VOUTC VINC- VINC+ VIND+ VIND- VOUTD Description Output Inverting Input Non-inverting Input Positive Power Supply Non-inverting Input Inverting Input Output Output Inverting Input Non-inverting Input Negative Power Supply Non-inverting Input Inverting Input Output Chip Select Internal Connection Analog Outputs Power Supply (VSS VDD) output pins low-impedance voltage sources. Analog Inputs positive power supply (VDD) 2.5V 5.5V higher than negative power supply (VSS). normal operation, other pins between VDD. Typically, these parts used single-supply (positive) configuration. this case, connected ground connected supply. will need local bypass capacitor (typically 0.01 within pin. These parts should bulk capacitor (typically larger) within pin; shared with nearby analog parts. non-inverting inverting inputs highimpedance inputs with bias currents. Chip Select Digital Input (CS) This CMOS, Schmitt-triggered input that places MCP618 into low-power mode operation. 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 APPLICATIONS INFORMATION Offsets MCP616/7/8/9 family amps manufactured using Microchip's state-of-the-art CMOS process, which includes transistors. These amps unity-gain stable suitable wide range general purpose applications. MCP616/7/8/9 family amps have input differential pair that gives good performance. They have very input offset voltage (±150 max.) +25°C, with typical bias current (sourced inputs). There must path ground power supply) from both inputs, will bias properly. resistances seen inputs (R1||R2 R4||R5 Figure 4-2) need equal less than minimize total offset. MCP61X VOUT Inputs MCP616/7/8/9 amps designed prevent phase reversal when input pins exceed supply voltages. Figure 2-33 shows input voltage exceeding supply voltage without phase reversal. inputs MCP616/7/8/9 amps connect differential input stage. Common Mode Input Voltage Range (VCMR) includes ground singlesupply systems (VSS), does include VDD. This means that amplifier input behaves linearly long Common Mode Input Voltage (VCM) kept within specified limits (VSS 0.9V +25°C). Input voltages that exceed Absolute Maximum Voltage Range (VSS 0.3V 0.3V) cause excessive current flow into input pins. Current beyond cause reliability problems. Applications that exceed this rating must externally limited with resistor, shown Figure 4-1. FIGURE 4-2: Example Circuit Calculating Offset. calculate bias point offset, convert circuit equivalent: Replace capacitors with open circuits Replace inductors with short circuits Replace voltage sources with short circuits Replace current sources with open circuits Convert sources resistances into their Thevenin equivalent form MCP61X VOUT Maximum expected Minimum expected equivalent circuit Figure shown Figure 4-3. FIGURE 4-1: Resistor (RIN). Input Current-Limiting MCP61X VOUT FIGURE 4-3: Equivalent Circuit. DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 calculate nominal bias point with offset: EQUATION 4-1: VOOS [VOS ((R1 ||R2 ((R1 ||R2 VOUT VOOS Where: amp's noise gain (from non-inverting input output) VOOS circuit's output offset voltage amp's input offset voltage amp's input bias current amp's input offset current amp's common mode input voltage response. unity-gain buffer most sensitive capacitive loads, though gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-4) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load. RISO MCP61X VOUT FIGURE 4-4: Output Resistor, RISO stabilizes large capacitive loads. Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, Signal Gain equal. inverting gains, 1+|Signal Gain| (e.g., gives V/V). 10,000 Recommended RISO worst-case specs source values determine worst-case output voltage range offset your design. Make sure common mode input voltage range output voltage range exceeded. Rail-to-Rail Output There specifications that describe output swing capability MCP616/7/8/9 family amps. first specification (Maximum Output Voltage Swing) defines absolute maximum swing that achieved under specified load conditions. instance, output voltage swings within negative rail with load tied VDD/2. Figure 2-33 shows output voltage limited when input goes beyond linear region operation. second specification that describes output swing capability these amplifiers Linear Output Voltage Range. This specification defines maximum output swing that achieved while amplifier still operates linear region. verify linear operation this range, large-signal Open-Loop Gain (AOL) measured points inside supply rails. measurement must meet specified conditions specification table. 1,000 100p 1.E-11 1.E-10 1.E-09 1.E-08 Normalized Load Capacitance; L/GN FIGURE 4-5: Recommended RISO Values Capacitive Loads. After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Modify RISO's value until response reasonable. Bench evaluation simulations with MCP616/7/8/9 SPICE macro model helpful. Capacitive Loads Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain peaking frequency response, with overshoot ringing step 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 MCP618 Chip Select (CS) Surface Leakage MCP618 single with Chip Select (CS). When pulled high, supply current drops (typ.) flows through VSS. When this happens, amplifier output into highimpedance state. pulling low, amplifier enabled. left floating, amplifier operate properly. Figure shows output voltage supply current response pulse. applications where input bias current critical, Printed Circuit Board (PCB) surface leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current flow, which greater than MCP616/7/8/9 family's bias current 25°C typ.). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. example shown below Figure 4-7. Guard Ring VIN- VIN+ Supply Bypass With this family operational amplifiers, power supply (VDD single supply) should have local bypass capacitor (i.e., 0.01 within good high-frequency performance. bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor required shared with other analog parts. Unused Amps FIGURE 4-7: Inverting Gain. unused quad package (MCP619) should configured shown Figure 4-6. Both circuits prevent output from toggling causing crosstalk. Circuit reference voltage between supplies, provides buffered voltage minimizes supply current draw unused amp. Circuit minimizes number components, draw little more supply current unused amp. Example Guard Ring Layout MCP619 MCP619 Non-inverting Gain Unity Gain Buffer: Connect non-inverting (VIN+) input with wire that does touch surface. Connect guard ring inverting input (VIN-). This biases guard ring common mode input voltage. Inverting Gain Transimpedance gain (convert current voltage, such photo detectors) amplifiers: Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface. FIGURE 4-6: Unused Amps. DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 4.9.1 Application Circuits HIGH GAIN PRE-AMPLIFIER 4.9.3 THREE INSTRUMENTATION AMPLIFIER MCP616/7/8/9 amps well suited amplifying small signals produced low-impedance sources/sensors. offset voltage, offset current noise well this role. Figure shows typical pre-amplifier connected lowimpedance source RS). VDD/2 11.0 MCP616 VOUT classic, three-op instrumentation amplifier illustrated Figure 4-10. two-input amps provide differential signal gain common mode gain output difference amplifier, which converts input signal from differential single-ended output; rejects common mode signals input. gain this circuit simply adjusted with resistor (RG). reference voltage (VREF) typically referenced mid-supply (VDD/2) singlesupply applications. FIGURE 4-8: High Gain Pre-amplifier. MCP617 MCP616 VREF VOUT best noise offset performance, source resistance needs less than resistances inputs equal minimize offset voltage caused input bias currents (Section Offsets"). this circuit, gain V/V, which will give typical bandwidth kHz. 4.9.2 INSTRUMENTATION AMPLIFIER two-op instrumentation amplifier shown Figure serves function taking difference input voltages, level-shifting gaining output. This configuration best suited higher gains (i.e., gain V/V). reference voltage (VREF) typically mid-supply (VDD/2) single-supply environment. VOUT MCP617 FIGURE 4-10: Three-Op Instrumentation Amplifier. 4.9.4 PRECISION GAIN WITH GOOD LOAD ISOLATION Figure 4-11, MCP616 amp, provide high gain input signal (VIN). MCP616's offset voltage makes this accurate circuit. MCP606 configured unity-gain buffer. isolates MCP616's output from load, increasing high gain stage's precision. Since MCP606 higher output current, amplifiers housed separate packages, there minimal change MCP616's offset voltage loading effect. VOUT VREF VOUT MCP617 MCP617 MCP616 MCP606 VOUT FIGURE 4-9: Two-Op Instrumentation Amplifier. specifications that make MCP616/7/8/9 family appropriate this application circuit input bias current, offset voltage high commonmode rejection. FIGURE 4-11: Load Isolation. Precision Gain with Good 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 DESIGN TOOLS FilterLab® Software Microchip provides basic design tools needed MCP616/7/8/9 family amps. Microchip's FilterLab® software innovative tool that simplifies analog active-filter (using amps) design. available free charge from site www.microchip.com. FilterLab software tool provides full schematic diagrams filter circuit with component values. also outpouts filter circuit SPICE format, which used with macro model simulate actual filter performance. SPICE Macro Model latest SPICE macro model MCP616/7/8/9 amps available Microchip's site www.microchip.com. This model intended initial design tool that works well amp's linear region operation room temperature. model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves. DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 PACKAGING INFORMATION Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Examples: MCP616 I/P256 0515 MCP616 0515 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW Examples: MCP616 I/SN0515 MCP616I SN^^ 0515 8-Lead MSOP XXXXXX YWWNNN Example: 616I 515256 Legend: XX.X Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package. Note: event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information. 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP619) Examples: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP619-I/P XXXXXXXXXXXXXX 0515256 MCP619 I/P^^ 0515256 14-Lead SOIC (150 mil) (MCP619) Examples: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP619ISL XXXXXXXXXX 0515256 MCP619 I/SL 0515256 14-Lead TSSOP (MCP619) Example: XXXXXXXX YYWW MCP619IST 0515 DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 8-Lead Plastic Dual In-line (PDIP) Number Pins Pitch Seating Plane Molded Package Thickness Base Seating Plane Shoulder Shoulder Width Molded Package Width Overall Length Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Spacing Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits INCHES* .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 .170 .145 .325 .260 .385 .135 .015 .070 .022 .430 MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-018 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 8-Lead Plastic Small Outline (SN) Narrow, (SOIC) Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits .053 .052 .004 .228 .146 .189 .010 .019 .008 .013 INCHES* .050 .061 .056 .007 .237 .154 .193 .015 .025 .009 .017 .069 .061 .010 .244 .157 .197 .020 .030 .010 .020 MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0.20 0.23 0.33 0.42 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 0.25 0.51 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-057 DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) Number Pins .026 Pitch .043 Overall Height .030 .033 .037 Molded Package Thickness .000 .006 Standoff .193 TYP. Overall Width .118 Molded Package Width .118 Overall Length .016 .024 .031 Foot Length Footprint (Reference) .037 Foot Angle Lead Thickness .003 .006 .009 .009 .012 .016 Lead Width Mold Draft Angle Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. Units Dimension Limits INCHES MILLIMETERS* 0.65 0.75 0.85 0.00 4.90 3.00 3.00 0.40 0.60 0.95 0.08 0.22 1.10 0.95 0.15 0.80 0.23 0.40 JEDEC Equivalent: MO-187 Drawing C04-111 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 14-Lead Plastic Dual In-line (PDIP) Number Pins Pitch Seating Plane .140 .170 Molded Package Thickness .115 .145 Base Seating Plane .015 Shoulder Shoulder Width .300 .313 .325 Molded Package Width .240 .250 .260 Overall Length .740 .750 .760 Seating Plane .125 .130 .135 Lead Thickness .008 .012 .015 Upper Lead Width .045 .058 .070 Lower Lead Width .014 .018 .022 Overall Spacing .310 .370 .430 Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-005 Units Dimension Limits INCHES* .100 .155 .130 MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92 DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 14-Lead Plastic Small Outline (SL) Narrow, (SOIC) Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits .053 .052 .004 .228 .150 .337 .010 .016 .008 .014 INCHES* .050 .061 .056 .007 .236 .154 .342 .015 .033 .009 .017 .069 .061 .010 .244 .157 .347 .020 .050 .010 .020 MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0.20 0.23 0.36 0.42 1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 0.25 0.51 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-065 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 14-Lead Plastic Thin Shrink Small Outline (ST) (TSSOP) Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits INCHES .026 .035 .004 .251 .173 .197 .024 .006 .010 .033 .002 .246 .169 .193 .020 .004 .007 .043 .037 .006 .256 .177 .201 .028 .008 .012 MILLIMETERS* 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0.09 0.15 0.20 0.19 0.25 0.30 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. JEDEC Equivalent: MO-153 Drawing C04-087 DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 APPENDIX REVISION HISTORY Revision (April 2005) following list modifications: Clarified specifications found Section "Electrical Characteristics". Updated Section "Typical Performance Curves" added input noise current density plot. Added Section "Pin Descriptions". Updated Section "Applications Information". Updated SPICE macro model added information FilterLab software, Section "Design Tools". Corrected package marking information (Section "Packaging Information"). Added Appendix "Revision History". Revision (April 2001) Original Release this Document. 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 NOTES: DS21613B-page 2005 Microchip Technology Inc. MCP616/7/8/9 PRODUCT IDENTIFICATION SYSTEM order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Temperature Range Package Examples: Single Operational Amplifier Single Operational Amplifier (Tape Reel SOIC, MSOP) Dual Operational Amplifier Dual Operational Amplifier (Tape Reel SOIC MSOP) Single Operational Amplifier w/Chip Select (CS) Single Operational Amplifier w/Chip Select (CS) (Tape Reel SOIC MSOP) Quad Operational Amplifier Quad Operational Amplifier (Tape Reel SOIC TSSOP) MCP616-I/P: MCP616-I/SN: MCP616T-I/SN: Device: MCP616: MCP616T: MCP617: MCP617T: MCP618: MCP618T: MCP619: MCP619T: Industrial Temperature, PDIP. Industrial Temperature, SOIC. Tape Reel, Industrial Temperature, SOIC. Industrial Temperature, MSOP. Tape Reel, Industrial Temperature, MSOP. Industrial Temperature, PDIP. Industrial Temperature, SOIC. Tape Reel, Industrial Temperature, SOIC. Industrial Temperature, PDIP. Tape Reel, Industrial Temperature, 14LD SOIC. Tape Reel, Industrial Temperature, 14LD TSSOP. Industrial Temperature, 14LD PDIP. MCP617-I/MS: MCP617T-I/MS: MCP617-I/P: MCP618-I/SN: MCP618T-I/SN: Temperature Range: -40°C +85°C Package: Plastic MSOP, 8-lead Plastic (300 Body), 8-lead, 14-lead Plastic SOIC (150 Body), 8-lead Plastic SOIC (150 Body), 14-lead (MCP619) Plastic TSSOP (4.4mm Body), 14-lead (MCP619) MCP618-I/P: MCP619T-I/SL: MCP619T-I/ST: MCP619-I/P: 2005 Microchip Technology Inc. DS21613B-page MCP616/7/8/9 NOTES: DS21613B-page 2005 Microchip Technology Inc. Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable." Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act. Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip's products critical components life support systems authorized except with express written approval Microchip. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights. Trademarks Microchip name logo, Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, MATE, PowerSmart, rfPIC, SmartShunt registered trademarks Microchip Technology Incorporated U.S.A. other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance WiperLock trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2005, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper. Microchip received ISO/TS-16949:2002 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona Mountain View, California October 2003. Company's quality system processes procedures PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified. 2005 Microchip Technology Inc. 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