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Rail-to-Rail Input/Output, Amps Rail-to-Rail Input/Output Wide Ba
Top Searches for this datasheetMCP6021/1R/2/3/4 Rail-to-Rail Input/Output, Amps Rail-to-Rail Input/Output Wide Bandwidth: (typ.) Noise: nV/Hz, (typ.) Offset Voltage: Industrial Temperature: ±500 (max.) Extended Temperature: ±250 (max.) Mid-Supply VREF: MCP6021 MCP6023 Supply Current: (typ.) Total Harmonic Distortion: 0.00053% (typ., Unity Gain Stable Power Supply Range: 2.5V 5.5V Temperature Range: Industrial: -40°C +85°C Extended: -40°C +125°C Description MCP6021, MCP6021R, MCP6022, MCP6023 MCP6024 from Microchip Technology Inc. rail-torail input output amps with high performance. specifications include: wide bandwidth MHz), noise (8.7 nV/Hz), input offset voltage distortion (0.00053% THD+N). MCP6023 also offers Chip Select (CS) that gives power savings when part use. single MCP6021 MCP6021R available SOT-23-5. single MCP6021, single MCP6023 dual MCP6022 available 8-lead PDIP, SOIC TSSOP. Extended Temperature single MCP6021 available 8-lead MSOP. quad MCP6024 offered 14-lead PDIP, SOIC TSSOP packages. MCP6021/1R/2/3/4 family available Industrial Extended temperature ranges. power supply range 2.5V 5.5V. Typical Applications Automotive Driving Converters Multi-Pole Active Filters Barcode Scanners Audio Processing Communications Buffer Test Equipment Medical Instrumentation Package Types MCP6021 SOT-23-5 VOUT VIN+ MCP6022 PDIP SOIC, TSSOP VOUTB VINB- VINB+ VOUTA VINA- VIN- VINA+ MCP6021R SOT-23-5 VOUT VIN+ VIN- MCP6023 PDIP SOIC, TSSOP VIN- VIN+ VOUT VREF Available Tools SPICE Macro Model www.microchip.com) FilterLab® software www.microchip.com) Typical Application Photo Detector MCP6021 VDD/2 Transimpedance Amplifier MCP6021 PDIP SOIC, MSOP, TSSOP VIN- VIN+ VOUTA VOUT VINA- VINA+ MCP6024 PDIP SOIC, TSSOP VOUTD VIND- VIND+ VINC+ VINC- VOUTC VINB+ VINB- VOUTB 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Absolute Maximum Ratings .7.0V Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current .continuous Current Input Pins Current Output Supply Pins .±30 Storage Temperature.-65°C +150°C Junction Temperature. +150°C Protection pins (HBM; 200V ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2 VDD/2. Parameters Input Offset Input Offset Voltage: Industrial Temperature Parts Extended Temperature Parts Extended Temperature Parts Input Offset Voltage Temperature Drift Power Supply Rejection Ratio Input Current Impedance Input Bias Current Industrial Temperature Parts Extended Temperature Parts Input Offset Current Common-Mode Input Impedance Differential Input Impedance Common-Mode Common-Mode Input Range Common-Mode Rejection Ratio VCMR CMRR CMRR CMRR Voltage Reference (MCP6021 MCP6023 only) VREF Accuracy (VREF VDD/2) VREF Temperature Drift Open-Loop Gain Open-Loop Gain (Large Signal) Output Maximum Output Voltage Swing Output Short Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier 1.35 VOL, VSS+15 VDD-20 0.5V output overdrive 2.5V 5.5V VOUT VSS+0.3V VDD-0.3V VREF_ACC VREF/TA ±100 µV/°C -40°C +125°C VSS-0.3 VDD+0.3 -0.3V 5.3V 3.0V 5.3V -0.3V 3.0V ZDIFF 1013||6 1013||3 5,000 ||pF ||pF +85°C +125°C VOS/TA PSRR -500 -250 -2.5 ±3.5 +500 +250 +2.5 5.0V 5.0V -40°C +125°C Units Conditions µV/°C -40°C +125°C DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Response Gain Bandwidth Product Phase Margin Unity-Gain Settling Time, 0.2% Slew Rate kHz, kHz, V/V, kHz, kHz, kHz, +100 Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVp-p fA/Hz nV/Hz GBWP tSETTLE THD+N THD+N THD+N THD+N THD+N 0.00053 0.00064 0.0014 0.0009 0.005 V/µs VOUT 0.25V 3.25V (1.75V 1.50VPK), 5.0V, VOUT 0.25V 3.25V (1.75V 1.50VPK), 5.0V, VOUT 4VP-P, 5.0V, VOUT 4VP-P, 5.0V, VOUT 4VP-P, 5.0V, VOUT mVp-p Units Conditions Total Harmonic Distortion Plus Noise MCP6023 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Specifications Logic Threshold, Input Current, High Specifications Logic Threshold, High Input Current, High Current Amplifier Output Leakage Dynamic Specifications Amplifier Output Turn-on Time High Amplifier Output High-Z Time Hysteresis tOFF VHYST 0.01 VSS, 0.2VDD VOUT 0.45VDD time VSS, 0.8VDD VOUT 0.05VDD time 5.0V, Internal Switch ICSH IO(LEAK) 0.01 -0.05 0.01 ICSL -1.0 0.01 Units Conditions 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, +2.5V +5.5V GND. Parameters Temperature Ranges Industrial Temperature Range Extended Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 8L-TSSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W +125 +125 +150 Note Units Conditions industrial temperature devices operate over this extended temperature range, with reduced performance. case, internal junction temperature (TJ) must exceed absolute maximum specification 150°C. VOUT High-Z Amplifier tOFF High-Z (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) FIGURE 1-1: Timing diagram MCP6023. DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 Note: TYPICAL PERFORMANCE CURVES graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range. Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Percentage Occurances -500 -400 -300 -200 -100 I-Temp Parts 1192 Samples +25°C I-Temp Parts 1192 Samples -40°C +85°C Percentage Occurances Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-1: Input Offset Voltage, (Industrial Temperature Parts). E-Temp Parts Samples 5.0V +25°C FIGURE 2-4: Input Offset Voltage Drift, (Industrial Temperature Parts). E-Temp Parts Samples -40°C +125°C Percentage Occurances -240 -200 -160 -120 Percentage Occurances Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-2: Input Offset Voltage, (Extended Temperature Parts). 2.5V -100 -200 -300 -400 -500 -0.5 FIGURE 2-5: Input Offset Voltage Drift, (Extended Temperature Parts). -100 -200 -300 -400 -500 -40°C +25°C +85°C +125°C Input Offset Voltage (µV) -40°C +25°C +85°C +125°C Input Offset Voltage (µV) 5.5V -0.5 Common Mode Input Voltage Common Mode Input Voltage FIGURE 2-3: Input Offset Voltage Common Mode Input Voltage with 2.5V. FIGURE 2-6: Input Offset Voltage Common Mode Input Voltage with 5.5V. 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Input Offset Voltage (µV) Input Offset Voltage (µV) -100 -150 -200 -250 -300 Ambient Temperature (°C) 5.0V -100 -150 -200 Output Voltage 2.5V 5.5V VDD/2 FIGURE 2-7: Temperature. 1,000 Input Noise Voltage Density (nV/Hz) Input Offset Voltage FIGURE 2-10: Output Voltage. Input Noise Voltage Density (nV/Hz) 5.0V Input Offset Voltage -0.5 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 Frequency (Hz) 100k Common Mode Input Voltage FIGURE 2-8: Frequency. CMRR, PSRR (dB) 1.E+02 1.E+03 Input Noise Voltage Density FIGURE 2-11: Input Noise Voltage Density Common Mode Input Voltage. PSRR+ PSRRPSRR, CMRR (dB) PSRR (VCM CMRR CMRR 1.E+04 1.E+05 1.E+06 Frequency (Hz) 100k Ambient Temperature (°C) FIGURE 2-9: Frequency. CMRR, PSRR FIGURE 2-12: Temperature. CMRR, PSRR DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Input Bias, Offset Currents (pA) 10,000 10,000 Input Bias, Offset Currents (pA) 5.5V +125°C IOS, +125°C +85°C 5.5V 1,000 1,000 IOS, +85°C Common Mode Input Voltage Ambient Temperature (°C) FIGURE 2-13: Input Bias, Offset Currents Common Mode Input Voltage. FIGURE 2-16: Temperature. Input Bias, Offset Currents 5.5V 2.5V Quiescent Current (mA/amplifier) +125°C +85°C +25°C -40°C Quiescent Current (mA/amplifier) 0.5V Ambient Temperature (°C) Power Supply Voltage FIGURE 2-14: Supply Voltage. Output Short Circuit Current (mA) Quiescent Current FIGURE 2-17: Temperature. Quiescent Current +125°C +85°C +25°C -40°C Supply Voltage 1.E+00 Phase -105 -120 -135 -150 Gain -165 -180 -195 -210 100k 100M 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 Open-Loop Gain (dB) Frequency (Hz) FIGURE 2-15: Output Short-Circuit Current Supply Voltage. FIGURE 2-18: Frequency. Open-Loop Gain, Phase 2006 Microchip Technology Inc. DS21685C-page Open-Loop Phase MCP6021/1R/2/3/4 Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Open-Loop Gain (dB) Open-Loop Gain (dB) 5.5V 2.5V 1.E+02 1.E+03 1.E+04 1.E+05 5.5V 2.5V Load Resistance 100k Ambient Temperature (°C) FIGURE 2-19: Load Resistance. Open-Loop Gain (dB) Open-Loop Gain FIGURE 2-22: Temperature. Gain Bandwidth Product (MHz) Open-Loop Gain Phase Margin, 5.0V Common Mode Input Voltage Phase Margin, Gain Bandwidth Product VDD/2 5.5V 0.00 2.5V 0.05 0.10 0.15 0.20 0.25 0.30 Output Voltage Headroom (V); FIGURE 2-20: Small Signal Open-Loop Gain Output Voltage Headroom. FIGURE 2-23: Gain Bandwidth Product, Phase Margin Common Mode Input Voltage. Gain Bandwidth Product (MHz) Gain Bandwidth Product Phase Margin, 5.0V VDD/2 Output Voltage Phase Margin, Gain Bandwidth Product (MHz) Phase Margin, GBWP, 5.5V GBWP, 2.5V 2.5V 5.5V Ambient Temperature (°C) FIGURE 2-21: Gain Bandwidth Product, Phase Margin Temperature. FIGURE 2-24: Gain Bandwidth Product, Phase Margin Output Voltage. DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Maximum Output Voltage Swing (VP-P) Falling, 5.5V Rising, 5.5V 5.5V 2.5V Slew Rate (V/µs) Falling, 2.5V Rising, 2.5V Ambient Temperature (°C) 1.E+04 1.E+05 1.E+06 1.E+07 100k Frequency (Hz) FIGURE 2-25: Slew Rate Temperature. FIGURE 2-28: Maximum Output Voltage Swing Frequency. 0.1000% +100 0.1000% BWMeas 5.0V THD+N THD+N 0.0100% +100 0.0100% 0.0010% 0.0001% Output Voltage (VP-P) 0.0010% BWMeas 5.0V 0.0001% Output Voltage (VP-P) FIGURE 2-26: Total Harmonic Distortion plus Noise Output Voltage with kHz. Input, Output Voltage Time µs/div) VOUT 5.0V FIGURE 2-29: Total Harmonic Distortion plus Noise Output Voltage with kHz. Channel Channel Separation (dB) 1.E+03 1.E+04 1.E+05 1.E+06 100k Frequency (Hz) FIGURE 2-27: MCP6021/1R/2/3/4 family shows phase reversal under overdrive. FIGURE 2-30: Channel-to-Channel Separation Frequency (MCP6022 MCP6024 only). 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 1,000 Output Voltage Headroom; VDD-VOH VOL-VSS (mV) Output Voltage Headroom VDD-VOH VOL-VSS (mV) 0.01 Output Current Magnitude (mA) Ambient Temperature (°C) FIGURE 2-31: Output Voltage Headroom Output Current. 6.E-02 FIGURE 2-34: Temperature. 6.E-02 Output Voltage Headroom 5.E-02 Output Voltage mV/div) 5.E-02 Output Voltage mV/div) 4.E-02 4.E-02 3.E-02 3.E-02 2.E-02 2.E-02 1.E-02 1.E-02 0.E+00 0.E+00 -1.E-02 -1.E-02 -2.E-02 -2.E-02 -3.E-02 -3.E-02 -4.E-02 -4.E-02 -5.E-02 -5.E-02 -6.E-02 0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06 -6.E-02 0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06 Time (200 ns/div) Time (200 ns/div) FIGURE 2-32: Pulse Response. Output Voltage 0.E+00 5.E-07 1.E-06 2.E-06 Small-Signal Non-inverting FIGURE 2-35: Response. Small-Signal Inverting Pulse Output Voltage 2.E-06 3.E-06 3.E-06 4.E-06 4.E-06 5.E-06 5.E-06 0.E+00 5.E-07 1.E-06 2.E-06 2.E-06 3.E-06 3.E-06 4.E-06 4.E-06 5.E-06 5.E-06 Time (500 ns/div) Time (500 ns/div) FIGURE 2-33: Pulse Response. Large-Signal Non-inverting FIGURE 2-36: Response. Large-Signal Inverting Pulse DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 Note: Unless otherwise indicated, +25°C, +2.5V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Power Supply Voltage VREF Accuracy; DD/2 (mV) VREF Accuracy; DD/2 (mV) Representative Part 5.5V 2.5V Ambient Temperature (°C) FIGURE 2-37: VREF Accuracy Supply Voltage (MCP6021 MCP6023 only). Quiescent Current (mA/amplifier) Chip Select Voltage 2.5V 1.25V swept high swept high Hysteresis turns here shuts here FIGURE 2-40: VREF Accuracy Temperature (MCP6021 MCP6023 only). Quiescent Current (mA/amplifier) Chip Select Voltage 5.5V 2.75V swept high Hysteresis swept high turns here shuts here FIGURE 2-38: Chip Select (CS) Hysteresis (MCP6023 only) with 2.5V. -0.5 5.0V FIGURE 2-41: Chip Select (CS) Hysteresis (MCP6023 only) with 5.5V. Chip Select Voltage, Output Voltage Voltage VOUT Output Output High-Z Output 0.0E+00 5.0E-06 1.0E-05 1.5E-05 2.0E-05 2.5E-05 3.0E-05 3.5E-05 Time µs/div) FIGURE 2-39: Chip Select (CS) Amplifier Output Response Time (MCP6023 only). 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 DESCRIPTIONS Descriptions pins listed Table 3-1. TABLE 3-1: FUNCTION TABLE MCP6021 (PDIP, MCP6021 MCP6021R SOIC, (SOT-23-5) (SOT-23-5) MCP6022 MCP6023 MCP6024 MSOP, (Note (Note TSSOP) (Note Note Symbol Description VOUT, VOUTA Analog Output VIN-, VINA- VIN+, VINA+ VINB+ VINB- VOUTB VOUTC VINC- VINC+ VIND+ VIND- VOUTD VREF Inverting Input Non-inverting Input Positive Power Supply Non-inverting Input Inverting Input Analog Output Analog Output Inverting Input Non-inverting Input Negative Power Supply Non-inverting Input Inverting Input Analog Output Reference Voltage Chip Select Internal Connection MCP6021 8-pin MSOP package only available E-temp (Extended Temperature) parts. MCP6021 8-pin TSSOP package only available I-temp (Industrial Temperature) parts. MCP6021R only available 5-pin SOT-23 package, E-temp (Extended Temperature) parts. Analog Outputs Power Supply (VSS VDD) output pins low-impedance voltage sources. Analog Inputs positive power supply (VDD) 2.5V 5.5V higher than negative power supply (VSS). normal operation, other pins voltages between VDD. Typically, these parts used single (positive) supply configuration. this case, connected ground connected supply. will need local bypass capacitor (typically 0.01 within pin. These parts need bulk capacitor (typically larger) within pin; shared with nearby analog parts. non-inverting inverting inputs highimpedance CMOS inputs with bias currents. VREF Output (MCP6021 MCP6023) Mid-supply reference voltage provided single amps (except SOT-23-5 package). This unbuffered, resistor voltage divider internal part. Digital Input This CMOS, Schmitt-triggered input that places part into power mode operation. DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 APPLICATIONS INFORMATION Rail-to-Rail Output MCP6021/1R/2/3/4 family operational amplifiers fabricated Microchip's state-of-the-art CMOS process. They unity-gain stable suitable wide range general-purpose applications. Maximum Output Voltage Swing maximum swing possible under particular output load. According specification table, output reach within either supply rail when Figure 2-31 Figure 2-34 more information concerning typical performance. Rail-to-Rail Input MCP6021/1R/2/3/4 amplifier family designed exhibit phase inversion when input pins exceed supply voltages. Figure 2-27 shows input voltage exceeding both supplies with resulting phase inversion. input stage MCP6021/1R/2/3/4 family devices uses differential input stages parallel; operates common-mode input voltage (VCM), while other operates high VCM. With this topology, device operates with 0.3V past either supply rail (VSS 0.3V 0.3V) +25°C. amplifier input behaves linearly long kept within specified VCMR limits. input offset voltage measured both 0.3V 0.3V ensure proper operation. Input voltages that exceed input voltage range (VCMR) cause excessive current flow input pins. Current beyond introduces possible reliability problems. Thus, applications that exceed this rating must externally limit input current with input resistor (RIN), shown Figure 4-1. Capacitive Loads Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases, closed loop bandwidth reduced. This produces gain-peaking frequency response, with overshoot ringing step response. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 4-2) improves feedback loop's phase margin (stability) making load resistive higher frequencies. bandwidth will generally lower than bandwidth with capacitive load. MCP602X RISO VOUT MCP602X VOUT FIGURE 4-2: Output resistor RISO stabilizes large capacitive loads. Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, Signal Gain equal. inverting gains, 1+|Signal Gain| (e.g., gives V/V). 1,000 Recommended RISO (Maximum expected VIN) (Minimum expected VIN) FIGURE 4-1: into input pin. limits current flow Total Harmonic Distortion Plus Noise (THD+N) affected common mode input voltage (VCM). shown Figure Figure 2-6, input offset voltage (VOS) affected change from NMOS PMOS input differential pairs. This change will increase distortion input voltage includes this transition region. This transition occurs between 1.0V 2.0V, depending temperature. 1,000 10,000 Normalized Capacitance; CL/GN (pF) FIGURE 4-3: Recommended RISO values capacitive loads. 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Modify RISO's value until response reasonable. Evaluation bench simulations with MCP6021/1R/2/3/4 Spice macro model helpful. MCP6023 Chip Select (CS) Gain Peaking Figure 2-35 Figure 2-36 avoid (frequency response) gain peaking (step response) overshoot. capacitance ground inverting input (CG) amp's common mode input capacitance plus board parasitic capacitance. parallel with which causes increase gain high frequencies non-inverting gains greater than (unity gain). also reduces phase margin feedback loop both non-inverting inverting gains. MCP6023 single amplifier with chip select (CS). When high, supply current less than (typ) travels from VSS, with amplifier output being into high-impedance state. When low, amplifier enabled. left floating, amplifier operate properly. Figure Figure 2-39 show output voltage supply current response pulse. MCP6021 MCP6023 Reference Voltage VOUT single amps (MCP6021 MCP6023), SOT-23-5 package, have internal mid-supply reference voltage connected VREF (see Figure 4-6). MCP6021 internally tied VSS, which always keeps always provides mid-supply reference. With MCP6023, taking high conserves power shutting down both VREF circuitry. Taking turns VREF circuitry. VREF FIGURE 4-4: Non-inverting gain circuit with parasitic capacitance. largest value Figure that should used function noise gain (see Section "Capacitive Loads") Figure shows results various conditions. Other compensation techniques used, they tend more complicated design. 1.E+05 100k tied internally MCP6021) FIGURE 4-6: Simplified internal VREF circuit (MCP6021 MCP6023 only). Figure non-inverting gain circuit using internal mid-supply reference. DC-blocking capacitor (CB) also reduces noise coupling input source. Maximum 1.E+04 1.E+03 1.E+02 Noise Gain; (V/V) VOUT VREF FIGURE 4-5: Non-inverting gain circuit with parasitic capacitance. FIGURE 4-7: Non-inverting gain circuit using VREF (MCP6021 MCP6023 only). DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 internal mid-supply reference inverting gain circuit, connect VREF non-inverting input, shown Figure 4-8. capacitor helps reduce power supply noise output. VOUT Surface Leakage applications where input bias current critical, (printed circuit board) surface-leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current flow, which greater than MCP6021/1R/2/3/4 family's bias current +25°C typ). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. Figure 4-10 shows example this type layout. Guard Ring VIN- VIN+ VREF FIGURE 4-8: Inverting gain circuit using VREF (MCP6021 MCP6023 only). don't need mid-supply reference, leave VREF open. Supply Bypass With this family operational amplifiers, power supply (VDD single supply) should have local bypass capacitor (i.e., 0.01 within good, high-frequency performance. also needs bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with nearby analog parts. FIGURE 4-10: Layout. Example Guard Ring Unused Amps unused quad package (MCP6024) should configured shown Figure 4-9. These circuits prevent output from toggling causing crosstalk. Circuit reference voltage between supplies, provides buffered voltage, minimizes supply current draw unused amp. Circuit uses minimum number components operates comparator; draw more current. MCP6144 MCP6144 Non-inverting Gain Unity-Gain Buffer. Connect guard ring inverting input (VIN-); this biases guard ring common mode input voltage. Connect non-inverting (VIN+) input with wire that does touch surface. Inverting (Figure 4-10) Transimpedance Gain Amplifiers (convert current voltage, such photo detectors). Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage amp's input (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface. 4.10 High Speed Layout their speed capabilities, little extra care (Printed Circuit Board) layout make significant difference performance these amps. Good board layout techniques will help achieve performance shown Section "Electrical Characteristics" Section "Typical Performance Curves", while also helping minimize (Electro-Magnetic Compatibility) issues. solid ground plane connect bypass local capacitor(s) this plane with minimal length traces. This cuts down inductive capacitive crosstalk. FIGURE 4-9: Unused Amps. 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 Separate digital from analog, speed from high speed power from high power. This will reduce interference. Keep sensitive traces short straight. Separating them from interfering components traces. This especially important high-frequency (low rise-time) signals. Sometimes helps place guard traces next victim traces. They should both sides victim trace, close possible. Connect guard trace ground plane both ends, middle long traces. coax cables inductance wiring) route signal power from PCB. 4.11.2 OPTICAL DETECTOR AMPLIFIER Figure 4-12 shows MCP6021 used transimpedance amplifier photo detector circuit. photo detector looks like capacitive current source, resistor gains input signal reasonable level. capacitor stabilizes this circuit produces flat frequency response with bandwidth kHz. MCP6021 Photo Detector 4.11 4.11.1 Typical Applications CONVERTER DRIVER ANTI-ALIASING FILTER VDD/2 Figure 4-11 shows third-order Butterworth filter that used converter driver. bandwidth reasonable step response. will work well conversion rates ksps greater attenuation kHz). FIGURE 4-12: Transimpedance Amplifier Optical Detector. 8.45 14.7 33.2 MCP602X FIGURE 4-11: converter driver anti-aliasing filter with cutoff frequency. This filter easily adjusted another bandwidth multiplying capacitors same factor. Alternatively, resistors scaled another common factor adjust bandwidth. DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 DESIGN TOOLS FilterLab® Software Microchip provides basic design tools needed MCP6021/1R/2/3/4 family amps. Microchip's FilterLab® software innovative tool that simplifies analog active filter (using amps) design. available free charge from site www.microchip.com. FilterLab software tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance. SPICE Macro Model latest SPICE macro model available MCP6021/1R/2/3/4 amps Microchip's site www.microchip.com. This model intended initial design tool that works well amp's linear region operation room temperature. Within macro model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves. 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 PACKAGING INFORMATION Package Marking Information 5-Lead SOT-23 (MCP6021/MCP6021R) Example: (E-temp) Device E-Temp Code EYNN EZNN XXNN MCP6021 MCP6021R EY25 Note: Applies 5-Lead SOT-23 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP6021 I/P256 0331 MCP6021 E/P^^256 0549 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW Example: MCP6021 I/SN0331 MCP6021E SN^^0549 8-Lead MSOP XXXXXX YWWNNN Example: 6021E 549256 8-Lead TSSOP Example: XXXX YYWW 6021 E549 Legend: XX.X Customer-specific information Year code (last digit calendar year) Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Pb-free JEDEC designator Matte (Sn) This package Pb-free. Pb-free JEDEC designator found outer packaging this package. Note: event full Microchip part number cannot marked line, will carried over next line, thus limiting number available characters customer-specific information. DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6024) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP6024-I/P XXXXXXXXXXXXXX 0331256 MCP6024 E/P^^ 0549256 14-Lead SOIC (150 mil) (MCP6024) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6024ISL XXXXXXXXXX 0331256 MCP6024 E/SL^^ 0549256 14-Lead TSSOP (MCP6024) Example: XXXXXX YYWW 6024E 0331 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 5-Lead Plastic Small Outline Transistor (OT) (SOT-23) Units Dimension Limits Number Pins Pitch Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom INCHES* .038 .075 .035 .035 .000 .102 .059 .110 .014 .004 .014 .046 .043 .003 .110 .064 .116 .018 .006 .017 .057 .051 .006 .118 .069 .122 .022 .008 .020 0.35 0.90 0.90 0.00 2.60 1.50 2.80 0.35 MILLIMETERS 0.95 1.90 1.18 1.10 0.08 2.80 1.63 2.95 0.45 0.09 0.15 0.43 1.45 1.30 0.15 3.00 1.75 3.10 0.55 0.20 0.50 Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. EIAJ Equivalent: SC-74A Revised 09-12-05 Drawing C04-091 DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 8-Lead Plastic Dual In-line (PDIP) Number Pins Pitch Seating Plane Molded Package Thickness Base Seating Plane Shoulder Shoulder Width Molded Package Width Overall Length Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Spacing Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits INCHES* .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 .170 .145 .325 .260 .385 .135 .015 .070 .022 .430 MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-018 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 8-Lead Plastic Small Outline (SN) Narrow, (SOIC) Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits .053 .052 .004 .228 .146 .189 .010 .019 .008 .013 INCHES* .050 .061 .056 .007 .237 .154 .193 .015 .025 .009 .017 .069 .061 .010 .244 .157 .197 .020 .030 .010 .020 MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0.20 0.23 0.33 0.42 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 0.25 0.51 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-057 DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 8-Lead Plastic Thin Shrink Small Outline (ST) (TSSOP) Units Dimension Limits Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom .039 .033 .002 .246 .169 .114 .020 .004 .007 INCHES .026 .041 .035 .004 .251 .173 .118 .024 .006 .010 .043 .037 .006 .256 .177 .122 .028 .008 .012 1.00 0.85 0.05 6.25 4.30 2.90 0.50 MILLIMETERS* 0.65 1.05 0.90 0.10 6.38 4.40 3.00 0.60 0.15 0.25 1.10 0.95 0.15 6.50 4.50 3.10 0.70 0.20 0.30 0.09 0.19 Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. JEDEC Equivalent: MO-153 Drawing C04-086 Revised 07-21-05 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) Units Dimension Limits Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint (Reference) Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom .016 .030 .000 INCHES MILLIMETERS* 0.65 .043 .037 .006 0.75 0.00 4.90 3.00 3.00 .031 .009 .016 0.40 0.08 0.22 0.60 0.95 0.23 0.40 0.80 0.85 1.10 0.95 0.15 .026 .033 .193 .118 .118 .024 .037 .003 .009 .006 .012 Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. ASME Y14.5M REF: Reference Dimension, usually without tolerance, information purposes only. ASME Y14.5M JEDEC Equivalent: MO-187 Drawing C04-111 Revised 07-21-05 DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 14-Lead Plastic Dual In-line (PDIP) Number Pins Pitch Seating Plane .140 .170 Molded Package Thickness .115 .145 Base Seating Plane .015 Shoulder Shoulder Width .300 .313 .325 Molded Package Width .240 .250 .260 Overall Length .740 .750 .760 Seating Plane .125 .130 .135 Lead Thickness .008 .012 .015 Upper Lead Width .045 .058 .070 Lower Lead Width .014 .018 .022 Overall Spacing .310 .370 .430 Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-005 Units Dimension Limits INCHES* .100 .155 .130 MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 14-Lead Plastic Small Outline (SL) Narrow, (SOIC) Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits .053 .052 .004 .228 .150 .337 .010 .016 .008 .014 INCHES* .050 .061 .056 .007 .236 .154 .342 .015 .033 .009 .017 .069 .061 .010 .244 .157 .347 .020 .050 .010 .020 MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0.20 0.23 0.36 0.42 1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 0.25 0.51 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-065 DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 14-Lead Plastic Thin Shrink Small Outline (ST) (TSSOP) Units Dimension Limits .039 .033 .002 .246 .169 .193 .020 .004 .007 INCHES .026 .041 .035 .004 .251 .173 .197 .024 .006 .010 MILLIMETERS* 0.65 .043 .037 .006 .256 .177 .201 .028 .008 .012 1.00 0.85 0.05 6.25 4.30 4.90 0.50 0.09 0.19 1.05 0.90 0.10 6.38 4.40 5.00 0.60 0.15 0.25 Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom 1.10 0.95 0.15 6.50 4.50 5.10 0.70 0.20 0.30 Controlling Parameter Notes: Dimensions include mold protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. ASME Y14.5M REF: Reference Dimension, usually without tole rance, information purposes only. ASME Y14.5M JEDEC Equivalent: MO-153 AB-1 Drawing C04-087 Revised: 08-17-05 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 NOTES: DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 APPENDIX REVISION HISTORY Revision (March 2006) following list modifications: Added SOT-23-5 package option single amps MCP6021 MCP6021R (E-temp only). Added MSOP-8 package option E-temp single (MCP6021). Corrected package drawing front page dual (MCP6022). Clarified spec conditions (ISC, THD+N) Section "Typical Performance Curves". Added Section "Pin Descriptions". Updated Section "Applications information" THD+N, unused amps, gain peaking discussions. Corrected updated package marking information Section "Packaging Information". Added Appendix "REVISION HISTORY". Revision (November 2003) Second Release this Document Revision (November 2001) Original Release this Document 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 NOTES: DS21685C-page 2006 Microchip Technology Inc. MCP6021/1R/2/3/4 PRODUCT IDENTIFICATION SYSTEM order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Temperature Range Package Device: MCP6021 MCP6021T Single Single (Tape Reel SOT-23, SOIC, TSSOP, MSOP) MCP6021R Single MCP6021RT Single (Tape Reel SOT-23) MCP6022 Dual MCP6022T Dual (Tape Reel SOIC TSSOP) MCP6023 Single MCP6023T Single (Tape Reel SOIC TSSOP) MCP6024 Quad MCP6024T Quad (Tape Reel SOIC TSSOP) Examples: MCP6021T-E/OT: Tape Reel, Extended temperature, SOT-23. MCP6021-E/P: Extended temperature, PDIP. MCP6021-E/SN: Extended temperature, SOIC. MCP6021RT-E/OT:Tape Reel, Extended temperature, SOT-23. Industrial temperature, PDIP. MCP6022-E/P: Extended temperature, PDIP. MCP6022T-E/ST: Tape Reel, Extended temperature, TSSOP. Industrial temperature, PDIP. MCP6023-E/P: Extended temperature, PDIP. MCP6023-E/SN: Extended temperature, SOIC. Industrial temperature, 14LD SOIC. MCP6024-E/SL: Extended temperature, 14LD SOIC. MCP6024T-E/ST: Tape Reel, Extended temperature, 14LD TSSOP. MCP6024-I/SL: MCP6023-I/P: MCP6022-I/P: Temperature Range: -40°C +85°C -40°C +125°C Package: Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6021, E-Temp; MCP6021R, E-Temp) Plastic MSOP, 8-lead (MCP6021, E-Temp) Plastic (300 Body), 8-lead, 14-lead Plastic SOIC (150mil Body), 8-lead Plastic SOIC (150 Body), 14-lead Plastic TSSOP, 8-lead (MCP6021,I-Temp; MCP6022, I-Temp, E-Temp; MCP6023, I-Temp, E-Temp;) Plastic TSSOP, 14-lead 2006 Microchip Technology Inc. DS21685C-page MCP6021/1R/2/3/4 NOTES: DS21685C-page 2006 Microchip Technology Inc. Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable." Code protection constantly evolving. Microchip committed continuously improving code protection features products. Attempts break Microchip's code protection feature violation Digital Millennium Copyright Act. such acts allow unauthorized access your software other copyrighted work, have right relief under that Act. Information contained this publication regarding device applications like provided only your convenience superseded updates. your responsibility ensure that your application meets with your specifications. MICROCHIP MAKES REPRESENTATIONS WARRANTIES KIND WHETHER EXPRESS IMPLIED, WRITTEN ORAL, STATUTORY OTHERWISE, RELATED INFORMATION, INCLUDING LIMITED CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY FITNESS PURPOSE. Microchip disclaims liability arising from this information use. Microchip devices life support and/or safety applications entirely buyer's risk, buyer agrees defend, indemnify hold harmless Microchip from damages, claims, suits, expenses resulting from such use. licenses conveyed, implicitly otherwise, under Microchip intellectual property rights. Trademarks Microchip name logo, Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, MATE, PowerSmart, rfPIC, SmartShunt registered trademarks Microchip Technology Incorporated U.S.A. other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, Real ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock ZENA trademarks Microchip Technology Incorporated U.S.A. other countries. SQTP service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2006, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved. Printed recycled paper. Microchip received ISO/TS-16949:2002 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona Mountain View, California October 2003. Company's quality system processes procedures PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory analog products. addition, Microchip's quality system design manufacture development systems 9001:2000 certified. 2006 Microchip Technology Inc. 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