Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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High-performance, Low-power secureAVR Enhanced RISC Architecture
Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Power-down Modes Bond Locations Conforming 7816-2 Protection 6000V Operating Ranges: 2.7V 5.5V Compliant with ICAO FIPS201 Specifications, EMV2000 Specifications Available Wafers, Contact Modules, Dual Interface Modules, Full Contactless Modules Inlays Industry-standard Packages
Contactless Mode
Contactless Interface with Full Support ISO/IEC 14443 Type Protocols Supply Voltage Clamp Regulation Full-bridge Power Rectification On-chip Tuning Capacitance: 13.56 Clock Extraction Internal Maximum Frequency: (External clock) 40MHz (Internal clock) Reader-to-card: ISO/IEC Type 100% Modulation Modified Miller Coding ISO/IEC Type Modulation Coding Card-to-reader: ISO/IEC Type Generation 847.5Khz Subcarrier with Modulation Manchester Coding ISO/IEC Type Modulation Incoming Carrier Resistive Load Switching Generation 847.5Khz Subcarrier with BPSK Modulation Data Encoding Baud Rates: kbps Frame: Bytes
Secure Microcontroller Smart Cards AT90SC 256144RCFT Summary
Memory
256K Bytes Program Memory Bytes Dedicated ATMEL's Cryptographic Libraries 144K Bytes EEPROM, Including Bytes 384-byte Bit-addressable Bytes
128-byte Program Erase Program Erase Typically 500,000 Write/Erase Cycles Temperature 25oC Years Data Retention Bytes Bytes Dedicated
Peripherals
Interrupt Driven ISO14443 Contactless Controller with Transmit Receive 7816 Controller
kbps Compliant with Protocols Port Programmable Internal Oscillator AdvX Internal Clock) Three 16-bit Timers (Watchdog capability) Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller Hardware Triple DPA/SPA/DEMA Resistant Checksum Accelerator CRC16 Engine (Compliant with ISO/IEC 3309)
6534AS-SCIC-13Oct06
Note: This summary document. complete document will available under NDA. more information, please contact your local Atmel sales office.
32-bit AdvX Cryptographic Accelerator Public Operations with GF92n) Multiplier Firmware (RSA, DSA, ECC,
Generation, AES, MD5, SHA-1, SHA-256)
Controller Speed-up Data Transfers when communicating Contactless Interface EAES Engine (Optional)
Security
Dedicated Hardware Protection Against SPA/DPA/SEMA/DEMA Attacks Advanced Protection Against Physical Attack, Including Active Shield Environmental Protection Systems Voltage Monitor Frequency Monitor Light protection Temperature Monitor Secure Memory Management/Access Protection (Supervisor Mode) Designed meet Common Criteria EAL5+
Development Tools
Voyager Emulation Platform (ATV4 Advanced) Support Software Development Embedded Workbench AVR® V3.20c Debugger Atmel's Studio® Version 4.07 Above Software Libraries Application Notes
Description
AT90SC256144RCFT low-power, high-performance, 8-/16-bit microcontroller with program memory, EEPROM data memor based secureAVR enhanced RISC architecture with dual interface (contact+contactless). executing powerful instructions single clock cycle, AT90SC256144RCFT achieves throughputs close MIPS MHz. Harvard architecture includes general-purpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. AT90SC256144RCFT uses secureAVR architecture that allows linear addressing bytes code bytes data well number functional security features. AT90SC256144RCFT features 144K bytes high-performance EEPROM (fast erase/write time, high endurance).This allows system developers offer their customers true 128K bytes EEPROM, while still being able remaining bytes their purposes (customization patches, example). ability EEPROM code space allows parts program memory reprogrammed in-system. cryptographic accelerator featured AT90SC256144RCFT AdvX, N-bit multiplier-accumulator dedicated performing fast encryption authentication functions. cryptographic routines executed secureAVR core which uses AdvX accelerator during encryption/decryption. AdvX based 32-bit technology, thus enabling fast computation power operation. AdvX supports standard finite fields arithmetic functions (including RSA, GF(2N) arithmetic functions (including ECC). Engine provided optional feature. Additional security features include power, frequency temperature protection logic, logical scrambling program data addresses, power analysis countermeasures, memory accesses controlled supervisor mode. This product specifically designed Smart Cards targets Access Control applications. block diagram AT90SC256144RCF shown Figure
AT90SC256144RCFT
6534AS-SCIC-13Oct06
AT90SC256144RCFT
Figure AT90SC256144RCFT Contact/Contactless secureAVR Enhanced RISC Architecture
32KB Cryptography
Data 8-bit
144KB EEPROM User Memory 256KB Program Memory Instruction Register Instruction Decoder
Access Control
Secure Control
General Purpose Registers
Data Memory Interrupt Unit 7816 Controller 7816 Port
IN/OUT0
7816 Port
IN/OUT1
Control Lines Status Register
ISO14443 Controller (CIC)
Controller
Access Control
Modulator Power Clock
Timers
TDES
Reset Circuit
AdvX
Crypto-Accelerator
Counter Measures
Checksum Accelerator
6534AS-SCIC-13Oct06
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6534AS-SCIC-13Oct06

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