128K (16,384 256K (32,768 Description AT24C128/256 provides

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128K (16,384 256K (32,768 Description AT24C128/256 provides

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Two-wire Serial EEPROMs
128K (16,384 256K (32,768
Description
AT24C128/256 provides 131,072/262,144 bits serial electrically erasable programmable read only memory (EEPROM) organized 16,384/32,768 words bits each. device's cascadable feature allows devices share common Two-wire bus. device optimized many industrial commercial applications where power voltage operation essential. devices available space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead (24C128), 8-lead TSSOP, 8-lead SOIC Array Package 8-ball dBGA2 packages. addition, entire family available 2.7V (2.7V 5.5V) 1.8V (1.8V 3.6V) versions. Table Configuration
Name Function
AT24C128 AT24C256(1)
Note: recommended design; please refer AT24C256B datasheet.
8-lead PDIP
8-lead TSSOP
Address Inputs Serial Data Serial Clock Input Write Protect Connect Ground
8-lead SOIC
8-lead
Bottom View 8-ball dBGA2
8-lead
Bottom View
Bottom View
0670S-SEEPR-5/06
Absolute Maximum Ratings*
Operating Temperature.-55°C +125°C Storage Temperature .-65°C +150°C Voltage with Respect Ground -1.0V +7.0V Maximum Operating Voltage 6.25V Output Current. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
Figure Block Diagram
AT24C128/256
0670S-SEEPR-5/06
AT24C128/256
Description
SERIAL CLOCK (SCL): input used positive edge clock data into each EEPROM device negative edge clock data each device. SERIAL DATA (SDA): bidirectional serial data transfer. This opendrain driven wire-ORed with number other open-drain open collector devices. DEVICE/ADDRESSES (A1, A0): pins device address inputs that hardwired left connected hardware compatibility with other AT24CXX devices. When pins hardwired, many four 128K/256K devices addressed single system (device addressing discussed detail under Device Addressing section). pins left floating, pins will internally pulled down capacitive coupling circuit board plane coupling Atmel recommends connecting address pins GND. WRITE PROTECT (WP): write protect input, when connected GND, allows normal write operations. When connected high VCC, write operations memory inhibited. left floating, will internally pulled down capacitive coupling circuit board plane coupling Atmel recommends connecting GND.
Memory Organization
AT24C128/256, 128K/256K SERIAL EEPROM: 128K/256K internally organized 256/512 pages 64-bytes each. Random word addressing requires 14/15-bit data word address.
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Table Capacitance(1) Applicable over recommended operating range from 25°C, MHz, +1.8V.
Symbol CI/O Note: Test Condition Input/Output Capacitance (SDA) Input Capacitance (A0, SCL) This parameter characterized 100% tested. Units Conditions VI/O
Table Characteristics(1) Applicable over recommended operating range from: -40°C +85°C, +1.8V +5.5V; TAE= -40°C +125°C(2), +2.7V +5.5V(unless otherwise noted).
Symbol VCC1 VCC2 VCC3 ICC1 ICC2 ISB1 Parameter Supply Voltage Supply Voltage Supply Voltage Supply Current Supply Current Standby Current (1.8V option) Standby Current (2.5V option) Standby Current (5.0V option) Input Leakage Current Output Leakage Current Input Level(1) Input High Level
Test Condition
Units
5.0V 5.0V 1.8V 3.6V 2.5V 5.5V 5.5V VOUT
READ WRITE
ISB2 ISB3 VOL2 VOL1 Notes:
0.10 0.05 -0.6
Output Level Output Level
3.0V 1.8V
0.15
reference only tested. AT24C128/256 bearing process letter package (the mark located lower right corner topside package) approved operation extended temperature range.
AT24C128/256
0670S-SEEPR-5/06
AT24C128/256
Table Characteristics Industrial Temperatures Applicable over recommended operating range from -40°C +85°C, +1.8V +5.5V, (unless otherwise noted). Test conditions listed Note
1.8-volt Symbol fSCL tLOW tHIGH tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO Endurance(1) Notes: Parameter Clock Frequency, Clock Pulse Width Clock Pulse Width High Clock Data Valid Time must free before transmission start(1) Start Hold Time Start Set-up Time Data Hold Time Data Set-up Time Inputs Rise Time Inputs Fall Time
2.5-volt 0.05 0.25 0.25 0.25
5.0-volt 1000 Units 0.55
0.05
Stop Set-up Time Data Hold Time Write Cycle Time 25°C, Page Mode
Write Cycles
100k 1,000,000(4)
This parameter characterized 100% tested. measurement conditions: (connects VCC): (2.5V, 5V), (1.8V) Input pulse voltages: Input rise fall times: Input output timing reference voltages: Write Cycle Time only applies AT24C128/256 devices bearing process letter package (the mark located lower right corner side package). AT24C128/256 bearing process letter package (the mark located lower right corner side package), guarantees million write cycle endurance (1.8 3.6V).
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Table Characteristics(5) Extended Temperatures Applicable over recommended operating range from -40°C +125°C, +2.7V +5.5V, (unless otherwise noted). Test conditions listed Note
2.7-volt Symbol fSCL tLOW tHIGH tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO Endurance(1) Notes: Parameter Clock Frequency, Clock Pulse Width Clock Pulse Width High Clock Data Valid Time must free before transmission start(1) Start Hold Time Start Set-up Time Data Hold Time Data Set-up Time Inputs Rise Time Inputs Fall Time
5.0-volt 1000 Units 0.55 0.25
0.05
0.05 0.25 0.25
Stop Set-up Time Data Hold Time Write Cycle Time 25°C, Page Mode
Write Cycles
100k 1,000,000(4)
This parameter characterized 100% tested. measurement conditions: (connects VCC): (2.5V, 5V), (1.8V) Input pulse voltages: Input rise fall times: Input output timing reference voltages: Write Cycle Time only applies AT24C128/256 devices bearing process letter package (the mark located lower right corner side package). AT24C128/256 bearing process letter package (the mark located lower right corner side package), guarantees million write cycle endurance (1.8 3.6V). AT24C128/256 bearing process letter package (the mark located lower right corner topside package) approved operation extended temperature range.
AT24C128/256
0670S-SEEPR-5/06
AT24C128/256
Device Operation
CLOCK DATA TRANSITIONS: normally pulled high with external device. Data change only during time periods (see Figure page Data changes during high periods will indicate start stop condition defined below. START CONDITION: high-to-low transition with high start condition which must precede other command (see Figure page STOP CONDITION: low-to-high transition with high stop condition. After read sequence, stop command will place EEPROM standby power mode (see Figure page ACKNOWLEDGE: addresses data words serially transmitted from EEPROM 8-bit words. EEPROM sends zero during ninth clock cycle acknowledge that received each word. STANDBY MODE: AT24C128/256 features power standby mode which enabled: upon power-up after receipt STOP completion internal operations. MEMORY RESET: After interruption protocol, power loss system reset, two-wire part reset following these steps: Clock cycles, look high each cycle while high then create start condition high.
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Figure Timing (SCL: Serial Clock, SDA: Serial Data I/O®)
Figure Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)
WORDn
STOP CONDITION
START CONDITION
Note:
write cycle time time from valid stop condition write sequence internal clear/write cycle.
Figure Data Validity
AT24C128/256
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AT24C128/256
Figure Start Stop Definition
Figure Output Acknowledge
Device Addressing
128K/256K EEPROM requires 8-bit device address word following start condition enable chip read write operation (see Figure page 11). device address word consists mandatory one, zero sequence first five most significant bits shown. This common two-wire EEPROM devices. 128K/256K uses device address bits allow many four devices same bus. These bits must compare their corresponding hardwired input pins. pins internal proprietary circuit that biases them logic condition pins allowed float. eighth device address read/write operation select bit. read operation initiated this high write operation initiated this low. Upon compare device address, EEPROM will output zero. compare made, device will return standby state. DATA SECURITY: AT24C128/256 hardware data protection scheme that allows user write protect whole memory when VCC.
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Write Operations
BYTE WRITE: write operation requires 8-bit data word addresses following device address word acknowledgment. Upon receipt this address, EEPROM will again respond with zero then clock first 8-bit data word. Following receipt 8-bit data word, EEPROM will output zero. addressing device, such microcontroller, then must terminate write sequence with stop condition. this time EEPROM enters internally-timed write cycle, tWR, nonvolatile memory. inputs disabled during this write cycle EEPROM will respond until write complete (see Figure page 11). PAGE WRITE: 128K/256K EEPROM capable 64-byte page writes. page write initiated same byte write, microcontroller does send stop condition after first data word clocked Instead, after EEPROM acknowledges receipt first data word, microcontroller transmit more data words. EEPROM will respond with zero after each data word received. microcontroller must terminate page write sequence with stop condition (see Figure page 12). data word address lower bits internally incremented following receipt each data word. higher data word address bits incremented, retaining memory page location. When word address, internally generated, reaches page boundary, following byte placed beginning same page. more than data words transmitted EEPROM, data word address will "roll over" previous data will overwritten. address "roll over" during write from last byte current page first byte same page. ACKNOWLEDGE POLLING: Once internally-timed write cycle started EEPROM inputs disabled, acknowledge polling initiated. This involves sending start condition followed device address word. read/write representative operation desired. Only internal write cycle completed will EEPROM respond with zero, allowing read write sequence continue.
AT24C128/256
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AT24C128/256
Read Operations
Read operations initiated same write operations with exception that read/write select device address word one. There three read operations: current address read, random address read sequential read. CURRENT ADDRESS READ: internal data word address counter maintains last address accessed during last read write operation, incremented one. This address stays valid between operations long chip power maintained. address "roll over" during read from last byte last memory page, first byte first page. Once device address with read/write select clocked acknowledged EEPROM, current address data word serially clocked out. microcontroller does respond with input zero does generate following stop condition (see Figure page 12). RANDOM READ: random read requires "dummy" byte write sequence load data word address. Once device address word data word address clocked acknowledged EEPROM, microcontroller must generate another start condition. microcontroller initiates current address read sending device address with read/write select high. EEPROM acknowledges device address serially clocks data word. microcontroller does respond with zero does generate following stop condition (see Figure page 12). SEQUENTIAL READ: Sequential reads initiated either current address read random address read. After microcontroller receives data word, responds with acknowledge. long EEPROM receives acknowledge, will continue increment data word address serially clock sequential data words. When memory address limit reached, data word address will "roll over" sequential read will continue. sequential read operation terminated when microcontroller does respond with zero does generate following stop condition (see Figure page 12). Figure Device Address
Figure Byte Write
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Figure Page Write
Notes:
DON'T CARE bit) DON'T CARE 128K)
Figure Current Address Read
Figure Random Read
Notes:
DON'T CARE bit) DON'T CARE 128K)
Figure Sequential Read
AT24C128/256
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AT24C128/256
AT24C128 Ordering Information(1)
Ordering Code AT24C128-10PI-2.7 AT24C128N-10SI-2.7 AT24C128W-10SI-2.7 AT24C128-10TI-2.7 AT24C128-10PI-1.8 AT24C128N-10SI-1.8 AT24C128W-10SI-1.8 AT24C128-10TI-1.8 AT24C128-10PU-2.7(2) AT24C128-10PU-1.8(2) AT24C128N-10SU-2.7(2) AT24C128N-10SU-1.8(2) AT24C128W-10SU-2.7(2) AT24C128W-10SU-1.8(2) AT24C128-10TU-2.7(2) AT24C128-10TU-1.8(2) AT24C128U2-10UU-1.8(2) AT24C128Y1-10YU-1.8(2) AT24C128Y4-10YU-1.8(2) AT24C128-W2.7-11(3) AT24C128-W1.8-11(3) Notes: Package 8U2-1 Sale Sale Operation Range Industrial Temperature (-40°C 85°C)
Industrial Temperature (-40°C 85°C)
Lead-free/Halogen-free/ Industrial Temperature (-40°C 85°C)
Industrial Temperature (-40°C 85°C)
2.7V devices used 4.5V 5.5V range, please refer performance values characteristics tables. designates Green package RoHS compliant. Available waffle pack wafer form; order SL719 wafer form. Bumped available upon request. Please contact Serial EEPROM Marketing.
Package Type 8U2-1 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA2) 8-lead, 4.90 3.00 Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) 8-lead, 6.00 4.90 Body, Dual Footprint, Non-leaded, Small Array Package (SAP) 8-lead, Body, Plastic Thin Shrink Small Outline Package (TSSOP) Options -2.7 -1.8 Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V)
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AT24C256 Ordering Information(1)
Ordering Code AT24C256-10PI-2.7 AT24C256N-10SI-2.7 AT24C256W-10SI-2.7 AT24C256-10TI-2.7 AT24C256-10PI-1.8 AT24C256N-10SI-1.8 AT24C256W-10SI-1.8 AT24C256-10TI-1.8 AT24C256-10PU-2.7(2) AT24C256-10PU-1.8(2) AT24C256N-10SU-2.7(2) AT24C256N-10SU-1.8(2) AT24C256W-10SU-2.7(2) AT24C256W-10SU-1.8(2) AT24C256-10TU-2.7(2) AT24C256-10TU-1.8(2) AT24C256U2-10UU-1.8(2) AT24C256Y1-10YU-1.8(2) AT24C256Y4-10YU-1.8(2) AT24C256-W2.7-11(3) AT24C256-W1.8-11(3) Notes: Package 8U2-1 Sale Sale Operation Range Industrial Temperature (-40°C 85°C)
Industrial Temperature (-40°C 85°C)
Lead-free/Halogen-free/ Industrial Temperature (-40°C 85°C)
Industrial Temperature (-40°C 85°C)
This device recommended design. Please refer AT24C256B datasheet. 2.7V devices used 4.5V 5.5V range, please refer performance values characteristics tables. designates Green Package RoHS compliant. Available waffle pack wafer form; order SL719 wafer form. Bumped available upon request. Please contact Serial EEPROM Marketing.
Package Type 8U2-1 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA2) 8-lead, 4.90 3.00 Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) 8-lead, 6.00 4.90 Body, Dual Footprint, Non-leaded, Small Array Package (SAP) 8-lead, Body, Plastic Thin Shrink Small Outline Package (TSSOP) Options -2.7 -1.8 Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V)
AT24C128/256
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AT24C128/256
Packaging Information
PDIP
View
View
SYMBOL
COMMON DIMENSIONS (Unit Measure inches) NOTE
0.115 0.014 0.045 0.030 0.008 0.355 0.005 0.300 0.240 0.310 0.250 0.100 0.300 0.115 0.130 0.130 0.018 0.060 0.039 0.010 0.365
0.210 0.195 0.022 0.070 0.045 0.014 0.400
PLCS
0.325 0.280
Side View
0.150
Notes:
This drawing general information only; refer JEDEC Drawing MS-001, Variation additional information. Dimensions measured with package seated JEDEC seating plane Gauge GS-3. dimensions include mold Flash protrusions. Mold Flash protrusions shall exceed 0.010 inch. measured with leads constrained perpendicular datum. Pointed rounded lead tips preferred ease insertion. maximum dimensions include Dambar protrusions. Dambar protrusions shall exceed 0.010 (0.25 mm).
01/09/02 2325 Orchard Parkway Jose, 95131 TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) DRAWING REV.
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JEDEC SOIC
View View
SYMBOL COMMON DIMENSIONS (Unit Measure 1.35 0.10 0.31 0.17 4.80 3.81 5.79 1.27 0.40 1.27 1.75 0.25 0.51 0.25 5.00 3.99 6.20 NOTE
Side View
Note: These drawings general information only. Refer JEDEC Drawing MS-012, Variation proper dimensions, tolerances, datums, etc.
10/7/03 1150 Cheyenne Mtn. Blvd. Colorado Springs, 80906 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) DRAWING REV.
AT24C128/256
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AT24C128/256
EIAJ SOIC
View
View
SYMBOL
COMMON DIMENSIONS (Unit Measure NOTE
1.70 0.05 0.35 0.15 5.13 5.18 7.70 0.51 1.27
2.16 0.25 0.48 0.35 5.35 5.40 8.26 0.85
Side View
Notes:
This drawing general information only; refer EIAJ Drawing EDR-7320 additional information. Mismatch upper lower dies resin burrs included. recommended that upper lower cavities equal. they different, larger dimension shall regarded. Determines true geometric position. Values apply pb/Sn solder plated terminal. standard thickness solder layer shall 0.010 +0.010/-0.005
10/7/03 2325 Orchard Parkway Jose, 95131 TITLE 8S2, 8-lead, 0.209" Body, Plastic Small Outline Package (EIAJ) DRAWING
REV.
0670S-SEEPR-5/06
8U2-1 dBGA2
BALL CORNER
View
BALL CORNER
Side View
(e1)
(d1)
COMMON DIMENSIONS (Unit Measure SYMBOL This drawing general information only. Dimension measured maximum solder ball diameter. 0.81 0.15 0.40 0.25 0.91 0.20 0.45 0.30 2.35 3.73 0.75 0.74 0.75 0.80 1.00 0.25 0.50 0.35 NOTE
Bottom View
Solder Balls
6/24/03 1150 Cheyenne Mtn. Blvd. Colorado Springs, 80906 TITLE 8U2-1, 8-ball, 2.35 3.73 Body, 0.75 pitch, Small Ball Grid Array Package (dBGA2) DRAWING PO8U2-1 REV.
AT24C128/256
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AT24C128/256
INDEX AREA
INDEX AREA
View
View
Bottom View
COMMON DIMENSIONS (Unit Measure
SYMBOL
0.00 4.70 2.80 0.85 0.85 0.25
4.90 3.00 1.00 1.00 0.30 0.65
0.90 0.05 5.10 3.20 1.15 1.15 0.35
NOTE
Side View
0.50
0.60
0.70
2/28/03 2325 Orchard Parkway Jose, 95131 TITLE 8Y1, 8-lead (4.90 3.00 Body) MSOP Array Package (MAP) DRAWING REV.
0670S-SEEPR-5/06
AT24C128/256
INDEX AREA
COMMON DIMENSIONS (Unit Measure SYMBOL 0.50 0.00 5.80 4.70 2.85 2.85 0.35 6.00 4.90 3.00 3.00 0.40 1.27 3.81 0.60 0.70 0.90 0.05 6.20 5.10 3.15 3.15 0.45 NOTE
5/24/04 1150 Cheyenne Mtn. Blvd. Colorado Springs, 80906 TITLE 8Y4, 8-lead (6.00 4.90 Body) SOIC Array Package (SAP) DRAWING REV.
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AT24C128/256
TSSOP
indicator this corner
View
View
COMMON DIMENSIONS (Unit Measure SYMBOL 2.90 3.00 6.40 4.30 0.80 0.19 4.40 1.00 0.65 0.45 0.60 1.00 0.75 4.50 1.20 1.05 0.30 3.10 NOTE
Side View
Notes:
This drawing general information only. Refer JEDEC Drawing MO-153, Variation proper dimensions, tolerances, datums, etc. Dimension does include mold Flash, protrusions gate burrs. Mold Flash, protrusions gate burrs shall exceed 0.15 (0.006 side. Dimension does include inter-lead Flash protrusions. Inter-lead Flash protrusions shall exceed 0.25 (0.010 side. Dimension does include Dambar protrusion. Allowable Dambar protrusion shall 0.08 total excess dimension maximum material condition. Dambar cannot located lower radius foot. Minimum space between protrusion adjacent lead 0.07 Dimension determined Datum Plane 5/30/02
2325 Orchard Parkway Jose, 95131
TITLE 8A2, 8-lead, Body, Plastic Thin Shrink Small Outline Package (TSSOP)
DRAWING
REV.
0670S-SEEPR-5/06
Revision History
Doc. Rev. 0670S
Comments Implemented Revision History page; Added Note "Not recommended design; please refer AT24C256B datasheet" AT24C256 part Pages
AT24C128/256
0670S-SEEPR-5/06
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0670S-SEEPR-5/06

128K (16,384 256K (32,768 Description AT24C128/256 provides

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