1024 (8K) 2048 (16K) Two-wire Serial Interface Schmitt Trigger, Filter

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1024 (8K) 2048 (16K) Two-wire Serial Interface Schmitt Trigger, Filter

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Standard-voltage Operation Automotive Temperature Range -40°C 125°C Internally Organized (1K), (2K), (4K),
1024 (8K) 2048 (16K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs Noise Suppression Bidirectional Data Transfer Protocol Compatibility Write Protect Hardware Data Protection 8-byte Page (1K, 2K), 16-byte Page (4K, 16K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle max) High-reliability Endurance: Million Write Cycles Data Retention: Years 8-lead JEDEC SOIC 8-lead TSSOP Packages (VCC 2.7V 5.5V)
Two-wire Automotive Temperature Serial EEPROM
(128 (256 (512 (1024 (2048
Description
AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits serial electrically erasable programmable read-only memory (EEPROM) organized 128/256/512/1024/2048 words bits each. device optimized many automotive applications where low-power low-voltage operation essential. AT24C01A/02/04/08A/16A available space-saving 8-lead JEDEC SOIC 8-lead TSSOP packages accessed two-wire serial interface. addition, entire family available 2.7V (2.7V 5.5V) versions.
Table Configurations
Name Function Address Inputs Serial Data Serial Clock Input Write Protect Connect
8-lead SOIC
8-lead TSSOP
AT24C01A AT24C02(1) AT24C04 AT24C08A AT24C16A
Note: AT24C02 recommended design.
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Absolute Maximum Ratings
Operating Temperature.-55°C +125°C Storage Temperature .-65°C +150°C Voltage with Respect Ground -1.0V +7.0V Maximum Operating Voltage 6.25V Output Current. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
Figure Block Diagram
Description
SERIAL CLOCK (SCL): input used positive edge clock data into each EEPROM device negative edge clock data each device. SERIAL DATA (SDA): bi-directional serial data transfer. This open-drain driven wire-ORed with number other open-drain opencollector devices. DEVICE/PAGE ADDRESSES (A2, A0): pins device address inputs that hard wired AT24C01A AT24C02. many eight 1K/2K devices addressed single system (device addressing discussed detail under Device Addressing section). AT24C04 uses inputs hard wire addressing total four devices addressed single system. connect.
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AT24C01A/02/04/08A/16A
AT24C08A only uses input hardwire addressing total devices addressed single system. pins connects. AT24C16A does device address pins, which limits number devices single one. pins connects. WRITE PROTECT (WP): AT24C01A/02/04/08A/16A Write Protect that provides hardware data protection. Write Protect allows normal read/write operations when connected ground (GND). When Write Protect connected VCC, write protection feature enabled operates shown following table. Table Write Protect
Status Part Array Protected 24C01A Full (1K) Array 24C02 Full (2K) Array 24C04 Full (4K) Array 24C08A Full (8K) Array 24C16A Full (16K) Array
Normal Read/Write Operations
Memory Organization
AT24C01A, SERIAL EEPROM: Internally organized with pages bytes each, requires 7-bit data word address random word addressing. AT24C02, SERIAL EEPROM: Internally organized with pages bytes each, requires 8-bit data word address random word addressing. AT24C04, SERIAL EEPROM: Internally organized with pages bytes each, requires 9-bit data word address random word addressing. AT24C08A, SERIAL EEPROM: Internally organized with pages bytes each, requires 10-bit data word address random word addressing. AT24C16A, SERIAL EEPROM: Internally organized with pages bytes each, requires 11-bit data word address random word addressing.
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Table Capacitance(1) Applicable over recommended operating range from 25°C, MHz, +2.7V
Symbol CI/O Note: Test Condition Input/Output Capacitance (SDA) Input Capacitance (A0, SCL) This parameter characterized 100% tested. Units Conditions VI/O
Table Characteristics Applicable over recommended operating range from: -40°C +125°C, +2.7V +5.5V (unless otherwise noted)
Symbol VCC1 ISB1 ISB2 VOL2 VOL1 Note: Parameter Supply Voltage Supply Current 5.0V Supply Current 5.0V Standby Current 2.7V Standby Current 5.0V Input Leakage Current Output Leakage Current Input Level
Test Condition
Units
Read Write VOUT -0.6 0.15
0.10 0.05
18.0
Input High Level
Output Level 3.0V Output Level 1.8V
reference only tested.
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AT24C01A/02/04/08A/16A
Table Characteristics Applicable over recommended operating range from -40°C +125°C, +2.7V +5.5V, Gate (unless otherwise noted)
AT24C01A/02/04/08A/16A Symbol fSCL tLOW tHIGH tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO Endurance Note:
Parameter Clock Frequency, Clock Pulse Width Clock Pulse Width High Noise Suppression Time
Units
Write Cycles
Clock Data Valid Time must free before transmission start(2) Start Hold Time Start Set-up Time Data Hold Time Data Set-up Time Inputs Rise Time(2) Inputs Fall Time
Stop Set-up Time Data Hold Time Write Cycle Time 5.0V, 25°C, Page Mode
This parameter characterized 100% tested 25°C). This parameter characterized.
Device Operation
CLOCK DATA TRANSITIONS: normally pulled high with external device. Data change only during time periods (see Figure page Data changes during high periods will indicate start stop condition defined below. START CONDITION: high-to-low transition with high start condition which must precede other command (see Figure page STOP CONDITION: low-to-high transition with high stop condition. After read sequence, stop command will place EEPROM standby power mode (see Figure page ACKNOWLEDGE: addresses data words serially transmitted from EEPROM 8-bit words. EEPROM sends acknowledge that received each word. This happens during ninth clock cycle. STANDBY MODE: AT24C01A/02/04/08A/16A features low-power standby mode which enabled: upon power-up after receipt STOP completion internal operations.
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MEMORY RESET: After interruption protocol, power loss system reset, two-wire part reset following these steps: Clock cycles. Look high each cycle while high. Create start condition.
Timing
Figure SCL: Serial Clock, SDA: Serial Data
Write Cycle Timing
Figure SCL: Serial Clock, SDA: Serial Data
WORDn
STOP CONDITION
START CONDITION
Note:
write cycle time time from valid stop condition write sequence internal clear/write cycle.
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Figure Data Validity
Figure Start Stop Definition
STOP
Figure Output Acknowledge
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Device Addressing
EEPROM devices require 8-bit device address word following start condition enable chip read write operation (see Figure page device address word consists mandatory "1", sequence first four most significant bits shown. This common Serial EEPROM devices. next bits device address bits 1K/2K EEPROM. These bits must compare their corresponding hardwired input pins. EEPROM only uses device address bits with third being memory page address bit. device address bits must compare their corresponding hardwired input pins. connect. EEPROM only uses device address with next bits being memory page addressing. must compare corresponding hardwired input pin. pins connect. does device address bits instead three bits used memory page addressing. These page addressing bits devices should considered most significant bits data word address which follows. pins connect. eighth device address read/write operation select bit. read operation initiated this high write operation initiated this low. Upon compare device address, EEPROM will output "0". compare made, chip will return standby state.
Write Operations
BYTE WRITE: write operation requires 8-bit data word address following device address word acknowledgment. Upon receipt this address, EEPROM will again respond with then clock first 8-bit data word. Following receipt 8-bit data word, EEPROM will output addressing device, such microcontroller, must terminate write sequence with stop condition. this time EEPROM enters internally timed write cycle, tWR, nonvolatile memory. inputs disabled during this write cycle EEPROM will respond until write complete (see Figure page 10). PAGE WRITE: 1K/2K EEPROM capable 8-byte page write, devices capable 16-byte page writes. page write initiated same byte write, microcontroller does send stop condition after first data word clocked Instead, after EEPROM acknowledges receipt first data word, microcontroller transmit seven (1K/2K) fifteen (4K, 16K) more data words. EEPROM will respond with after each data word received. microcontroller must terminate page write sequence with stop condition (see Figure page 10). data word address lower three (1K/2K) four (4K, 16K) bits internally incremented following receipt each data word. higher data word address bits incremented, retaining memory page location. When word address, internally generated, reaches page boundary, following byte placed beginning same page. more than eight (1K/2K) sixteen (4K, 16K) data words transmitted EEPROM, data word address will "roll over" previous data will overwritten. ACKNOWLEDGE POLLING: Once internally timed write cycle started EEPROM inputs disabled, acknowledge polling initiated. This involves send-
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start condition followed device address word. read/write representative operation desired. Only internal write cycle completed will EEPROM respond with "0", allowing read write sequence continue.
Read Operations
Read operations initiated same write operations with exception that read/write select device address word "1". There three read operations: current address read, random address read sequential read. CURRENT ADDRESS READ: internal data word address counter maintains last address accessed during last read write operation, incremented one. This address stays valid between operations long chip power maintained. address "roll over" during read from last byte last memory page first byte first page. address "roll over" during write from last byte current page first byte same page. Once device address with read/write select clocked acknowledged EEPROM, current address data word serially clocked out. microcontroller does respond with input does generate following stop condition (see Figure page 10). RANDOM READ: random read requires "dummy" byte write sequence load data word address. Once device address word data word address clocked acknowledged EEPROM, microcontroller must generate another start condition. microcontroller initiates current address read sending device address with read/write select high. EEPROM acknowledges device address serially clocks data word. microcontroller does respond with does generate following stop condition (see Figure page 11). SEQUENTIAL READ: Sequential reads initiated either current address read random address read. After microcontroller receives data word, responds with acknowledge. long EEPROM receives acknowledge, will continue increment data word address serially clock sequential data words. When memory address limit reached, data word address will "roll over" sequential read will continue. sequential read operation terminated when microcontroller does respond with does generate following stop condition (see Figure page 11). Figure Device Address
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Figure Byte Write
Figure Page Write
DON'T CARE Figure Current Address Read
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AT24C01A/02/04/08A/16A
Figure Random Read
DON'T CARE Figure Sequential Read
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AT24C01A Ordering Information
Ordering Code AT24C01A-10SQ-2.7 AT24C01A-10TQ-2.7 Package Operation Range Temperature (-40°C 125°C)
Package Type 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options -2.7 Low-voltage (2.7V 5.5V)
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AT24C01A/02/04/08A/16A
AT24C02 Ordering Information
Ordering Code AT24C02N-10SQ-2.7 AT24C02-10TQ-2.7 Package Operation Range Temperature (-40°C 125°C)
Package Type 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options -2.7 Low-voltage (2.7V 5.5V)
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AT24C04 Ordering Information
Ordering Code AT24C04N-10SQ-2.7 AT24C04-10TQ-2.7 Package Operation Range Temperature (-40°C 125°C)
Package Type 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options -2.7 Low-voltage (2.7V 5.5V)
AT24C01A/02/04/08A/16A
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AT24C01A/02/04/08A/16A
AT24C08A Ordering Information
Ordering Code AT24C08AN-10SQ-2.7 AT24C08A-10TQ-2.7 Note: Package Operation Range Lead-free/Halogen-free/ Automotive Temperature (-40°C 125°C)
2.7V devices used 4.5V 5.5V range, please refer performance values characteristics tables (Table page Table page
Package Type 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options -2.7 Voltage (2.7V 5.5V)
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AT24C16A Ordering Information
Ordering Code AT24C16AN-10SQ-2.7 AT24C16A-10TQ-2.7 Note: Package Operation Range Lead-free/Halogen-free/ Automotive Temperature (-40°C 125°C)
2.7V devices used 4.5V 5.5V range, please refer performance values characteristics tables (Table page Table page
Package Type 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options -2.7 Voltage (2.7V 5.5V)
AT24C01A/02/04/08A/16A
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AT24C01A/02/04/08A/16A
Packaging Information
JEDEC SOIC
View View
SYMBOL COMMON DIMENSIONS (Unit Measure 1.35 0.10 0.31 0.17 4.80 3.81 5.79 1.27 0.40 1.27 1.75 0.25 0.51 0.25 5.00 3.99 6.20 NOTE
Side View
Note: These drawings general information only. Refer JEDEC Drawing MS-012, Variation proper dimensions, tolerances, datums, etc.
10/7/03 1150 Cheyenne Mtn. Blvd. Colorado Springs, 80906 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) DRAWING REV.
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TSSOP
indicator this corner
View
View
COMMON DIMENSIONS (Unit Measure SYMBOL 2.90 3.00 6.40 4.30 0.80 0.19 4.40 1.00 0.65 0.45 0.60 1.00 0.75 4.50 1.20 1.05 0.30 3.10 NOTE
Side View
Notes:
This drawing general information only. Refer JEDEC Drawing MO-153, Variation proper dimensions, tolerances, datums, etc. Dimension does include mold Flash, protrusions gate burrs. Mold Flash, protrusions gate burrs shall exceed 0.15 (0.006 side. Dimension does include inter-lead Flash protrusions. Inter-lead Flash protrusions shall exceed 0.25 (0.010 side. Dimension does include Dambar protrusion. Allowable Dambar protrusion shall 0.08 total excess dimension maximum material condition. Dambar cannot located lower radius foot. Minimum space between protrusion adjacent lead 0.07 Dimension determined Datum Plane 5/30/02
2325 Orchard Parkway Jose, 95131
TITLE 8A2, 8-lead, Body, Plastic Thin Shrink Small Outline Package (TSSOP)
DRAWING
REV.
AT24C01A/02/04/08A/16A
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AT24C01A/02/04/08A/16A
Revision History
Doc. Rev. 5092C
Date 2/2007
Comments Implemented revision history. Removed PDIP offering parts. Added `AT24C02 Recommended Design' note page
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1024 (8K) 2048 (16K) Two-wire Serial Interface Schmitt Trigger, Filter

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