Data Sheet September 2006 FN6379.0 Ultra ON-Resistance, Low-Volta
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ISL54057
Data Sheet September 2006 FN6379.0
Ultra ON-Resistance, Low-Voltage, Single Supply, Differential Analog Multiplexer
Intersil ISL54057 device contains precision, bidirectional, analog switches configured differential 4-channel multiplexer/demultiplexer, designed operate from single +1.6V +3.6V supply. devices have inhibit simultaneously open signal paths. resistance 0.41 with supply 0.61 with single +1.8V supply. Each switch handle rail rail analog signals. off-leakage current only +25°C 35nA +85°C with +3.3V supply. digital inputs 1.8V logic-compatible when using single supply. ISL54057 differential multiplexer device that offered 2.6x1.8x0.5mm µTQFN package. Table summarizes performance this family.
TABLE FEATURES GLANCE ISL54057 Configuration tON/tOFF 1.8V 1.8V tON/tOFF Packages Diff 0.41 27ns/18ns 0.61 34ns/26ns 2.6x1.8x0.5mm µTQFN
Features
Pb-Free Plus Anneal Available (RoHS Compliant) Resistance (RON) +3.0V 0.41 +1.8V 0.61 Matching Between Channels. 0.09 Flatness Across Signal Range 0.07 Single Supply Operation. +1.6V +3.6V Power Consumption (PD). <0.18µW Fast Switching Action +3V) 27ns tOFF 18ns Break-Before-Make High Current Handling Capacity (300mA Continuous) Available 2.6x1.8x0.5mm µTQFN 1.8V CMOS-Logic Compatible (+3V Supply)
Applications
Battery Powered, Handheld, Portable Equipment Cellular/Mobile Phones Pagers Laptops, Notebooks, Palmtops Portable Test Measurement Medical Equipment Audio Video Switching
Related Literature
Technical Brief TB363 "Guidelines Handling Processing Moisture Sensitive Surface Mount Devices (SMDs)" Application Note AN557 "Recommended Test Procedures Analog Switches"
Ordering Information
PART NUMBER (NOTE) ISL54057IRUZ-T PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. Thin µQFN Tape Reel (Pb-free) L16.2.6x1.8A
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pbfree peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020C.
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. Rights Reserved other trademarks mentioned property their respective owners.
ISL54057 Pinouts
(Note ISL54057 µTQFN) VIEW
COMB
ADD1 ADD0 N.C.
NOTE: 2.6mm 1.8mm 0.5mm
Truth Table
ISL54057 ADD0 ADD1 SWITCH NONE
COMA
Descriptions
N.C. COMA COMB A0-A3 B0-B3 ADDx FUNCTION System Power Supply Input (1.6V 3.6V) Connect. internally connected. Ground Connection Digital Control Input. Connect Normal Operation. Connect turn switches off. Analog Switch Channel Output Analog Switch Channel Output Analog Switch Channel Input Analog Switch Channel Input Address Input
NOTE: Logic 0.5V. Logic 1.4V, with supply. Don't Care.
FN6379.0 September 2006
ISL54057
Absolute Maximum Ratings
-0.3 4.7V Input Voltages INH, ADDx (Note -0.3 (V+) 0.3V Output Voltages COMx (Note -0.3 (V+) 0.3V Continuous Current ±300mA Peak Current (Pulsed 1ms, Duty Cycle, Max) ±500mA Rating >4kV >300V >1kV
Thermal Information
Thermal Resistance (Typical, Note (oC/W) µTQFN Package Maximum Junction Temperature (Plastic Package) +150°C Maximum Storage Temperature Range. -65°C +150°C Maximum Lead Temperature (Soldering 10s) +300°C (Lead Tips Only)
Operating Conditions
Temperature Range ISL54057IRUZ -40°C +85°C
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: Signals COMx, ADDx, exceeding clamped internal diodes. Limit forward diode current maximum current ratings. measured with component mounted high effective thermal conductivity test board free air. Tech Brief TB379 details.
Electrical Specifications: Supply
Test Conditions: VSUPPLY +2.7V +3.3V, VINH 1.4V, VINL 0.5V (Notes Unless Otherwise Specified TEST CONDITIONS TEMP (°C) Full (NOTE -8.5 -0.5 0.43 0.09 0.07 (NOTE UNITS 0.75 0.15 0.15
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Resistance, Matching Between Channels, Flatness, RFLAT(ON) Leakage Current, IAx(OFF) IBx(OFF) Leakage Current, ICOM(ON) Input Voltage High, VINH, VADDH Input Voltage Low, VINL, VADDL Input Current, IINH, IINL, IADDH, IADDL DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time, Inhibit Turn-OFF Time, tOFF Address Transition Time, tTRANS Break-Before-Make Time, tBBM Capacitance, COFF Capacitance, COFF Capacitance, CCOM(ON)
2.7V, ICOM 100mA, (See Figure 2.7V, ICOM 100mA, Voltage RON, Note 2.7V, ICOM 100mA, (Note 3.3V, VCOM 0.3V, 0.3V 3.3V, VCOM 0.3V,
Full Full Full Full Full Full Full
DIGITAL INPUT CHARACTERISTICS
3.3V, VINH VADD
Full
2.7V, 1.5V, 35pF (See Figure 2.7V, 1.5V, 35pF, Figure 2.7V, 1.5V, 35pF (See Figure 3.3V, 1.5V, 35pF (See Figure 1MHz, VCOM (See Figure 1MHz, VCOM (See Figure 1MHz, VCOM (See Figure
Full Full Full Full
FN6379.0 September 2006
ISL54057
Electrical Specifications: Supply
Test Conditions: VSUPPLY +2.7V +3.3V, VINH 1.4V, VINL 0.5V (Notes Unless Otherwise Specified (Continued) TEST CONDITIONS 35pF, 100kHz (See Figures TEMP (°C) Full 3.3V, VINH, VADD Switch Full NOTES: Input voltage perform proper function. algebraic convention, whereby most negative value minimum most positive maximum, used this data sheet. matching between channels calculated subtracting channel with highest value from channel with lowest value. Flatness defined difference between maximum minimum value on-resistance over specified analog signal range. Parts 100% tested +25°C. Limits across full temperature range guaranteed design correlation. Between switches. (NOTE -100 (NOTE UNITS 0.05
PARAMETER Isolation Crosstalk, Note Power Supply Range Positive Supply Current,
POWER SUPPLY CHARACTERISTICS
Electrical Specifications: 1.8V Supply Test Conditions: +1.8V, VINH VINL 0.4V (Note
Unless Otherwise Specified TEST CONDITIONS PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Resistance, Matching Between Channels, RON) Flatness, RFLAT(ON) 1.8V, ICOM 10.0mA, 1.0V (See Figure 1.8V, ICOM 10.0mA, 1.0V (Note 1.8V, ICOM 10.0mA, 0.9V, 1.6V (Note Full Full Full Full Full Full 1.8V, VINH, VADD Full -0.5 0.61 0.11 0.12 0.19 0.19 0.85 TEMP (°C) (NOTE (NOTE UNITS
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH, VADDH Input Voltage Low, VINL, VADDL Input Current, IINH, IINL, IADDH, IADDL DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time, Inhibit Turn-OFF Time, tOFF Address Transition Time, tTRANS Break-Before-Make Time, tBBM 1.8V, 1.0V, 35pF (See Figure 1.8V, 1.0V, 35pF (See Figure 1.8V, 1.0V, 35pF (See Figure 1.8V, 1.0V, 35pF (See Figure Full Full Full
FN6379.0 September 2006
ISL54057 Test Circuits Waveforms
LOGIC INPUT A1,A2,B1, B2,A3,B3 LOGIC INPUT COMA COMB VOUT
VA0, SWITCH OUTPUT
VOUT
ADD0-1
tOFF
35pF
Logic input waveform inverted switches that have opposite logic sense.
Repeat test other switches. includes fixture stray capacitance. FIGURE INHIBIT tON/tOFF TEST CIRCUIT
FIGURE INHIBIT tON/tOFF MEASUREMENT POINTS
LOGIC INPUT tTRANS VA0, SWITCH OUTPUT VA3, tTRANS
A1,A2,B1, B2,A3,B3 ADD0-1
COMA, COMB
VOUT
VOUT
LOGIC INPUT
35pF
Logic input waveform inverted switches that have opposite logic sense.
Repeat test other switches. includes fixture stray capacitance. FIGURE ADDRESS tTRANS TEST CIRCUIT
FIGURE ADDRESS tTRANS MEASUREMENT POINTS
FIGURE SWITCHING TIMES
FN6379.0 September 2006
ISL54057 Test Circuits Waveforms (Continued)
LOGIC INPUT
SWITCH OUTPUT VOUT LOGIC INPUT
A0-A3 B0-B3 ADD0-1
COMA COMB
VOUT 35pF
tBBM
FIGURE tBBM MEASUREMENT POINTS
Repeat test other switches. includes fixture stray capacitance. FIGURE tBBM TEST CIRCUIT
FIGURE BREAK-BEFORE-MAKE TIME
10nF
SIGNAL GENERATOR
V1/100mA ADD1 ADD0 100mA COMA COMB ADD1 ADD0 Channel Select
ANALYZER
COMx
Channel Select
Off-Isolation measured between "Off" terminal each switch. Signal direction through switch reversed worst case values recorded.
FIGURE ISOLATION TEST CIRCUIT
FIGURE TEST CIRCUIT
FN6379.0 September 2006
ISL54057 Test Circuits Waveforms (Continued)
SIGNAL GENERATOR
Channel Select
COMA
ADD1 ADD0 N.C.
IMPEDANCE ANALYZER
ADD1 ADD0 COMA COMB Channel Select
ANALYZER
COMB
Crosstalk measured between adjacent channels with channel other channel OFF. Signal direction through switch reversed worst case values recorded.
FIGURE CROSSTALK TEST CIRCUIT
FIGURE CAPACITANCE TEST CIRCUIT
Detailed Description
ISL54057 analog switch offer precise switching capability from single 1.6V 3.6V supply with on-resistance (0.41) high speed operation (tON 27ns, tOFF 18ns). devices especially well suited portable battery powered equipment thanks operating supply voltage (1.6V), power consumption (0.17µW), leakage currents (60nA max) tiny µTQFN package. ultra on-resistance flatness provide very insertion loss distortion applications that require signal reproduction.
Logic inputs protected adding resistor series with logic input (see Figure resistor limits input current below threshold that produces permanent damage, sub-microamp input current produces insignificant voltage drop during normal operation. This method acceptable signal path inputs. Adding series resistor switch input defeats purpose using switch. Connecting schottky diodes signal pins shown Figure will shunt fault current supply ground thereby protecting switch. These schottky diodes must sized handle expected fault current.
Supply Sequencing Overvoltage Protection
With CMOS device, proper power supply sequencing required protect device from excessive input currents which might permanently damage pins contain protection diodes from (see Figure prevent forward biasing these diodes, must applied before input signals, input signal voltages must remain between GND. these conditions cannot guaranteed, then precautions must implemented prohibit current voltage logic signal pins from exceeding maximum ratings switch. following methods used provided additional protection limit current event that voltage signal logic goes below ground above rail.
OPTIONAL SCHOTTKY DIODE OPTIONAL PROTECTION RESISTOR ADDX VCOMX
OPTIONAL SCHOTTKY DIODE
FIGURE OVERVOLTAGE PROTECTION
FN6379.0 September 2006
ISL54057
Power-Supply Considerations
ISL54057 construction typical most CMOS analog switches, that they have supply pins: GND. drive internal CMOS switches their analog voltage limits. Unlike switches with maximum supply voltage, ISL54057 4.7V maximum supply voltage provides plenty room tolerance 3.6V supplies, well room overshoot noise spikes. minimum recommended supply voltage 1.6V part will operate with supply below 1.5V. important note that input signal range, switching times, on-resistance degrade lower supply voltages. Refer electrical specification tables Typical Performance curves details. power internal logic (thus setting digital switching point) level shifters. level shifters convert logic levels switched signals drive analog switch gate terminals. frequency response very consistent over wide range, varying analog signal levels. switch acts like capacitor passes higher frequencies with less attenuation, resulting signal feed through from switch's input output. Isolation resistance this feed through, while Crosstalk indicates amount feed through from switch another. Figure details high Isolation Crosstalk rejection provided this family. 100kHz, Isolation about 65dB systems, decreasing approximately 20dB decade frequency increases. Higher load impedances decrease Isolation Crosstalk rejection voltage divider action switch impedance load impedance.
Leakage Considerations
Reverse protection diodes internally connected between each analog-signal both GND. these diodes conducts analog signal exceeds GND. Virtually analog leakage current comes from diodes GND. Although diodes given signal identical therefore fairly well balanced, they reverse biased differently. Each biased either analog signal. This means their leakages will vary signal varies. difference diode leakages pins constitutes analogsignal-path leakage current. analog leakage current flows between each supply terminals, other switch terminal. This both sides given switch show leakage currents same opposite polarity. There connection between analog signal paths GND.
Logic-Level Thresholds
This device 1.8V CMOS compatible (0.5V 1.4V) over supply range 2.7V 3.6V. 2.7V level about 0.54V. This still above 1.8V CMOS guaranteed output maximum level 0.5V noise margin reduced. digital input stages draw supply current whenever digital input voltage supply rails. Driving digital input signals from with fast transition time minimizes power dissipation.
High-Frequency Performance
systems, signal response reasonably flat even past 10MHz with -3dB bandwidth 70MHz (see Figure 12).
Typical Performance Curves +25°C, Unless Otherwise Specified
ICOM 100mA 1.65V 0.45 ICOM 100mA
1.8V
+85°C
0.35
+25°C
2.7V
-40°C
3.6V VCOM
0.25
VCOM
FIGURE RESISTANCE SUPPLY VOLTAGE SWITCH VOLTAGE
FIGURE RESISTANCE SWITCH VOLTAGE
FN6379.0 September 2006
ISL54057 Typical Performance Curves +25°C, Unless Otherwise Specified (Continued)
0.65 0.55 -40°C 0.45 0.35 CROSSTALK (dB) +25°C 1.8V ICOM 100mA +85°C ISOLATION VCOM -100 100k CROSSTALK 100M 500M ISOLATION (dB)
FIGURE RESISTANCE SWITCH VOLTAGE
FREQUENCY (Hz)
FIGURE CROSSTALK ISOLATION
NORMALIZED GAIN (dB) GAIN
Characteristics
SUBSTRATE POTENTIAL (POWERED UP): TRANSISTOR COUNT:
PHASE
PHASE
PROCESS: Submicron CMOS
0.2VP-P 2VP-P FREQUENCY (MHz)
FIGURE FREQUENCY RESPONSE
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com
FN6379.0 September 2006
ISL54057 Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
L16.2.6x1.8A
LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS
INDEX AREA 0.10
SYMBOL
0.45
NOMINAL 0.50 0.127
0.55 0.05
NOTES
0.10
VIEW
0.15 2.55 1.75
0.20 2.60 1.80 0.40
0.25 2.65 1.85
0.10 0.05 SEATING PLANE SIDE VIEW
0.35 0.45
0.40 0.50
0.45 0.55
0.10 0.05 BOTTOM VIEW
NOTES:
Rev. 8/06
(DATUM (DATUM
Dimensioning tolerancing conform ASME Y14.5-1994. number terminals. refer number terminals side, respectively. dimensions millimeters. Angles degrees. Dimension applies metallized terminal measured between 0.15mm 0.30mm from terminal tip.
SECTION "C-C" TERMINAL (A1)
configuration identifier optional, must located within zone indicated. identifier either mold mark feature. Maximum package warpage 0.05mm. Maximum allowable burrs 0.076mm directions. JEDEC Reference MO-255. additional information, assist with Land Pattern Design effort, Intersil Technical Brief TB389.
3.00 1.80 1.40 1.40
2.20
0.90 0.40 0.20 0.50 0.40 LAND PATTERN 0.20
FN6379.0 September 2006
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