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Data Sheet December 2006 FN6411.0 Radiation Hardened CMOS Dual SP


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HS-303ARH
Data Sheet December 2006 FN6411.0
Radiation Hardened CMOS Dual SPDT Analog Switch
HS-303ARH analog switch monolithic device fabricated using Intersil's dielectrically isolated Radiation Hardened Silicon Gate (RSG) process technology insure latch-up free operation. pinout compatible functionally equivalent HS-303RH, offers improved 300kRAD(Si) total dose capability. This switch offers lowresistance switching performance analog voltages supply rails. "ON" resistance stays reasonably constant over full range operating voltage current. "ON" resistance also stays reasonably constant when exposed radiation, being typically pre-rad post-300kRAD(Si). Break-before-make switching controlled digital inputs.
Features
QML, MIL-PRF-38535 Radiation Performance Total Dose: RAD(Si) SEE: 60MeV-mg/cm2 Incident Angle, <150pC Charge Transferred Output Switch Latch-Up, Dielectrically Isolated Device Islands Pinout Functionally Compatible with Intersil HS-303RH HI-303 Series Analog Switches Analog Signal Range Leakage 100nA (Max, Post-Rad) (Max, Post-Rad) Standby Supply Current +150A/-100A (Max, Post-Rad)
Specifications
Specifications Hard devices controlled Defense Supply Center Columbus (DSCC). numbers listed below must used when ordering. Detailed Electrical Specifications HS-303ARH contained 5962-95813. "hot-link" provided from website downloading
Pinouts
HS1-303ARH (SBDIP), CDIP2-T14 VIEW
Ordering Information
ORDERING NUMBER 5962F9581304QCC 5962F9581304QXC 5962F9581304V9A 5962F9581304VCC 5962F9581304VXC PART NUMBER HS1-303ARH-8 HS9-303ARH-8 HS0-303ARH-Q HS1-303ARH-Q HS9-303ARH-Q TEMP. RANGE (°C) +125 +125 +125 +125 +125 +125 +125 +125 SBDIP D14.3 SBDIP D14.3
PKG. SBDIP
PKG. DWG. D14.3
K14.A Flatpack HS9-303ARH (FLATPACK) CDFP3-F14 VIEW
K14.A Flatpack
HS0-303ARH/PROTO HS0-303ARH/SAMPLE HS1-303ARH/PROTO HS1-303ARH/PROTO HS9-303ARH/PROTO HS9-303ARH/PROTO
K14.A Flatpack
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. Rights Reserved other trademarks mentioned property their respective owners.
HS-303ARH Functional Diagram
SBDIP TRUTH TABLE
LOGIC
Characteristics
DIMENSIONS: 2690m 5200m (106 mils mils) Thickness: 483m 25.4m mils mil) INTERFACE MATERIALS: Glassivation: Type: (Phosphorous Silicon Glass) Thickness: Metallization: Type: AlSiCu Thickness: Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 A/cm2 Transistor Count:
Metallization Mask Layout
HS-303ARH
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com
FN6411.0 December 2006

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