Data Sheet February 2006 FN3550.6 Quad 125MHz Video Current Feedb
|
|
|
Top Searches for this datasheet
HA5024
Data Sheet February 2006 FN3550.6
Quad 125MHz Video Current Feedback Amplifier with Disable
HA5024 quad version popular Intersil HA5020. features wide bandwidth high slew rate, optimized video applications gains between current feedback amplifier thus yields less bandwidth degradation high closed loop gains than voltage feedback amplifiers. differential gain phase, 0.1dB gain flatness, ability drive back terminated cables, make this amplifier ideal demanding video applications. HA5024 also features disable function that significantly reduces supply current while forcing output true high impedance state. This functionality allows video multiplexers implemented with single current feedback design allows user take advantage amplifier's bandwidth dependency feedback resistor. reducing bandwidth increased compensate decreases higher closed loop gains heavy output loads.
Features
Quad Version HA-5020 Individual Output Enable/Disable Input Offset Voltage 800µV Wide Unity Gain Bandwidth 125MHz Slew Rate. 475V/µs Differential Gain 0.03% Differential Phase. 0.03 Degrees Supply Current (per Amplifier) 7.5mA Protection. 4000V Guaranteed Specifications Supplies Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Video Multiplexers; Video Switching Routing Video Gain Block Video Distribution Amplifier/RGB Amplifier
Ordering Information
PART NUMBER HA5024IP HA5024IPZ (Note) HA5024IB HA5024IBZ (Note) PART MARKING HA5024IP HA5024IPZ HA5024IB HA5024IBZ TEMP. RANGE (°C) PACKAGE PDIP PDIP* (Pb-free) SOIC SOIC (Pb-free) PKG. DWG. E20.3 E20.3 M20.3 M20.3
Flash Driver Current Voltage Converter Medical Imaging Radar Imaging Systems
Pinout
HA5024 (PDIP, SOIC) VIEW
OUT1 -IN1 +IN1 OUT4
HA5024IBZ96 HA5024IBZ (See Note) HA5024EVAL
M20.3 SOIC Tape Reel (Pb-free)
-IN4 +IN4 DIS4 DIS3
High Speed Evaluation Board
DIS1 DIS2 +IN2 -IN2
*Pb-free PDIPs used through hole wave solder processing only. They intended Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pb-free peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
+IN3 -IN3 OUT3
OUT2
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 1998, 2005, 2006. Rights Reserved other trademarks mentioned property their respective owners.
HA5024
Absolute Maximum Ratings
Voltage Between Terminals Input Voltage (Note ±VSUPPLY Differential Input Voltage Output Current (Note Short Circuit Protected Rating (Note Human Body Model (Per MIL-STD-883 Method 3015.7) .2000V
Thermal Information
Thermal Resistance (Typical, Note
(°C/W)
Operating Conditions
Temperature Range. -40°C 85°C Supply Voltage Range (Typical) ±4.5V ±15V
PDIP Package* SOIC Package Maximum Junction Temperature (Note 175°C Maximum Junction Temperature (Plastic Package, Note 150°C Maximum Storage Temperature Range -65°C 150°C Maximum Lead Temperature (Soldering 10s) 300°C (SOIC Lead Tips Only) *Pb-free PDIPs used through hole wave solder processing only. They intended Reflow solder processing applications.
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: Maximum power dissipation, including output load, must designed maintain junction temperature below 175°C die, below 150°C plastic packages. Application Information section safe operating area information. measured with component mounted evaluation board free air. non-inverting input unused amplifiers must connected GND. Output protected short circuits ground. Brief short circuits ground will degrade reliability, however, continuous (100% duty cycle) output current should exceed 15mA maximum reliability.
Electrical Specifications
VSUPPLY ±5V, 400, 10pF,Unless Otherwise Specified (NOTE TEST TEMP. LEVEL (°C)
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (VIO)
TEST CONDITIONS
UNITS
Full Full Full Full Full Full Full Full Full 25,85 25,85 Full
±2.5
0.15
µV/°C µA/V µA/V µA/V µA/V µA/V µA/V
Delta Between Channels Average Input Offset Voltage Drift Common Mode Rejection Ratio Note
Power Supply Rejection Ratio
±3.5V ±6.5V
Input Common Mode Range Non-Inverting Input (+IN) Current
Note
Common Mode Rejection (+IBCMR Power Supply Rejection
Note
±3.5V ±6.5V
Inverting Input (-IN) Current
Delta BIAS Current Between Channels
Common Mode Rejection
Note
3550.6 February 2006
HA5024
Electrical Specifications
VSUPPLY ±5V, 400, 10pF,Unless Otherwise Specified (Continued) (NOTE TEST TEMP. LEVEL (°C) Input Noise Voltage +Input Noise Current -Input Noise Current TRANSFER CHARACTERISTICS Transimpedence Note Open Loop Voltage Gain 400, VOUT ±2.5V Open Loop Voltage Gain 100, VOUT ±2.5V OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Current, Short Circuit Output Current, Disabled (Note Output Disable Time Output Enable Time Output Capacitance Disabled POWER SUPPLY CHARACTERISTICS Supply Voltage Range Quiescent Supply Current Supply Current, Disabled Disable Input Current Minimum Current Disable Maximum Current Enable CHARACTERISTICS Slew Rate Full Power Bandwidth Rise Time Fall Time Propagation Delay Overshoot -3dB Bandwidth Settling Time Settling Time 0.25% VOUT 100mV Output Step Output Step Note Note Note Note Note V/µs DISABLE DISABLE Note Note Full Full Full Full Full mA/Op mA/Op ±2.5V, VOUT DISABLE VOUT ±2.5V, Note Note Note Full Full Full Full ±2.5 ±2.5 ±16.6 ±3.0 ±3.0 ±20.0 Full Full Full 0.85 1kHz 1kHz 1kHz Full
PARAMETER Power Supply Rejection
TEST CONDITIONS ±3.5V ±6.5V
25.0
UNITS µA/V µA/V nV/Hz pA/Hz pA/Hz
3550.6 February 2006
HA5024
Electrical Specifications
VSUPPLY ±5V, 400, 10pF,Unless Otherwise Specified (Continued) (NOTE TEST TEMP. LEVEL (°C)
PARAMETER CHARACTERISTICS 681) Slew Rate Full Power Bandwidth Rise Time Fall Time Propagation Delay Overshoot -3dB Bandwidth Settling Time Settling Time 0.25% Gain Flatness
TEST CONDITIONS
UNITS
Note Note Note Note Note
0.02 0.07
V/µs
VOUT 100mV Output Step Output Step 5MHz 20MHz
CHARACTERISTICS +10, 383) Slew Rate Full Power Bandwidth Rise Time Fall Time Propagation Delay Overshoot -3dB Bandwidth Settling Time Settling Time 0.1% VIDEO CHARACTERISTICS Differential Gain (Note Differential Phase (Note NOTES: ±2.5V. -40°C Product tested ±2.25V because short test duration does allow self heating. 100, 2.5V. This minimum current which must pulled Disable order disable output. output considered disabled when -10mV VOUT +10mV. This maximum current that pulled Disable with HA5024 remaining enabled. HA5024 considered disabled when supply current decreased least 0.5mA. VOUT switches from +2V, from -2V. Specification from points. Slew Rate FPBW PEAK PEAK 100, VOUT Measured from points rise/fall times; from points input output propagation delay. Production Tested; Typical Guaranteed Limit based characterization; Design Typical information only. +2V, DISABLE Measured from point DISABLE VOUT +2V, DISABLE +5V. Measured from point DISABLE VOUT Force VOUT from ±2.5V, 50ns, DISABLE Measured with VM700A video tester using NTC-7 composite VITS. VOUT ±2.5V. -40°C Product tested VOUT ±2.25V because short test duration does allow self heating. 0.03 0.03 Degrees VOUT 100mV Output Step Output Step Note Note Note Note Note V/µs
3550.6 February 2006
HA5024 Test Circuits Waveforms
HP4195 NETWORK ANALYZER
FIGURE TEST CIRCUIT TRANSIMPEDANCE MEASUREMENTS
(NOTE
(NOTE VOUT
VOUT
FIGURE SMALL SIGNAL PULSE RESPONSE CIRCUIT NOTE:
FIGURE LARGE SIGNAL PULSE RESPONSE CIRCUIT
series input resistor recommended limit input currents case input signals present before HA5024 powered
Vertical Scale: 100mV/Div., VOUT 100mV/Div. FIGURE SMALL SIGNAL RESPONSE
Vertical Scale: 1V/Div., VOUT 1V/Div. Horizontal Scale: 50ns/Div. FIGURE LARGE SIGNAL RESPONSE
3550.6 February 2006
Schematic
(One Amplifier Four)
2.5K
QP11
QP14
QP18 QP19
QP10 QN12
QP16 QP20
1.25K QN10 VR33 QN11
3550.6 February 2006
QP15 1.4pF
QP12 QN13 QP13
QP17 QN17 1.4pF QN15 QN21 QN20 QN19
HA5024
QN14
QN16 QN18
HA5024 Application Information
Optimum Feedback Resistor
plots inverting non-inverting frequency response, Figure Figure Typical Performance Curves section, illustrate performance HA5024 various closed loop gain configurations. Although bandwidth dependency closed loop gain isn't severe that voltage feedback amplifier, there appreciable decrease bandwidth higher gains. This decrease minimized taking advantage current feedback amplifier's unique relationship between bandwidth current feedback amplifiers require feedback resistor, even unity gain applications, conjunction with internal compensation capacitor, sets dominant pole frequency response. Thus, amplifier's bandwidth inversely proportional HA5024 design optimized 1000 gain Decreasing unity gain application decreases stability, resulting excessive peaking overshoot. higher gains amplifier more stable, decreased trade-off stability bandwidth. table below lists recommended values various gains, expected bandwidth.
GAIN (ACL) 1000 1000 BANDWIDTH (MHz)
Driving Capacitive Loads
Capacitive loads will degrade amplifier's phase margin resulting frequency response peaking possible oscillations. most cases oscillation avoided placing isolation resistor series with output shown Figure
VOUT
FIGURE PLACEMENT OUTPUT ISOLATION RESISTOR,
selection criteria isolation resister highly dependent load, been determined good starting value.
Power Dissipation Considerations
high supply current inherent quad amplifiers, care must taken insure that maximum junction temperature (TJ, Absolute Maximum Ratings) exceeded. Figure shows maximum ambient temperature versus supply voltage available package styles (Plastic DIP, SOIC). ±5VDC quiescent operation both package styles operated over full industrial range -40°C 85°C. recommended that thermal calculations, which take into account output power, performed designer.
MAX. AMBIENT TEMPERATURE SOIC PDIP
Board Layout
frequency response this amplifier depends greatly amount care taken designing board. inductance components such chip resistors chip capacitors strongly recommended. leaded components used leads must kept short especially power supply decoupling components those components connected inverting input. Attention must given decoupling power supplies. large value (10µF) tantalum electrolytic capacitor parallel with small value (0.1µF) chip capacitor works well most cases. ground plane strongly recommended control noise. Care must also taken minimize capacitance ground seen amplifier's inverting input (-IN). larger this capacitance, worse gain peaking, resulting pulse overshoot possible instability. recommended that ground plane removed under traces connected -IN, that connections kept short possible minimize capacitance from this node ground.
SUPPLY VOLTAGE (±V)
FIGURE MAXIMUM OPERATING AMBIENT TEMPERATURE SUPPLY VOLTAGE
Enable/Disable Function
When enabled amplifier functions normal current feedback amplifier with data electrical specifications table being valid applicable. When disabled amplifier output assumes true high impedance state supply current reduced significantly.
3550.6 February 2006
HA5024
circuit shown Figure simplified schematic enable/disable function. large value resistors series with DISABLE makes appear current source driver. When driver pulls this current flows into driver. This current, which large 350µA when external circuit process variables their extremes, required insure that point achieves proper potential disable output.The driver must have compliance capability sinking this current. When DISABLE driven with dedicated gate. maximum level output voltage gate, 0.4V, enough compliance insure that amplifier will always disabled even though will turn gate will sink enough current keep point proper voltage. When greater than DISABLE should driven with open collector device that breakdown rating greater than Referring Figure seen that will pull-up resistor +VCC DISABLE left open. those cases where enable/disable function required circuits some circuits permanently enabled letting DISABLE float. driver used enable/disable level, sure that driver does sink more than 20µA when DISABLE high level. gates, especially CMOS versions, violate this criteria permissible control enable/disable function with TTL.
+VCC ENABLE/DISABLE INPUT QP18 VIDEO INPUT VIDEO INPUT (NOTE
When plus supply rail disable driven dedicated gate discussed earlier. multiplexer equivalent used select channels logic must break before make. When these conditions satisfied HA5024IP often used remote video multiplexer, multiplexer extended adding more amplifier ICs.
Impedance Multiplexer
common problems surface when multiplex multiple high speed signals into impedance source such converter. first problem source impedance which tends make amplifiers oscillate causes gain errors. second problem multiplexer which supplies gain, introduces kinds distortion limits frequency response. Using amps which have enable/disable function, such HA5024, eliminates multiplexer problems because external chip needed, HA5024 drive impedance (large capacitance) loads series isolation resistor used.
VIDEO INPUT (NOTE (NOTE 2000 2000 VIDEO OUTPUT LOAD
(NOTE
2000
FIGURE SIMPLIFIED SCHEMATIC ENABLE/DISABLE FUNCTION
Typical Applications
Four Channel Video Multiplexer
Referring amplifier Figure terminates cable characteristic impedance back terminates cable characteristic impedance. amplifier gain configuration yield overall network gain when driving double terminated cable. value changed different network gain desired. holds disable ground thus inhibiting amplifier until switch, thrown position position switch pulls disable plus supply rail thereby enabling amplifier. Since actual signal switching takes place within amplifier, differential gain phase parameters, which 0.03% 0.03 degrees respectively, determine circuit's performance. other three circuits, through U1D, operate similar manner.
2000
0.1µF
10µF 0.1µF
10µF
NOTES: HA5024IP. resistors break before make. ground plane. FIGURE FOUR CHANNEL VIDEO MULTIPLEXER
3550.6 February 2006
HA5024
Referring Figure both inputs terminated their characteristic impedance; typical video applications. Since drivers usually terminated their characteristic impedance input gain 0.5, thus amplifiers, configured gain circuit gain equal one. Resistors determine amplifier gain, different gain desired should changed according equation R3/R2). sets frequency response amplifier should refer manufacturers data sheet before changing value. asymmetrical charge/discharge time circuit which configures break before make switch prevent both amplifiers from being active simultaneously. this design extended more channels drive logic must designed break before make. enclosed feedback loop amplifier that large open loop amplifier gain will present load with small closed loop output impedance while keeping amplifier stable values load capacitance. circuit shown Figure tested full range capacitor values with oscillations being observed; thus, problem been solved.The frequency gain characteristics circuit those amplifier independent multiplexing action; thus, problem been solved. multiplexer transition time approximately 15µs with component values shown.
INPUT INPUT 1N4148 2000 0.047µF CHANNEL SWITCH
(NOTE 0.01µF
OUTPUT
2000 INHIBIT 100K
(NOTE
0.01µF
1N4148
0.047µF
NOTES: HA5022/24. CD4011.
FIGURE IMPEDANCE MULTIPLEXER
3550.6 February 2006
HA5024 Typical Performance Curves
NORMALIZED GAIN (dB) FREQUENCY (MHz) VOUT 0.2VP-P 10pF NORMALIZED GAIN (dB)
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified
FREQUENCY (MHz) VOUT 0.2VP-P 10pF
FIGURE NON-INVERTING FREQUENCY RESPONSE
-3dB BANDWIDTH (MHz)
FIGURE INVERTING FREQUENCY RESPONSE
VOUT 0.2VP-P 10pF
NONINVERTING PHASE (DEGREES)
-135 -100 -225 -270 -315 -360 VOUT 0.2VP-P 10pF FREQUENCY (MHz) -10, +10,
-135 -180
INVERTING PHASE (DEGREES)
GAIN PEAKING 1100 1300 FEEDBACK RESISTOR 1500
FIGURE PHASE RESPONSE FUNCTION FREQUENCY
VOUT 0.2VP-P 10pF
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
-3dB BANDWIDTH (MHz)
-3dB BANDWIDTH (MHz)
-3dB BANDWIDTH
-3dB BANDWIDTH GAIN PEAKING (dB)
GAIN PEAKING (dB)
GAIN PEAKING VOUT 0.2VP-P 10pF
GAIN PEAKING 1100
LOAD RESISTOR
1000
FEEDBACK RESISTOR
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
FIGURE BANDWIDTH GAIN PEAKING LOAD RESISTANCE
3550.6 February 2006
GAIN PEAKING (dB)
-3dB BANDWIDTH
HA5024 Typical Performance Curves
VOUT 0.2VP-P 10pF -3dB BANDWIDTH (MHz) OVERSHOOT
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
VOUT 0.1VP-P 10pF VSUPPLY ±5V,
VSUPPLY ±15V, VSUPPLY ±5V, VSUPPLY ±15V,
FEEDBACK RESISTOR
LOAD RESISTANCE 1000
FIGURE BANDWIDTH FEEDBACK RESISTANCE
FIGURE SMALL SIGNAL OVERSHOOT LOAD RESISTANCE
0.08
0.10 FREQUENCY 3.58MHz 0.08 DIFFERENTIAL GAIN DIFFERENTIAL PHASE (DEGREES)
FREQUENCY 3.58MHz
0.06
0.06
0.04
0.04
0.02 0.00
0.02 0.00 SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
FIGURE DIFFERENTIAL GAIN SUPPLY VOLTAGE
VOUT 2.0VP-P 30pF
FIGURE DIFFERENTIAL PHASE SUPPLY VOLTAGE
REJECTION RATIO (dB) 0.001
DISTORTION (dBc)
ORDER
CMRR
NEGATIVE PSRR POSITIVE PSRR 0.01 FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE DISTORTION FREQUENCY
FIGURE REJECTION RATIOS FREQUENCY
3550.6 February 2006
HA5024 Typical Performance Curves
VOUT 1.0VP-P
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
RLOAD VOUT 1.0VP-P PROPAGATION DELAY (ns) +10,
PROPAGATION DELAY (ns)
TEMPERATURE (°C)
SUPPLY VOLTAGE (±V)
FIGURE PROPAGATION DELAY TEMPERATURE
FIGURE PROPAGATION DELAY SUPPLY VOLTAGE
VOUT 2VP-P NORMALIZED GAIN (dB) SLEW RATE (V/µs) TEMPERATURE (°C) SLEW RATE SLEW RATE
-0.2 -0.4 -0.6 -0.8 -1.0 -1.2 FREQUENCY (MHz) +10, VOUT 0.2VP-P 10pF
FIGURE SLEW RATE TEMPERATURE
FIGURE NON-INVERTING GAIN FLATNESS FREQUENCY
+10, VOLTAGE NOISE (nV/Hz) CURRENT NOISE (pA/Hz) -INPUT NOISE CURRENT 1000
NORMALIZED GAIN (dB) -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 FREQUENCY (MHz) VOUT 0.2VP-P 10pF
+INPUT NOISE CURRENT INPUT NOISE VOLTAGE
0.01
FREQUENCY (kHz)
FIGURE INPUT NOISE CHARACTERISTICS FIGURE INVERTING GAIN FLATNESS FREQUENCY
3550.6 February 2006
HA5024 Typical Performance Curves
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
(mV)
BIAS CURRENT (µA)
TEMPERATURE (°C) TEMPERATURE (°C)
FIGURE INPUT OFFSET VOLTAGE TEMPERATURE
FIGURE +INPUT BIAS CURRENT TEMPERATURE
4000
TRANSIMPEDANCE
BIAS CURRENT (µA)
3000
2000
1000
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE -INPUT BIAS CURRENT TEMPERATURE
FIGURE TRANSIMPEDANCE TEMPERATURE
REJECTION RATIO (dB) +PSRR
125°C (mA)
55°C
-PSRR -100 CMRR
25°C SUPPLY VOLTAGE (±V)
TEMPERATURE (°C)
FIGURE SUPPLY CURRENT SUPPLY VOLTAGE
FIGURE REJECTION RATIO TEMPERATURE
3550.6 February 2006
HA5024 Typical Performance Curves
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
SUPPLY CURRENT (mA)
OUTPUT SWING
+10V
+15V
DISABLE INPUT VOLTAGE
TEMPERATURE (°C)
FIGURE SUPPLY CURRENT DISABLE INPUT VOLTAGE
FIGURE OUTPUT SWING TEMPERATURE
±15V
VOUT (VP-P) ±10V (mV) 10.00
±4.5V
0.01
0.10 1.00 LOAD RESISTANCE TEMPERATURE (°C)
FIGURE OUTPUT SWING LOAD RESISTANCE
FIGURE INPUT OFFSET VOLTAGE CHANGE BETWEEN CHANNELS TEMPERATURE
BIAS CURRENT (µA)
(mA) 25°C
-55°C
125°C
TEMPERATURE (°C)
SUPPLY VOLTAGE (±V)
FIGURE INPUT BIAS CURRENT CHANGE BETWEEN CHANNELS TEMPERATURE
FIGURE DISABLE SUPPLY CURRENT SUPPLY VOLTAGE
3550.6 February 2006
HA5024 Typical Performance Curves
VOUT 2VP-P SEPARATION (dB) ENABLE TIME (ns)
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
DISABLE -0.5 DISABLE ENABLE ENABLE DISABLE TIME (µs) PHASE ANGLE (DEGREES)
FREQUENCY (MHz)
-2.5 -2.0 -1.5 -1.0
OUTPUT VOLTAGE
FIGURE CHANNEL SEPARATION FREQUENCY
FIGURE ENABLE/DISABLE TIME OUTPUT VOLTAGE
FEEDTHROUGH (dB)
DISABLE 5VP-P
TRANSIMPEDANCE
0.01 0.001
FREQUENCY (MHz)
0.001
0.01
FREQUENCY (MHz)
-135
FIGURE DISABLE FEEDTHROUGH FREQUENCY
FIGURE TRANSIMPEDANCE FREQUENCY
TRANSIMPEDANCE
PHASE ANGLE (DEGREES) 0.01 0.001 -135 0.001 0.01 FREQUENCY (MHz)
FIGURE TRANSIMPEDENCE FREQUENCY
3550.6 February 2006
HA5024 Characteristics
DIMENSIONS: 2680µm 2600µm 483µm METALLIZATION: Type: Metal AlCu (1%) Thickness: Metal Type: Metal AlCu (1%) Thickness: Metal SUBSTRATE POTENTIAL (Powered Up): VTRANSISTOR COUNT: PROCESS: High Frequency Bipolar Dielectric Isolation PASSIVATION: Type: Nitride Thickness:
Metallization Mask Layout
HA5024
-IN1 OUT1 OUT4 -IN4
+IN1
+IN4
DIS1
DIS4
DIS2
DIS3
+IN2
+IN3
-IN2
OUT2
OUT3
-IN3
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com
3550.6 February 2006
Other recent searches
SMT10E - SMT10E SMT10E Datasheet
NTE9601 - NTE9601 NTE9601 Datasheet
M30624MGM - M30624MGM M30624MGM Datasheet
IXGN400N30A3 - IXGN400N30A3 IXGN400N30A3 Datasheet
ET2822 - ET2822 ET2822 Datasheet
CIM-F23 - CIM-F23 CIM-F23 Datasheet
AN6077 - AN6077 AN6077 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
